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authorJim Wilson <wilson@gcc.gnu.org>1992-10-01 12:17:02 -0700
committerJim Wilson <wilson@gcc.gnu.org>1992-10-01 12:17:02 -0700
commitae51bd971e8d262b62459d992d7086e42642f168 (patch)
tree2e2e8ecc5f4343c59b1030560a2504e3f1ba2199 /gcc
parentb9a24ad42e0779007c31c349cf2a5b9a9f905f98 (diff)
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(SECONDARY_INPUT_RELOAD_CLASS): Also need a temp reg when loading HImode and QImode values from memory to FP_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Also need a temp reg when loading HImode and QImode values from memory to FP_REGS. (SECONDARY_OUTPUT_RELOAD_CLASS): New macro. Define this to handle HImode and QImode stores from FP_REGS to memory similar to above. From-SVN: r2301
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/sparc/sparc.h25
1 files changed, 19 insertions, 6 deletions
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 31a42f6..169cd67 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -564,17 +564,30 @@ extern char leaf_reg_backmap[];
a register of class CLASS in MODE.
On the SPARC, when PIC, we need a temporary when loading some addresses
- into a register. */
+ into a register.
-#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
- (flag_pic && pic_address_needs_scratch (IN) ? GENERAL_REGS : NO_REGS)
+ Also, we need a temporary when loading/storing a HImode/QImode value
+ between memory and the FPU registers. This can happen when combine puts
+ a paradoxical subreg in a float/fix conversion insn. */
+
+#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
+ (flag_pic && pic_address_needs_scratch (IN) ? GENERAL_REGS \
+ : ((CLASS) == FP_REGS && ((MODE) == HImode || (MODE) == QImode)\
+ && (GET_CODE (IN) == MEM \
+ || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \
+ && true_regnum (IN) == -1))) ? GENERAL_REGS : NO_REGS)
+
+#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, IN) \
+ ((CLASS) == FP_REGS && ((MODE) == HImode || (MODE) == QImode) \
+ && (GET_CODE (IN) == MEM \
+ || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \
+ && true_regnum (IN) == -1)) ? GENERAL_REGS : NO_REGS)
/* On SPARC it is not possible to directly move data between
GENERAL_REGS and FP_REGS. */
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
- ((CLASS1 == FP_REGS && CLASS2 == GENERAL_REGS) \
- || (CLASS1 == GENERAL_REGS && CLASS2 == FP_REGS))
-
+ (((CLASS1) == FP_REGS && (CLASS2) == GENERAL_REGS) \
+ || ((CLASS1) == GENERAL_REGS && (CLASS2) == FP_REGS))
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */