Merge branch 'master' into devel/sphinx

53 files changed, 1600 insertions, 151 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d7ea100..cf73c34 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,168 @@
+2021-06-27  Andrew Pinski  <apinski@marvell.com>
+
+	PR middle-end/101230
+	* fold-const.c (fold_ternary_loc): Check
+	the return value of invert_tree_comparison.
+
+2021-06-27  David Edelsohn  <dje.gcc@gmail.com>
+
+	* config.gcc: Add SPDX License Identifier.
+	(powerpc-ibm-aix789): Default to aix73.h.
+	(powerpc-ibm-aix7.2.*.*): New stanza.
+	* config/rs6000/aix72.h: Add SPDX License Identifier.
+	* config/rs6000/aix73.h: New file.
+
+2021-06-26  Jason Merrill  <jason@redhat.com>
+
+	* except.c: #include "dwarf2.h" instead of "dwarf2out.h".
+
+2021-06-26  Andrew Pinski  <apinski@marvell.com>
+
+	* genmatch.c (lower_cond): Copy for_subst_vec
+	for the simplify also.
+	(lower): Swap the order for lower_for and lower_cond.
+
+2021-06-26  Andrew Pinski  <apinski@marvell.com>
+
+	* tree-ssa-phiopt.c (match_simplify_replacement): Reset
+	flow senatitive info on the moved ssa set.
+
+2021-06-26  Andrew Pinski  <apinski@marvell.com>
+
+	* fold-const.c (fold_cond_expr_with_comparison):
+	Exand arg0 into comp_code, arg00, and arg01.
+	(fold_ternary_loc): Use invert_tree_comparison
+	instead of fold_invert_truthvalue for the case
+	where we have A CMP B ? C : A.
+
+2021-06-25  Martin Sebor  <msebor@redhat.com>
+
+	PR middle-end/101216
+	* calls.c (maybe_warn_rdwr_sizes): Use the no_warning constant.
+
+2021-06-25  Jeff Law  <jeffreyalaw@gmail.com>
+
+	* config/h8300/h8300.c (select_cc_mode): Handle ASHIFTRT and LSHIFTRT.
+
+2021-06-25  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/101202
+	* tree-vect-slp.c (vect_optimize_slp): Explicitely handle
+	failed nodes.
+
+2021-06-25  Richard Biener  <rguenther@suse.de>
+
+	* tree-vect-slp-patterns.c (addsub_pattern::build): Copy
+	STMT_VINFO_REDUC_DEF from the original representative.
+
+2021-06-25  Martin Sebor  <msebor@redhat.com>
+
+	* builtins.c (warn_string_no_nul): Replace uses of TREE_NO_WARNING,
+	gimple_no_warning_p and gimple_set_no_warning with
+	warning_suppressed_p, and suppress_warning.
+	(c_strlen): Same.
+	(maybe_warn_for_bound): Same.
+	(warn_for_access): Same.
+	(check_access): Same.
+	(expand_builtin_strncmp): Same.
+	(fold_builtin_varargs): Same.
+	* calls.c (maybe_warn_nonstring_arg): Same.
+	(maybe_warn_rdwr_sizes): Same.
+	* cfgexpand.c (expand_call_stmt): Same.
+	* cgraphunit.c (check_global_declaration): Same.
+	* fold-const.c (fold_undefer_overflow_warnings): Same.
+	(fold_truth_not_expr): Same.
+	(fold_unary_loc): Same.
+	(fold_checksum_tree): Same.
+	* gimple-array-bounds.cc (array_bounds_checker::check_array_ref): Same.
+	(array_bounds_checker::check_mem_ref): Same.
+	(array_bounds_checker::check_addr_expr): Same.
+	(array_bounds_checker::check_array_bounds): Same.
+	* gimple-expr.c (copy_var_decl): Same.
+	* gimple-fold.c (gimple_fold_builtin_strcpy): Same.
+	(gimple_fold_builtin_strncat): Same.
+	(gimple_fold_builtin_stxcpy_chk): Same.
+	(gimple_fold_builtin_stpcpy): Same.
+	(gimple_fold_builtin_sprintf): Same.
+	(fold_stmt_1): Same.
+	* gimple-ssa-isolate-paths.c (diag_returned_locals): Same.
+	* gimple-ssa-nonnull-compare.c (do_warn_nonnull_compare): Same.
+	* gimple-ssa-sprintf.c (handle_printf_call): Same.
+	* gimple-ssa-store-merging.c (imm_store_chain_info::output_merged_store): Same.
+	* gimple-ssa-warn-restrict.c (maybe_diag_overlap): Same.
+	* gimple-ssa-warn-restrict.h: Adjust declarations.
+	(maybe_diag_access_bounds): Replace uses of TREE_NO_WARNING,
+	gimple_no_warning_p and gimple_set_no_warning with
+	warning_suppressed_p, and suppress_warning.
+	(check_call): Same.
+	(check_bounds_or_overlap): Same.
+	* gimple.c (gimple_build_call_from_tree): Same.
+	* gimplify.c (gimplify_return_expr): Same.
+	(gimplify_cond_expr): Same.
+	(gimplify_modify_expr_complex_part): Same.
+	(gimplify_modify_expr): Same.
+	(gimple_push_cleanup): Same.
+	(gimplify_expr): Same.
+	* omp-expand.c (expand_omp_for_generic): Same.
+	(expand_omp_taskloop_for_outer): Same.
+	* omp-low.c (lower_rec_input_clauses): Same.
+	(lower_lastprivate_clauses): Same.
+	(lower_send_clauses): Same.
+	(lower_omp_target): Same.
+	* tree-cfg.c (pass_warn_function_return::execute): Same.
+	* tree-complex.c (create_one_component_var): Same.
+	* tree-inline.c (remap_gimple_op_r): Same.
+	(copy_tree_body_r): Same.
+	(declare_return_variable): Same.
+	(expand_call_inline): Same.
+	* tree-nested.c (lookup_field_for_decl): Same.
+	* tree-sra.c (create_access_replacement): Same.
+	(generate_subtree_copies): Same.
+	* tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same.
+	* tree-ssa-forwprop.c (combine_cond_expr_cond): Same.
+	* tree-ssa-loop-ch.c (ch_base::copy_headers): Same.
+	* tree-ssa-loop-im.c (execute_sm): Same.
+	* tree-ssa-phiopt.c (cond_store_replacement): Same.
+	* tree-ssa-strlen.c (maybe_warn_overflow): Same.
+	(handle_builtin_strcpy): Same.
+	(maybe_diag_stxncpy_trunc): Same.
+	(handle_builtin_stxncpy_strncat): Same.
+	(handle_builtin_strcat): Same.
+	* tree-ssa-uninit.c (get_no_uninit_warning): Same.
+	(set_no_uninit_warning): Same.
+	(uninit_undefined_value_p): Same.
+	(warn_uninit): Same.
+	(maybe_warn_operand): Same.
+	* tree-vrp.c (compare_values_warnv): Same.
+	* vr-values.c (vr_values::extract_range_for_var_from_comparison_expr): Same.
+	(test_for_singularity): Same.
+	* gimple.h (warning_suppressed_p): New function.
+	(suppress_warning): Same.
+	(copy_no_warning): Same.
+	(gimple_set_block): Call gimple_set_location.
+	(gimple_set_location): Call copy_warning.
+
+2021-06-25  Martin Sebor  <msebor@redhat.com>
+
+	* tree.h (warning_suppressed_at, copy_warning,
+	warning_suppressed_p, suppress_warning): New functions.
+
+2021-06-25  Martin Sebor  <msebor@redhat.com>
+
+	* Makefile.in (OBJS-libcommon): Add diagnostic-spec.o.
+	* gengtype.c (open_base_files): Add diagnostic-spec.h.
+	* diagnostic-spec.c: New file.
+	* diagnostic-spec.h: New file.
+	* tree.h (no_warning, all_warnings, suppress_warning_at): New
+	declarations.
+	* warning-control.cc: New file.
+
+2021-06-25  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/101185
+	* config/i386/i386.c (x86_order_regs_for_local_alloc):
+	Revert r12-1669.
+
 2021-06-24  Andrew MacLeod  <amacleod@redhat.com>
 
 	PR tree-optimization/101189
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index ed06b62..47b060d5 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20210625
+20210628
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 1521f2d..fe6a44c 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,16 @@
+2021-06-25  Martin Sebor  <msebor@redhat.com>
+
+	* c-common.c (c_wrap_maybe_const): Remove TREE_NO_WARNING.
+	(c_common_truthvalue_conversion): Replace direct uses of
+	TREE_NO_WARNING with warning_suppressed_p, suppress_warning, and
+	copy_no_warning.
+	(check_function_arguments_recurse): Same.
+	* c-gimplify.c (c_gimplify_expr): Same.
+	* c-warn.c (overflow_warning): Same.
+	(warn_logical_operator): Same.
+	(warn_if_unused_value): Same.
+	(do_warn_unused_parameter): Same.
+
 2021-06-24  Jakub Jelinek  <jakub@redhat.com>
 
 	* c-common.h (enum c_omp_region_type): Add C_ORT_TARGET and
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index c38b665..ba53da8 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,29 @@
+2021-06-25  Martin Sebor  <msebor@redhat.com>
+
+	* c-decl.c (pop_scope): Replace direct uses of TREE_NO_WARNING with
+	warning_suppressed_p, suppress_warning, and copy_no_warning.
+	(diagnose_mismatched_decls): Same.
+	(duplicate_decls): Same.
+	(grokdeclarator): Same.
+	(finish_function): Same.
+	(c_write_global_declarations_1): Same.
+	* c-fold.c (c_fully_fold_internal): Same.
+	* c-parser.c (c_parser_expr_no_commas): Same.
+	(c_parser_postfix_expression): Same.
+	* c-typeck.c (array_to_pointer_conversion): Same.
+	(function_to_pointer_conversion): Same.
+	(default_function_array_conversion): Same.
+	(convert_lvalue_to_rvalue): Same.
+	(default_conversion): Same.
+	(build_indirect_ref): Same.
+	(build_function_call_vec): Same.
+	(build_atomic_assign): Same.
+	(build_unary_op): Same.
+	(c_finish_return): Same.
+	(emit_side_effect_warnings): Same.
+	(c_finish_stmt_expr): Same.
+	(c_omp_clause_copy_ctor): Same.
+
 2021-06-24  Jakub Jelinek  <jakub@redhat.com>
 
 	PR c/101176
diff --git a/gcc/calls.c b/gcc/calls.c
index 27e8c45..f8a4b79 100644
--- a/gcc/calls.c
+++ b/gcc/calls.c
@@ -2054,7 +2054,7 @@ maybe_warn_rdwr_sizes (rdwr_map *rwm, tree fndecl, tree fntype, tree exp)
 	*sizstr = '\0';
 
       /* Set if a warning has been issued for the current argument.  */
-      opt_code arg_warned = N_OPTS;
+      opt_code arg_warned = no_warning;
       location_t loc = EXPR_LOCATION (exp);
       tree ptr = access.second.ptr;
       if (*sizstr
@@ -2080,7 +2080,7 @@ maybe_warn_rdwr_sizes (rdwr_map *rwm, tree fndecl, tree fntype, tree exp)
 			       exp, sizidx + 1, sizstr))
 	    arg_warned = OPT_Wstringop_overflow_;
 
-	  if (arg_warned != N_OPTS)
+	  if (arg_warned != no_warning)
 	    {
 	      append_attrname (access, attrstr, sizeof attrstr);
 	      /* Remember a warning has been issued and avoid warning
@@ -2152,7 +2152,7 @@ maybe_warn_rdwr_sizes (rdwr_map *rwm, tree fndecl, tree fntype, tree exp)
 		arg_warned = OPT_Wnonnull;		
 	    }
 
-	  if (arg_warned)
+	  if (arg_warned != no_warning)
 	    {
 	      append_attrname (access, attrstr, sizeof attrstr);
 	      /* Remember a warning has been issued and avoid warning
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 1be8d96..0230bb8 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
 # GCC target-specific configuration file.
 # Copyright (C) 1997-2021 Free Software Foundation, Inc.
 
@@ -3099,7 +3100,7 @@ rs6000-ibm-aix7.1.* | powerpc-ibm-aix7.1.*)
 	use_gcc_stdint=wrap
 	default_use_cxa_atexit=yes
 	;;
-rs6000-ibm-aix[789].* | powerpc-ibm-aix[789].*)
+rs6000-ibm-aix7.2.* | powerpc-ibm-aix7.2.*)
 	tmake_file="rs6000/t-aix52 t-slibgcc"
 	if test x$cpu_is_64bit = xyes; then
 	    tm_file="${tm_file} rs6000/biarch64.h"
@@ -3112,6 +3113,19 @@ rs6000-ibm-aix[789].* | powerpc-ibm-aix[789].*)
 	use_gcc_stdint=wrap
 	default_use_cxa_atexit=yes
 	;;
+rs6000-ibm-aix[789].* | powerpc-ibm-aix[789].*)
+	tmake_file="rs6000/t-aix52 t-slibgcc"
+	if test x$cpu_is_64bit = xyes; then
+	    tm_file="${tm_file} rs6000/biarch64.h"
+	    tmake_file="rs6000/t-aix64 t-slibgcc"
+	fi
+	tm_file="${tm_file} rs6000/aix.h rs6000/aix73.h rs6000/xcoff.h rs6000/aix-stdint.h"
+	extra_options="${extra_options} rs6000/aix64.opt"
+	use_collect2=yes
+	thread_file='aix'
+	use_gcc_stdint=wrap
+	default_use_cxa_atexit=yes
+	;;
 rl78-*-elf*)
 	tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
 	target_has_targetm_common=no
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 511c2b2..d8b4bfc 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -1947,9 +1947,10 @@ h8300_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1)
   if (op1 == const0_rtx
       && (cond == EQ || cond == NE || cond == LT || cond == GE)
       && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
-          || GET_CODE (op0) == NEG || GET_CODE (op0) == AND
-          || GET_CODE (op0) == IOR || GET_CODE (op0) == XOR
-          || GET_CODE (op0) == NOT || GET_CODE (op0) == ASHIFT
+	  || GET_CODE (op0) == NEG || GET_CODE (op0) == AND
+	  || GET_CODE (op0) == IOR || GET_CODE (op0) == XOR
+	  || GET_CODE (op0) == NOT || GET_CODE (op0) == ASHIFT
+	  || GET_CODE (op0) == ASHIFTRT || GET_CODE (op0) == LSHIFTRT
 	  || GET_CODE (op0) == MULT || GET_CODE (op0) == SYMBOL_REF
 	  || GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND
 	  || REG_P (op0) || MEM_P (op0)))
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index ea79e0b..1cc0cc6 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -902,13 +902,13 @@ BDESC (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_MMX, 0, CODE_FOR_ssse3_palignrdi,
 /* SSE4.1 */
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendpd, "__builtin_ia32_blendpd", IX86_BUILTIN_BLENDPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendps, "__builtin_ia32_blendps", IX86_BUILTIN_BLENDPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT)
-BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendvpd, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF)
-BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendvps, "__builtin_ia32_blendvps", IX86_BUILTIN_BLENDVPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF)
+BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF)
+BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvps", IX86_BUILTIN_BLENDVPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dppd, "__builtin_ia32_dppd", IX86_BUILTIN_DPPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dpps, "__builtin_ia32_dpps", IX86_BUILTIN_DPPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_insertps, "__builtin_ia32_insertps128", IX86_BUILTIN_INSERTPS128, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_mpsadbw, "__builtin_ia32_mpsadbw128", IX86_BUILTIN_MPSADBW128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_INT)
-BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_pblendvb, "__builtin_ia32_pblendvb128", IX86_BUILTIN_PBLENDVB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI)
+BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_pblendvb128", IX86_BUILTIN_PBLENDVB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_pblendw, "__builtin_ia32_pblendw128", IX86_BUILTIN_PBLENDW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_INT)
 
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_sign_extendv8qiv8hi2, "__builtin_ia32_pmovsxbw128", IX86_BUILTIN_PMOVSXBW128, UNKNOWN, (int) V8HI_FTYPE_V16QI)
@@ -1028,8 +1028,8 @@ BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_vpermilvarv8sf3, "__builtin_ia32_vpe
 
 BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendpd256, "__builtin_ia32_blendpd256", IX86_BUILTIN_BLENDPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_INT)
 BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendps256, "__builtin_ia32_blendps256", IX86_BUILTIN_BLENDPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT)
-BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendvpd256, "__builtin_ia32_blendvpd256", IX86_BUILTIN_BLENDVPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF)
-BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendvps256, "__builtin_ia32_blendvps256", IX86_BUILTIN_BLENDVPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF)
+BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin_ia32_blendvpd256", IX86_BUILTIN_BLENDVPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF)
+BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin_ia32_blendvps256", IX86_BUILTIN_BLENDVPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF)
 BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_dpps256, "__builtin_ia32_dpps256", IX86_BUILTIN_DPPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT)
 BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_shufpd256, "__builtin_ia32_shufpd256", IX86_BUILTIN_SHUFPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_INT)
 BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_shufps256, "__builtin_ia32_shufps256", IX86_BUILTIN_SHUFPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT)
@@ -1154,7 +1154,7 @@ BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_andv4di3, "__builtin_ia32_andsi256", IX
 BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_andnotv4di3, "__builtin_ia32_andnotsi256", IX86_BUILTIN_ANDNOT256I, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI)
 BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_uavgv32qi3, "__builtin_ia32_pavgb256",  IX86_BUILTIN_PAVGB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
 BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_uavgv16hi3, "__builtin_ia32_pavgw256",  IX86_BUILTIN_PAVGW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI)
-BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pblendvb, "__builtin_ia32_pblendvb256", IX86_BUILTIN_PBLENDVB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_V32QI)
+BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_nothing, "__builtin_ia32_pblendvb256", IX86_BUILTIN_PBLENDVB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_V32QI)
 BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_pblendw, "__builtin_ia32_pblendw256", IX86_BUILTIN_PBLENDVW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT)
 BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_nothing, "__builtin_ia32_pcmpeqb256", IX86_BUILTIN_PCMPEQB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI)
 BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_nothing, "__builtin_ia32_pcmpeqw256", IX86_BUILTIN_PCMPEQW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c71c9e6..a93128f 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -17983,6 +17983,43 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi)
 	}
       break;
 
+    case IX86_BUILTIN_PBLENDVB128:
+    case IX86_BUILTIN_PBLENDVB256:
+    case IX86_BUILTIN_BLENDVPS:
+    case IX86_BUILTIN_BLENDVPD:
+    case IX86_BUILTIN_BLENDVPS256:
+    case IX86_BUILTIN_BLENDVPD256:
+      gcc_assert (n_args == 3);
+      arg0 = gimple_call_arg (stmt, 0);
+      arg1 = gimple_call_arg (stmt, 1);
+      arg2 = gimple_call_arg (stmt, 2);
+      if (gimple_call_lhs (stmt))
+	{
+	  location_t loc = gimple_location (stmt);
+	  tree type = TREE_TYPE (arg2);
+	  gimple_seq stmts = NULL;
+	  if (VECTOR_FLOAT_TYPE_P (type))
+	    {
+	      tree itype = GET_MODE_INNER (TYPE_MODE (type)) == E_SFmode
+		? intSI_type_node : intDI_type_node;
+	      type = get_same_sized_vectype (itype, type);
+	      arg2 = gimple_build (&stmts, VIEW_CONVERT_EXPR, type, arg2);
+	    }
+	  tree zero_vec = build_zero_cst (type);
+	  tree cmp_type = truth_type_for (type);
+	  tree cmp = gimple_build (&stmts, LT_EXPR, cmp_type, arg2, zero_vec);
+	  gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);
+	  gimple *g = gimple_build_assign (gimple_call_lhs (stmt),
+					   VEC_COND_EXPR, cmp,
+					   arg1, arg0);
+	  gimple_set_location (g, loc);
+	  gsi_replace (gsi, g, false);
+	}
+      else
+	gsi_replace (gsi, gimple_build_nop (), false);
+      return true;
+
+
     case IX86_BUILTIN_PCMPEQB128:
     case IX86_BUILTIN_PCMPEQW128:
     case IX86_BUILTIN_PCMPEQD128:
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index e4f01e6..ffcc0c8 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -3048,6 +3048,68 @@
 	  UNSPEC_PCMP))]
   "operands[5] = GEN_INT (INTVAL (operands[5]) ^ 4);")
 
+(define_insn_and_split "*avx_cmp<mode>3_lt"
+ [(set (match_operand:VF_128_256  0 "register_operand")
+	(vec_merge:VF_128_256
+	  (match_operand:VF_128_256 1 "vector_operand")
+	  (match_operand:VF_128_256 2 "vector_operand")
+	  (unspec:<avx512fmaskmode>
+	    [(match_operand:<sseintvecmode> 3 "register_operand")
+	     (match_operand:<sseintvecmode> 4 "const0_operand")
+	     (match_operand:SI 5 "const_0_to_7_operand")]
+	     UNSPEC_PCMP)))]
+  "TARGET_AVX512VL && ix86_pre_reload_split ()
+  /* LT or GE 0 */
+  && ((INTVAL (operands[5]) == 1 && !MEM_P (operands[2]))
+      || (INTVAL (operands[5]) == 5 && !MEM_P (operands[1])))"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(unspec:VF_128_256
+	  [(match_dup 2)
+	   (match_dup 1)
+	   (lt:VF_128_256
+	     (match_dup 3)
+	     (match_dup 4))]
+	    UNSPEC_BLENDV))]
+{
+  if (INTVAL (operands[5]) == 5)
+    std::swap (operands[1], operands[2]);
+})
+
+(define_insn_and_split "*avx_cmp<mode>3_ltint"
+ [(set (match_operand:VI48_AVX  0 "register_operand")
+	(vec_merge:VI48_AVX
+	  (match_operand:VI48_AVX 1 "vector_operand")
+	  (match_operand:VI48_AVX 2 "vector_operand")
+	  (unspec:<avx512fmaskmode>
+	    [(match_operand:VI48_AVX 3 "register_operand")
+	     (match_operand:VI48_AVX 4 "const0_operand")
+	     (match_operand:SI 5 "const_0_to_7_operand")]
+	     UNSPEC_PCMP)))]
+  "TARGET_AVX512VL && ix86_pre_reload_split ()
+  /* LT or GE 0 */
+  && ((INTVAL (operands[5]) == 1 && !MEM_P (operands[2]))
+      || (INTVAL (operands[5]) == 5 && !MEM_P (operands[1])))"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(unspec:<ssebytemode>
+	  [(match_dup 2)
+	   (match_dup 1)
+	   (subreg:<ssebytemode>
+	     (lt:VI48_AVX
+	      (match_dup 3)
+	      (match_dup 4)) 0)]
+	    UNSPEC_BLENDV))]
+{
+  if (INTVAL (operands[5]) == 5)
+    std::swap (operands[1], operands[2]);
+  operands[0] = gen_lowpart (<ssebytemode>mode, operands[0]);
+  operands[1] = gen_lowpart (<ssebytemode>mode, operands[1]);
+  operands[2] = gen_lowpart (<ssebytemode>mode, operands[2]);
+})
+
 (define_insn "avx_vmcmp<mode>3"
   [(set (match_operand:VF_128 0 "register_operand" "=x")
 	(vec_merge:VF_128
@@ -13063,6 +13125,96 @@
   DONE;
 })
 
+(define_insn_and_split "*avx2_pcmp<mode>3_3"
+ [(set (match_operand:VI1_AVX2  0 "register_operand")
+	(vec_merge:VI1_AVX2
+	  (match_operand:VI1_AVX2 1 "vector_operand")
+	  (match_operand:VI1_AVX2 2 "vector_operand")
+	  (unspec:<avx512fmaskmode>
+	    [(match_operand:VI1_AVX2 3 "register_operand")
+	     (match_operand:VI1_AVX2 4 "const0_operand")
+	     (match_operand:SI 5 "const_0_to_7_operand")]
+	     UNSPEC_PCMP)))]
+  "TARGET_AVX512VL && ix86_pre_reload_split ()
+  /* LT or GE 0 */
+  && ((INTVAL (operands[5]) == 1 && !MEM_P (operands[2]))
+      || (INTVAL (operands[5]) == 5 && !MEM_P (operands[1])))"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(unspec:VI1_AVX2
+	  [(match_dup 2)
+	   (match_dup 1)
+	   (lt:VI1_AVX2
+	     (match_dup 3)
+	     (match_dup 4))]
+	     UNSPEC_BLENDV))]
+{
+  if (INTVAL (operands[5]) == 5)
+    std::swap (operands[1], operands[2]);
+})
+
+(define_insn_and_split "*avx2_pcmp<mode>3_4"
+ [(set (match_operand:VI1_AVX2  0 "register_operand")
+	(vec_merge:VI1_AVX2
+	  (match_operand:VI1_AVX2 1 "vector_operand")
+	  (match_operand:VI1_AVX2 2 "vector_operand")
+	  (unspec:<avx512fmaskmode>
+	    [(subreg:VI1_AVX2 (not (match_operand 3 "register_operand")) 0)
+	     (match_operand:VI1_AVX2 4 "const0_operand")
+	     (match_operand:SI 5 "const_0_to_7_operand")]
+	     UNSPEC_PCMP)))]
+  "TARGET_AVX512VL && ix86_pre_reload_split ()
+  && GET_MODE_CLASS (GET_MODE (operands[3])) == MODE_VECTOR_INT
+  && GET_MODE_SIZE (GET_MODE (operands[3])) == <MODE_SIZE>
+  /* LT or GE 0 */
+  && ((INTVAL (operands[5]) == 1 && !MEM_P (operands[1]))
+      || (INTVAL (operands[5]) == 5 && !MEM_P (operands[2])))"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(unspec:VI1_AVX2
+	  [(match_dup 1)
+	   (match_dup 2)
+	   (lt:VI1_AVX2
+	     (match_dup 3)
+	     (match_dup 4))]
+	     UNSPEC_BLENDV))]
+{
+  if (INTVAL (operands[5]) == 1)
+    std::swap (operands[1], operands[2]);
+  operands[3] = gen_lowpart (<MODE>mode, operands[3]);
+})
+
+(define_insn_and_split "*avx2_pcmp<mode>3_5"
+ [(set (match_operand:VI1_AVX2  0 "register_operand")
+	(vec_merge:VI1_AVX2
+	  (match_operand:VI1_AVX2 1 "vector_operand")
+	  (match_operand:VI1_AVX2 2 "vector_operand")
+	  (unspec:<avx512fmaskmode>
+	    [(not:VI1_AVX2 (match_operand:VI1_AVX2 3 "register_operand"))
+	     (match_operand:VI1_AVX2 4 "const0_operand")
+	     (match_operand:SI 5 "const_0_to_7_operand")]
+	     UNSPEC_PCMP)))]
+  "TARGET_AVX512VL && ix86_pre_reload_split ()
+  /* LT or GE 0 */
+  && ((INTVAL (operands[5]) == 1 && !MEM_P (operands[1]))
+      || (INTVAL (operands[5]) == 5 && !MEM_P (operands[2])))"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(unspec:VI1_AVX2
+	  [(match_dup 1)
+	   (match_dup 2)
+	   (lt:VI1_AVX2
+	     (match_dup 3)
+	     (match_dup 4))]
+	     UNSPEC_BLENDV))]
+{
+  if (INTVAL (operands[5]) == 1)
+    std::swap (operands[1], operands[2]);
+})
+
 (define_expand "<avx512>_eq<mode>3<mask_scalar_merge_name>"
   [(set (match_operand:<avx512fmaskmode> 0 "register_operand")
 	(unspec:<avx512fmaskmode>
@@ -17898,6 +18050,28 @@
    (set_attr "btver2_decode" "vector,vector,vector")
    (set_attr "mode" "<sseinsnmode>")])
 
+(define_insn_and_split "*<sse4_1_avx2>_pblendvb_lt_subreg_not"
+  [(set (match_operand:VI1_AVX2 0 "register_operand")
+	(unspec:VI1_AVX2
+	  [(match_operand:VI1_AVX2 2 "vector_operand")
+	   (match_operand:VI1_AVX2 1 "register_operand")
+	   (lt:VI1_AVX2
+	     (subreg:VI1_AVX2
+	       (not (match_operand 3 "register_operand")) 0)
+	     (match_operand:VI1_AVX2 4 "const0_operand"))]
+	  UNSPEC_BLENDV))]
+  "TARGET_SSE4_1
+   && GET_MODE_CLASS (GET_MODE (operands[3])) == MODE_VECTOR_INT
+   && GET_MODE_SIZE (GET_MODE (operands[3])) == <MODE_SIZE>
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(unspec:VI1_AVX2
+	 [(match_dup 1) (match_dup 2)
+	  (lt:VI1_AVX2 (match_dup 3) (match_dup 4))] UNSPEC_BLENDV))]
+  "operands[3] = gen_lowpart (<MODE>mode, operands[3]);")
+
 (define_insn "sse4_1_pblendw"
   [(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,x")
 	(vec_merge:V8HI
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index 4cd27e3..a497a7d 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-3.0-or-later
 /* Definitions of target machine for GNU compiler,
    for IBM RS/6000 POWER running AIX V7.2.
    Copyright (C) 2002-2021 Free Software Foundation, Inc.
@@ -124,7 +125,7 @@ do {									\
   %{mpe: -I%R/usr/lpp/ppe.poe/include}		\
   %{pthread: -D_THREAD_SAFE}"
 
-/* The GNU C++ standard library requires that these macros be 
+/* The GNU C++ standard library requires that these macros be
    defined.  Synchronize with libstdc++ os_defines.h.  */
 #define CPLUSPLUS_CPP_SPEC_COMMON		\
   "-D_ALL_SOURCE -D__COMPATMATH__		\
@@ -254,7 +255,7 @@ do {									\
 #define LD_INIT_SWITCH "-binitfini"
 
 #ifndef _AIX52
-extern long long int    atoll(const char *);  
+extern long long int    atoll(const char *);
 #endif
 
 /* This target uses the aix64.opt file.  */
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
new file mode 100644
index 0000000..c707c7e
--- /dev/null
+++ b/gcc/config/rs6000/aix73.h
@@ -0,0 +1,294 @@
+// SPDX-License-Identifier: GPL-3.0-or-later
+/* Definitions of target machine for GNU compiler,
+   for IBM RS/6000 POWER running AIX V7.3.
+   Copyright (C) 2002-2021 Free Software Foundation, Inc.
+   Contributed by David Edelsohn (edelsohn@gnu.org).
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+/* The macro SUBTARGET_OVERRIDE_OPTIONS is provided for subtargets, to
+   get control in TARGET_OPTION_OVERRIDE.  */
+
+#define SUBTARGET_OVERRIDE_OPTIONS					\
+do {									\
+  if (TARGET_64BIT && ! TARGET_POWERPC64)				\
+    {									\
+      rs6000_isa_flags |= OPTION_MASK_POWERPC64;			\
+      warning (0, "%<-maix64%> requires PowerPC64 architecture remain enabled"); \
+    }									\
+  if (TARGET_SOFT_FLOAT && TARGET_LONG_DOUBLE_128)			\
+    {									\
+      rs6000_long_double_type_size = 64;				\
+      if (global_options_set.x_rs6000_long_double_type_size)		\
+	warning (0, "soft-float and long-double-128 are incompatible");	\
+    }									\
+  if (TARGET_POWERPC64 && ! TARGET_64BIT)				\
+    {									\
+      error ("%<-maix64%> required: 64-bit computation with 32-bit addressing not yet supported"); \
+    }									\
+  if ((rs6000_isa_flags_explicit					\
+       & OPTION_MASK_MINIMAL_TOC) != 0)					\
+    {									\
+      if (global_options_set.x_rs6000_current_cmodel			\
+	  && rs6000_current_cmodel != CMODEL_SMALL)			\
+	error ("%<-mcmodel%> incompatible with other toc options"); 	\
+      SET_CMODEL (CMODEL_SMALL);					\
+    }									\
+  if (rs6000_current_cmodel != CMODEL_SMALL)				\
+    {									\
+      TARGET_NO_FP_IN_TOC = 1;						\
+      TARGET_NO_SUM_IN_TOC = 1;						\
+    }									\
+  if (rs6000_current_cmodel == CMODEL_MEDIUM)				\
+    {									\
+      rs6000_current_cmodel = CMODEL_LARGE;				\
+    }									\
+  if (! strcmp (lang_hooks.name, "GNU Go")				\
+      && TARGET_32BIT)							\
+    {									\
+      /* aix/ppc doesn't support -mvsx and -maltivec with Go */		\
+      rs6000_isa_flags &= ~(OPTION_MASK_VSX | OPTION_MASK_ALTIVEC);	\
+    }									\
+  if (!global_options_set.x_dwarf_version)				\
+    /* AIX only supports DWARF 4.  */					\
+    dwarf_version = 4;							\
+} while (0)
+
+#define ASM_SPEC32 "-a32"
+#define ASM_SPEC64 "-a64"
+#define ASM_SPEC_COMMON "-u %(asm_cpu)"
+
+/* Common ASM definitions used by ASM_SPEC amongst the various targets for
+   handling -mcpu=xxx switches.  There is a parallel list in driver-rs6000.c to
+   provide the default assembler options if the user uses -mcpu=native, so if
+   you make changes here, make them there also.  */
+#undef ASM_CPU_SPEC
+#define ASM_CPU_SPEC \
+"%{mcpu=native: %(asm_cpu_native); \
+  mcpu=power10: -mpwr10; \
+  mcpu=power9: -mpwr9; \
+  mcpu=power8: -mpwr8; \
+  mcpu=power7: -mpwr7; \
+  mcpu=power6x|mcpu=power6: -mpwr6; \
+  mcpu=power5+: -mpwr5x; \
+  mcpu=power5: -mpwr5; \
+  mcpu=power4: -mpwr4; \
+  mcpu=power3: -m620; \
+  mcpu=powerpc: -mppc; \
+  mcpu=rs64: -mppc; \
+  mcpu=603: -m603; \
+  mcpu=603e: -m603; \
+  mcpu=604: -m604; \
+  mcpu=604e: -m604; \
+  mcpu=620: -m620; \
+  mcpu=630: -m620; \
+  mcpu=970|mcpu=G5: -m970; \
+  !mcpu*: %(asm_default)} \
+-many"
+
+#undef	ASM_DEFAULT_SPEC
+#define ASM_DEFAULT_SPEC "-mpwr7"
+
+#undef TARGET_OS_CPP_BUILTINS
+#define TARGET_OS_CPP_BUILTINS()     \
+  do                                 \
+    {                                \
+      builtin_define ("_AIX43");     \
+      builtin_define ("_AIX51");     \
+      builtin_define ("_AIX52");     \
+      builtin_define ("_AIX53");     \
+      builtin_define ("_AIX61");     \
+      builtin_define ("_AIX71");     \
+      builtin_define ("_AIX72");     \
+      builtin_define ("_AIX73");     \
+      TARGET_OS_AIX_CPP_BUILTINS (); \
+    }                                \
+  while (0)
+
+#define CPP_SPEC32 ""
+#define CPP_SPEC64 "-D__64BIT__"
+#define CPP_SPEC_COMMON "%{posix: -D_POSIX_SOURCE} \
+  %{ansi: -D_ANSI_C_SOURCE}			\
+  %{mpe: -I%R/usr/lpp/ppe.poe/include}		\
+  %{pthread: -D_THREAD_SAFE}"
+
+/* The GNU C++ standard library requires that these macros be
+   defined.  Synchronize with libstdc++ os_defines.h.  */
+#define CPLUSPLUS_CPP_SPEC_COMMON		\
+  "-D_ALL_SOURCE -D__COMPATMATH__		\
+   %{mpe: -I%R/usr/lpp/ppe.poe/include}		\
+   %{pthread: -D_THREAD_SAFE}"
+
+#define RS6000_CPU(NAME, CPU, FLAGS)
+#include "rs6000-cpus.def"
+#undef RS6000_CPU
+
+#undef  TARGET_DEFAULT
+#ifdef RS6000_BI_ARCH
+#define TARGET_DEFAULT (ISA_2_6_MASKS_EMBEDDED | MASK_POWERPC64 | MASK_64BIT)
+#else
+#define TARGET_DEFAULT ISA_2_6_MASKS_EMBEDDED
+#endif
+
+#undef  PROCESSOR_DEFAULT
+#define PROCESSOR_DEFAULT PROCESSOR_POWER7
+#undef  PROCESSOR_DEFAULT64
+#define PROCESSOR_DEFAULT64 PROCESSOR_POWER7
+
+/* AIX 7.2 kernel and assembler have necessary support for Altivec and VSX.  */
+#undef OS_MISSING_ALTIVEC
+
+/* Define this macro as a C expression for the initializer of an
+   array of string to tell the driver program which options are
+   defaults for this target and thus do not need to be handled
+   specially when using `MULTILIB_OPTIONS'.
+
+   Do not define this macro if `MULTILIB_OPTIONS' is not defined in
+   the target makefile fragment or if none of the options listed in
+   `MULTILIB_OPTIONS' are set by default.  *Note Target Fragment::.  */
+
+#undef MULTILIB_DEFAULTS
+
+#define DEFAULT_ARCH64_P (TARGET_DEFAULT & MASK_64BIT)
+
+#define LIB_SPEC32 "%{!shared:%{g*:-lg}}"
+#define LIB_SPEC64 ""
+#define LIB_SPEC_COMMON "%{pg:-L%R/lib/profiled -L%R/usr/lib/profiled}\
+   %{p:-L%R/lib/profiled -L%R/usr/lib/profiled}\
+   %{fprofile-arcs|fprofile-generate*|coverage:-lpthreads}\
+   %{mpe:-L%R/usr/lpp/ppe.poe/lib -lmpi -lvtd}\
+   %{mlong-double-128:-lc128}\
+   %{pthread:-lpthreads} -lc"
+
+#define LINK_SPEC32 "%{!shared:%{g*: %(link_libg) }} -b32"
+#define LINK_SPEC64 "-b64"
+#define LINK_SPEC_COMMON "-bpT:0x10000000 -bpD:0x20000000 %{!r:-btextro}\
+   %{static:-bnso %(link_syscalls) } %{shared:-bM:SRE %{!e:-bnoentry}}\
+   %{mpe:-binitfini:poe_remote_main} "
+
+#undef STARTFILE_SPEC
+#if DEFAULT_ARCH64_P
+#define STARTFILE_SPEC "%{!shared:\
+   %{!maix32:%{pg:gcrt0_64%O%s;:%{p:mcrt0_64%O%s;:crt0_64%O%s}};:\
+     %{pthread:%{pg:gcrt0_r%O%s;:%{p:mcrt0_r%O%s;:crt0_r%O%s}};:\
+       %{pg:gcrt0%O%s;:%{p:mcrt0%O%s;:crt0%O%s}}}}}\
+   %{!maix32:%{shared:crtcxa_64_s%O%s;:crtcxa_64%O%s} crtdbase_64%O%s;:\
+     %{shared:crtcxa_s%O%s;:crtcxa%O%s} crtdbase%O%s}"
+#else
+#define STARTFILE_SPEC "%{!shared:\
+   %{maix64:%{pg:gcrt0_64%O%s;:%{p:mcrt0_64%O%s;:crt0_64%O%s}};:\
+     %{pthread:%{pg:gcrt0_r%O%s;:%{p:mcrt0_r%O%s;:crt0_r%O%s}};:\
+       %{pg:gcrt0%O%s;:%{p:mcrt0%O%s;:crt0%O%s}}}}}\
+   %{maix64:%{shared:crtcxa_64_s%O%s;:crtcxa_64%O%s} crtdbase_64%O%s;:\
+     %{shared:crtcxa_s%O%s;:crtcxa%O%s} crtdbase%O%s}"
+#endif
+
+
+#undef ASM_SPEC
+#undef CPP_SPEC
+#undef CPLUSPLUS_CPP_SPEC
+#undef LIB_SPEC
+#undef LINK_SPEC
+
+#if DEFAULT_ARCH64_P
+#define ASM_SPEC "%{maix32:%(asm_spec32);:%(asm_spec64)} %(asm_spec_common)"
+#define CPP_SPEC "%{maix32:%(cpp_spec32);:%(cpp_spec64)} %(cpp_spec_common)"
+#define CPLUSPLUS_CPP_SPEC "%{maix32:%(cpp_spec32);:%(cpp_spec64)} %(cplusplus_cpp_spec_common)"
+#define LIB_SPEC "%{maix32:%(lib_spec32);:%(lib_spec64)} %(lib_spec_common)"
+#define LINK_SPEC "%{maix32:%(link_spec32);:%(link_spec64)} %(link_spec_common)"
+#else
+#define ASM_SPEC "%{maix64:%(asm_spec64);:%(asm_spec32)} %(asm_spec_common)"
+#define CPP_SPEC "%{maix64:%(cpp_spec64);:%(cpp_spec32)} %(cpp_spec_common)"
+#define CPLUSPLUS_CPP_SPEC "%{maix64:%(cpp_spec64);:%(cpp_spec32)} %(cplusplus_cpp_spec_common)"
+#define LIB_SPEC "%{maix64:%(lib_spec64);:%(lib_spec32)} %(lib_spec_common)"
+#define LINK_SPEC "%{maix64:%(link_spec64);:%(link_spec32)} %(link_spec_common)"
+#endif
+
+#undef SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS					\
+  { "asm_spec_common",		ASM_SPEC_COMMON },		\
+  { "asm_spec32",		ASM_SPEC32 },			\
+  { "asm_spec64",		ASM_SPEC64 },			\
+  { "cpp_spec_common",		CPP_SPEC_COMMON },		\
+  { "cplusplus_cpp_spec_common", CPLUSPLUS_CPP_SPEC_COMMON },	\
+  { "cpp_spec32",		CPP_SPEC32 },			\
+  { "cpp_spec64",		CPP_SPEC64 },			\
+  { "lib_spec_common",		LIB_SPEC_COMMON },		\
+  { "lib_spec32",		LIB_SPEC32 },			\
+  { "lib_spec64",		LIB_SPEC64 },			\
+  { "link_spec_common",		LINK_SPEC_COMMON },		\
+  { "link_spec32",		LINK_SPEC32 },			\
+  { "link_spec64",		LINK_SPEC64 },
+
+/* AIX V5 typedefs ptrdiff_t as "long" while earlier releases used "int".  */
+
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "long int"
+
+/* Type used for wchar_t, as a string used in a declaration.  */
+#undef  WCHAR_TYPE
+#define WCHAR_TYPE (!TARGET_64BIT ? "short unsigned int" : "unsigned int")
+
+/* Width of wchar_t in bits.  */
+#undef  WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE (!TARGET_64BIT ? 16 : 32)
+
+/* AIX 4.2 and above provides initialization and finalization function
+   support from linker command line.  */
+#undef HAS_INIT_SECTION
+#define HAS_INIT_SECTION
+
+#undef LD_INIT_SWITCH
+#define LD_INIT_SWITCH "-binitfini"
+
+#ifndef _AIX52
+extern long long int    atoll(const char *);
+#endif
+
+/* This target uses the aix64.opt file.  */
+#define TARGET_USES_AIX64_OPT 1
+
+/* Large TOC Support */
+#ifdef HAVE_LD_LARGE_TOC
+#undef TARGET_CMODEL
+#define TARGET_CMODEL rs6000_current_cmodel
+#define SET_CMODEL(opt) rs6000_current_cmodel = opt
+#else
+#define SET_CMODEL(opt) do {} while (0)
+#endif
+
+/* This target defines SUPPORTS_WEAK and TARGET_ASM_NAMED_SECTION,
+   but does not have crtbegin/end.  */
+
+#define TARGET_AIX_VERSION 72
+
+/* AIX 7.2 supports DWARF3+ debugging.  */
+#define DWARF2_DEBUGGING_INFO 1
+#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
+#define DEBUG_INFO_SECTION	"0x10000"
+#define DEBUG_LINE_SECTION	"0x20000"
+#define DEBUG_PUBNAMES_SECTION	"0x30000"
+#define DEBUG_PUBTYPES_SECTION	"0x40000"
+#define DEBUG_ARANGES_SECTION	"0x50000"
+#define DEBUG_ABBREV_SECTION	"0x60000"
+#define DEBUG_STR_SECTION	"0x70000"
+#define DEBUG_RANGES_SECTION	"0x80000"
+#define DEBUG_LOC_SECTION	"0x90000"
+#define DEBUG_FRAME_SECTION	"0xA0000"
+#define DEBUG_MACINFO_SECTION	"0xB0000"
+#define DEBUG_MACRO_SECTION	"0xB0000"
+
diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c
index e0e5005..4978faf 100644
--- a/gcc/config/v850/v850.c
+++ b/gcc/config/v850/v850.c
@@ -2583,7 +2583,7 @@ construct_dispose_instruction (rtx op)
   int                stack_bytes;
   unsigned long int  mask;
   int		     i;
-  static char        buff[ 100 ]; /* XXX */
+  static char        buff[ 120 ]; /* XXX */
   int                use_callt = 0;
   
   if (count <= 2)
@@ -2704,7 +2704,7 @@ construct_prepare_instruction (rtx op)
   int                stack_bytes;
   unsigned long int  mask;
   int		     i;
-  static char        buff[ 100 ]; /* XXX */
+  static char        buff[ 120 ]; /* XXX */
   int		     use_callt = 0;
   
   if (XVECLEN (op, 0) <= 1)
@@ -3140,6 +3140,11 @@ v850_option_override (void)
   /* The RH850 ABI does not (currently) support the use of the CALLT instruction.  */
   if (! TARGET_GCC_ABI)
     target_flags |= MASK_DISABLE_CALLT;
+
+  /* Save the initial options in case the user does function specific
+     options.  */
+  target_option_default_node = target_option_current_node
+    = build_target_option_node (&global_options, &global_options_set);
 }
 
 const char *
@@ -3192,6 +3197,29 @@ v850_modes_tieable_p (machine_mode mode1, machine_mode mode2)
   return (mode1 == mode2
 	  || (GET_MODE_SIZE (mode1) <= 4 && GET_MODE_SIZE (mode2) <= 4));
 }
+
+static bool
+v850_can_inline_p (tree caller, tree callee)
+{
+  tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller);
+  tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee);
+
+  const unsigned HOST_WIDE_INT safe_flags = MASK_PROLOG_FUNCTION;
+
+  if (!callee_tree)
+    callee_tree = target_option_default_node;
+  if (!caller_tree)
+    caller_tree = target_option_default_node;
+  if (callee_tree == caller_tree)
+    return true;
+
+  cl_target_option *caller_opts = TREE_TARGET_OPTION (caller_tree);
+  cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree);
+
+  return ((caller_opts->x_target_flags & ~safe_flags)
+	  == (callee_opts->x_target_flags & ~safe_flags));
+}
+
 
 /* Initialize the GCC target structure.  */
 
@@ -3306,6 +3334,10 @@ v850_modes_tieable_p (machine_mode mode1, machine_mode mode2)
 #undef  TARGET_HAVE_SPECULATION_SAFE_VALUE
 #define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
 
+#undef TARGET_CAN_INLINE_P
+#define TARGET_CAN_INLINE_P v850_can_inline_p
+
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-v850.h"
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 770d327..3791ac4 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,79 @@
+2021-06-26  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/96204
+	* pt.c (instantiate_class_template_1): Enter the scope of the
+	type when calling most_specialized_partial_spec.
+
+2021-06-26  Jason Merrill  <jason@redhat.com>
+
+	PR c++/101040
+	PR c++/97566
+	* class.c (is_empty_field): Handle null argument.
+	* constexpr.c (cxx_eval_bare_aggregate): Discard initializer
+	for empty field.
+
+2021-06-26  Marek Polacek  <polacek@redhat.com>
+
+	PR c++/100752
+	* parser.c (cp_parser_declarator): Pass flags down to
+	cp_parser_declarator.  Also pass static_p/member_p.
+
+2021-06-25  Martin Sebor  <msebor@redhat.com>
+
+	* call.c (build_over_call): Replace direct uses of TREE_NO_WARNING
+	with warning_suppressed_p, suppress_warning, and copy_no_warning, or
+	nothing if not necessary.
+	(set_up_extended_ref_temp): Same.
+	* class.c (layout_class_type): Same.
+	* constraint.cc (constraint_satisfaction_value): Same.
+	* coroutines.cc (finish_co_await_expr): Same.
+	(finish_co_yield_expr): Same.
+	(finish_co_return_stmt): Same.
+	(build_actor_fn): Same.
+	(coro_rewrite_function_body): Same.
+	(morph_fn_to_coro): Same.
+	* cp-gimplify.c (genericize_eh_spec_block): Same.
+	(gimplify_expr_stmt): Same.
+	(cp_genericize_r): Same.
+	(cp_fold): Same.
+	* cp-ubsan.c (cp_ubsan_instrument_vptr): Same.
+	* cvt.c (cp_fold_convert): Same.
+	(convert_to_void): Same.
+	* decl.c (wrapup_namespace_globals): Same.
+	(grokdeclarator): Same.
+	(finish_function): Same.
+	(require_deduced_type): Same.
+	* decl2.c (no_linkage_error): Same.
+	(c_parse_final_cleanups): Same.
+	* except.c (expand_end_catch_block): Same.
+	* init.c (build_new_1): Same.
+	(build_new): Same.
+	(build_vec_delete_1): Same.
+	(build_vec_init): Same.
+	(build_delete): Same.
+	* method.c (defaultable_fn_check): Same.
+	* parser.c (cp_parser_fold_expression): Same.
+	(cp_parser_primary_expression): Same.
+	* pt.c (push_tinst_level_loc): Same.
+	(tsubst_copy): Same.
+	(tsubst_omp_udr): Same.
+	(tsubst_copy_and_build): Same.
+	* rtti.c (build_if_nonnull): Same.
+	* semantics.c (maybe_convert_cond): Same.
+	(finish_return_stmt): Same.
+	(finish_parenthesized_expr): Same.
+	(cp_check_omp_declare_reduction): Same.
+	* tree.c (build_cplus_array_type): Same.
+	* typeck.c (build_ptrmemfunc_access_expr): Same.
+	(cp_build_indirect_ref_1): Same.
+	(cp_build_function_call_vec): Same.
+	(warn_for_null_address): Same.
+	(cp_build_binary_op): Same.
+	(unary_complex_lvalue): Same.
+	(cp_build_modify_expr): Same.
+	(build_x_modify_expr): Same.
+	(convert_for_assignment): Same.
+
 2021-06-24  Patrick Palka  <ppalka@redhat.com>
 
 	PR c++/98832
diff --git a/gcc/cp/class.c b/gcc/cp/class.c
index c89ffad..33093e1 100644
--- a/gcc/cp/class.c
+++ b/gcc/cp/class.c
@@ -4220,7 +4220,7 @@ field_poverlapping_p (tree decl)
 bool
 is_empty_field (tree decl)
 {
-  if (TREE_CODE (decl) != FIELD_DECL)
+  if (!decl || TREE_CODE (decl) != FIELD_DECL)
     return false;
 
   bool r = (is_empty_class (TREE_TYPE (decl))
diff --git a/gcc/cp/constexpr.c b/gcc/cp/constexpr.c
index a26aead..4cd9db3 100644
--- a/gcc/cp/constexpr.c
+++ b/gcc/cp/constexpr.c
@@ -4449,7 +4449,12 @@ cxx_eval_bare_aggregate (const constexpr_ctx *ctx, tree t,
   FOR_EACH_CONSTRUCTOR_ELT (v, i, index, value)
     {
       tree orig_value = value;
-      init_subob_ctx (ctx, new_ctx, index, value);
+      /* Like in cxx_eval_store_expression, omit entries for empty fields.  */
+      bool no_slot = TREE_CODE (type) == RECORD_TYPE && is_empty_field (index);
+      if (no_slot)
+	new_ctx = *ctx;
+      else
+	init_subob_ctx (ctx, new_ctx, index, value);
       int pos_hint = -1;
       if (new_ctx.ctor != ctx->ctor)
 	{
@@ -4495,6 +4500,8 @@ cxx_eval_bare_aggregate (const constexpr_ctx *ctx, tree t,
 	  gcc_assert (is_empty_class (TREE_TYPE (TREE_TYPE (index))));
 	  changed = true;
 	}
+      else if (no_slot)
+	changed = true;
       else
 	{
 	  if (TREE_CODE (type) == UNION_TYPE
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index 096580e..02daa7a 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -22170,12 +22170,10 @@ cp_parser_declarator (cp_parser* parser,
 	cp_parser_parse_tentatively (parser);
 
       /* Parse the dependent declarator.  */
-      declarator = cp_parser_declarator (parser, dcl_kind,
-					 CP_PARSER_FLAGS_NONE,
+      declarator = cp_parser_declarator (parser, dcl_kind, flags,
 					 /*ctor_dtor_or_conv_p=*/NULL,
 					 /*parenthesized_p=*/NULL,
-					 /*member_p=*/false,
-					 friend_p, /*static_p=*/false);
+					 member_p, friend_p, static_p);
 
       /* If we are parsing an abstract-declarator, we must handle the
 	 case where the dependent declarator is absent.  */
diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c
index e5a2a2c..f2039e0 100644
--- a/gcc/cp/pt.c
+++ b/gcc/cp/pt.c
@@ -11769,8 +11769,11 @@ instantiate_class_template_1 (tree type)
   deferring_access_check_sentinel acs (dk_no_deferred);
 
   /* Determine what specialization of the original template to
-     instantiate.  */
+     instantiate; do this relative to the scope of the class for
+     sake of access checking.  */
+  push_nested_class (type);
   t = most_specialized_partial_spec (type, tf_warning_or_error);
+  pop_nested_class ();
   if (t == error_mark_node)
     return error_mark_node;
   else if (t)
diff --git a/gcc/except.c b/gcc/except.c
index d481a5e..8e905a3 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -136,7 +136,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "except.h"
 #include "output.h"
 #include "dwarf2asm.h"
-#include "dwarf2out.h"
+#include "dwarf2.h"
 #include "common/common-target.h"
 #include "langhooks.h"
 #include "cfgrtl.h"
diff --git a/gcc/fold-const.c b/gcc/fold-const.c
index 3aafbc9..dfccbae 100644
--- a/gcc/fold-const.c
+++ b/gcc/fold-const.c
@@ -126,7 +126,8 @@ static tree range_binop (enum tree_code, tree, tree, int, tree, int);
 static tree range_predecessor (tree);
 static tree range_successor (tree);
 static tree fold_range_test (location_t, enum tree_code, tree, tree, tree);
-static tree fold_cond_expr_with_comparison (location_t, tree, tree, tree, tree);
+static tree fold_cond_expr_with_comparison (location_t, tree, enum tree_code,
+					    tree, tree, tree, tree);
 static tree unextend (tree, int, int, tree);
 static tree extract_muldiv (tree, tree, enum tree_code, tree, bool *);
 static tree extract_muldiv_1 (tree, tree, enum tree_code, tree, bool *);
@@ -5734,20 +5735,19 @@ merge_ranges (int *pin_p, tree *plow, tree *phigh, int in0_p, tree low0,
 
 
 /* Subroutine of fold, looking inside expressions of the form
-   A op B ? A : C, where ARG0, ARG1 and ARG2 are the three operands
-   of the COND_EXPR.  This function is being used also to optimize
-   A op B ? C : A, by reversing the comparison first.
+   A op B ? A : C, where (ARG00, COMP_CODE, ARG01), ARG1 and ARG2
+   are the three operands of the COND_EXPR.  This function is
+   being used also to optimize A op B ? C : A, by reversing the
+   comparison first.
 
    Return a folded expression whose code is not a COND_EXPR
    anymore, or NULL_TREE if no folding opportunity is found.  */
 
 static tree
 fold_cond_expr_with_comparison (location_t loc, tree type,
-				tree arg0, tree arg1, tree arg2)
+				enum tree_code comp_code,
+				tree arg00, tree arg01, tree arg1, tree arg2)
 {
-  enum tree_code comp_code = TREE_CODE (arg0);
-  tree arg00 = TREE_OPERAND (arg0, 0);
-  tree arg01 = TREE_OPERAND (arg0, 1);
   tree arg1_type = TREE_TYPE (arg1);
   tree tem;
 
@@ -12821,7 +12821,10 @@ fold_ternary_loc (location_t loc, enum tree_code code, tree type,
 	  && operand_equal_for_comparison_p (TREE_OPERAND (arg0, 0), op1)
 	  && !HONOR_SIGNED_ZEROS (element_mode (op1)))
 	{
-	  tem = fold_cond_expr_with_comparison (loc, type, arg0, op1, op2);
+	  tem = fold_cond_expr_with_comparison (loc, type, TREE_CODE (arg0),
+						TREE_OPERAND (arg0, 0),
+						TREE_OPERAND (arg0, 1),
+						op1, op2);
 	  if (tem)
 	    return tem;
 	}
@@ -12830,14 +12833,17 @@ fold_ternary_loc (location_t loc, enum tree_code code, tree type,
 	  && operand_equal_for_comparison_p (TREE_OPERAND (arg0, 0), op2)
 	  && !HONOR_SIGNED_ZEROS (element_mode (op2)))
 	{
-	  location_t loc0 = expr_location_or (arg0, loc);
-	  tem = fold_invert_truthvalue (loc0, arg0);
-	  if (tem && COMPARISON_CLASS_P (tem))
-	    {
-	      tem = fold_cond_expr_with_comparison (loc, type, tem, op2, op1);
-	      if (tem)
-		return tem;
-	    }
+	  enum tree_code comp_code = TREE_CODE (arg0);
+	  tree arg00 = TREE_OPERAND (arg0, 0);
+	  tree arg01 = TREE_OPERAND (arg0, 1);
+	  comp_code = invert_tree_comparison (comp_code, HONOR_NANS (arg00));
+	  if (comp_code != ERROR_MARK)
+	    tem = fold_cond_expr_with_comparison (loc, type, comp_code,
+						  arg00,
+						  arg01,
+						  op2, op1);
+	  if (tem)
+	    return tem;
 	}
 
       /* If the second operand is simpler than the third, swap them
diff --git a/gcc/genmatch.c b/gcc/genmatch.c
index 4d47672..970a2eb 100644
--- a/gcc/genmatch.c
+++ b/gcc/genmatch.c
@@ -1306,6 +1306,7 @@ lower_cond (simplify *s, vec<simplify *>& simplifiers)
     {
       simplify *ns = new simplify (s->kind, s->id, matchers[i], s->result,
 				   s->for_vec, s->capture_ids);
+      ns->for_subst_vec.safe_splice (s->for_subst_vec);
       simplifiers.safe_push (ns);
     }
 }
@@ -1543,24 +1544,27 @@ static void
 lower (vec<simplify *>& simplifiers, bool gimple)
 {
   auto_vec<simplify *> out_simplifiers;
-  for (unsigned i = 0; i < simplifiers.length (); ++i)
-    lower_opt (simplifiers[i], out_simplifiers);
+  for (auto s: simplifiers)
+    lower_opt (s, out_simplifiers);
 
   simplifiers.truncate (0);
-  for (unsigned i = 0; i < out_simplifiers.length (); ++i)
-    lower_commutative (out_simplifiers[i], simplifiers);
+  for (auto s: out_simplifiers)
+    lower_commutative (s, simplifiers);
 
+  /* Lower for needs to happen before lowering cond
+     to support (for cnd (cond vec_cond)).  This is
+     safe as substitution delay does not happen for
+     cond or vec_cond. */
   out_simplifiers.truncate (0);
-  if (gimple)
-    for (unsigned i = 0; i < simplifiers.length (); ++i)
-      lower_cond (simplifiers[i], out_simplifiers);
-  else
-    out_simplifiers.safe_splice (simplifiers);
-
+  for (auto s: simplifiers)
+    lower_for (s, out_simplifiers);
 
   simplifiers.truncate (0);
-  for (unsigned i = 0; i < out_simplifiers.length (); ++i)
-    lower_for (out_simplifiers[i], simplifiers);
+  if (gimple)
+    for (auto s: out_simplifiers)
+      lower_cond (s, simplifiers);
+  else
+    simplifiers.safe_splice (out_simplifiers);
 }
 
 
diff --git a/gcc/gimple-loop-interchange.cc b/gcc/gimple-loop-interchange.cc
index 80f749b..43045c54 100644
--- a/gcc/gimple-loop-interchange.cc
+++ b/gcc/gimple-loop-interchange.cc
@@ -1043,8 +1043,8 @@ tree_loop_interchange::valid_data_dependences (unsigned i_idx, unsigned o_idx,
 	    continue;
 
 	  /* Be conservative, skip case if either direction at i_idx/o_idx
-	     levels is not '=' or '<'.  */
-	  if (dist_vect[i_idx] < 0 || dist_vect[o_idx] < 0)
+	     levels is not '=' (for the inner loop) or '<'.  */
+	  if (dist_vect[i_idx] < 0 || dist_vect[o_idx] <= 0)
 	    return false;
 	}
     }
diff --git a/gcc/gimple-walk.c b/gcc/gimple-walk.c
index e4a55f1..18884c4 100644
--- a/gcc/gimple-walk.c
+++ b/gcc/gimple-walk.c
@@ -517,6 +517,30 @@ walk_gimple_op (gimple *stmt, walk_tree_fn callback_op,
     case GIMPLE_PREDICT:
       break;
 
+    case GIMPLE_PHI:
+      /* PHIs are not GSS_WITH_OPS so we need to handle them explicitely.  */
+      {
+	gphi *phi = as_a <gphi *> (stmt);
+	if (wi)
+	  {
+	    wi->val_only = true;
+	    wi->is_lhs = true;
+	  }
+	ret = walk_tree (gimple_phi_result_ptr (phi), callback_op, wi, pset);
+	if (wi)
+	  wi->is_lhs = false;
+	if (ret)
+	  return ret;
+	for (unsigned i = 0; i < gimple_phi_num_args (phi); ++i)
+	  {
+	    ret = walk_tree (gimple_phi_arg_def_ptr (phi, i),
+			     callback_op, wi, pset);
+	    if (ret)
+	      return ret;
+	  }
+	break;
+      }
+
     default:
       {
 	enum gimple_statement_structure_enum gss;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6895330..241fec5 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,58 @@
+2021-06-27  Andrew Pinski  <apinski@marvell.com>
+
+	* gcc.dg/torture/pr101230-1.c: New test.
+
+2021-06-26  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/96204
+	* g++.dg/template/access40.C: New test.
+	* g++.dg/template/access40a.C: New test.
+
+2021-06-26  Jason Merrill  <jason@redhat.com>
+
+	PR c++/101040
+	PR c++/97566
+	* g++.dg/cpp2a/no_unique_address13.C: New test.
+
+2021-06-26  Marek Polacek  <polacek@redhat.com>
+
+	PR c++/100752
+	* g++.dg/cpp0x/noexcept69.C: New test.
+	* g++.dg/parse/saved1.C: Adjust dg-error.
+	* g++.dg/template/crash50.C: Likewise.
+
+2021-06-25  David Malcolm  <dmalcolm@redhat.com>
+
+	* jit.dg/test-vector-rvalues.cc (check_div): Add specialization
+	for v4f, to avoid relying on exact floating-point equality.
+	* jit.dg/test-vector-types.cc (check_div): Likewise.
+
+2021-06-25  David Malcolm  <dmalcolm@redhat.com>
+
+	* jit.dg/test-asm.c: Remove i?86-*-* from target specifier.
+	* jit.dg/test-asm.cc: Likewise.
+
+2021-06-25  Martin Sebor  <msebor@redhat.com>
+
+	PR middle-end/101216
+	* gcc.dg/Wnonnull-7.c: New test.
+
+2021-06-25  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/101202
+	* gcc.dg/torture/pr101202.c: New testcase.
+
+2021-06-25  Xi Ruoyao  <xry111@mengyan1223.wang>
+
+	* g++.dg/no-stack-protector-attr-3.C (dg-final): Adjust for MIPS.
+
+2021-06-25  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/101185
+	* gcc.target/i386/bitwise_mask_op-3.c: Add xfail to
+	temporarily avoid regression, eventually xfail should be
+	removed.
+
 2021-06-24  Andrew MacLeod  <amacleod@redhat.com>
 
 	* gcc.dg/tree-ssa/evrp30.c: New.
diff --git a/gcc/testsuite/g++.dg/cpp0x/noexcept69.C b/gcc/testsuite/g++.dg/cpp0x/noexcept69.C
new file mode 100644
index 0000000..9b87ba0
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/noexcept69.C
@@ -0,0 +1,12 @@
+// PR c++/100752
+// { dg-do compile { target c++11 } }
+
+struct S {
+  void f() noexcept {}
+  S &g() noexcept(noexcept(f())) { f(); return *this; }
+};
+
+struct X {
+  int& f() noexcept(noexcept(i));
+  int i;
+};
diff --git a/gcc/testsuite/g++.dg/cpp2a/no_unique_address13.C b/gcc/testsuite/g++.dg/cpp2a/no_unique_address13.C
new file mode 100644
index 0000000..66b83d6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp2a/no_unique_address13.C
@@ -0,0 +1,24 @@
+// PR c++/101040
+// { dg-do compile { target c++11 } }
+
+// This class has to be empty.
+struct empty
+{};
+
+// This class has to be empty.
+struct single
+{
+    // This member has to be no_unique_address.
+    [[no_unique_address]] empty obj;
+};
+
+// This class has to be empty and derived from single.
+struct derived : single
+{
+    // This constructor has to be constexpr and take a forwarding reference.
+    template <typename Arg>
+    constexpr derived(Arg&& arg) : single{arg}
+    {}
+};
+
+auto obj = derived{empty{}};
diff --git a/gcc/testsuite/g++.dg/parse/saved1.C b/gcc/testsuite/g++.dg/parse/saved1.C
index 979a056..1deaa93 100644
--- a/gcc/testsuite/g++.dg/parse/saved1.C
+++ b/gcc/testsuite/g++.dg/parse/saved1.C
@@ -1,7 +1,7 @@
 // Test that the parser doesn't go into an infinite loop from ignoring the
 // PRE_PARSED_FUNCTION_DECL token.
 
-class C { static void* operator new(size_t); }; // { dg-error "24:declaration of .operator new. as non-function" }
-// { dg-error "expected|ISO C\\+\\+ forbids" "" { target *-*-* } .-1 }
+class C { static void* operator new(size_t); }; // { dg-error "37:.size_t. has not been declared" }
+// { dg-error ".operator new. takes type .size_t." "" { target *-*-* } .-1 }
 void* C::operator new(size_t) { return 0; } // { dg-error "" }
 class D { D(int i): integer(i){}}; // { dg-error "" }
diff --git a/gcc/testsuite/g++.dg/template/access40.C b/gcc/testsuite/g++.dg/template/access40.C
new file mode 100644
index 0000000..d035e99
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/access40.C
@@ -0,0 +1,28 @@
+// PR c++/96204
+
+template<class, class = void>
+struct has_type_member {
+  static const bool value = false;
+};
+
+template<class T>
+struct has_type_member<T, typename T::type> {
+  static const bool value = true;
+};
+
+struct Parent;
+
+struct Child {
+private:
+  friend struct Parent;
+  typedef void type;
+};
+
+struct Parent {
+  static void f() {
+    // The partial specialization does not match despite Child::type
+    // being accessible from the current scope.
+    extern int x[1];
+    extern int x[!has_type_member<Child>::value];
+  }
+};
diff --git a/gcc/testsuite/g++.dg/template/access40a.C b/gcc/testsuite/g++.dg/template/access40a.C
new file mode 100644
index 0000000..94025c5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/access40a.C
@@ -0,0 +1,28 @@
+// PR c++/96204
+
+template<class, class = void>
+struct has_type_member {
+  static const bool value = false;
+};
+
+template<class T>
+struct has_type_member<T, typename T::type> {
+  static const bool value = true;
+};
+
+struct Parent;
+
+struct Child {
+private:
+  friend struct has_type_member<Child>;
+  typedef void type;
+};
+
+struct Parent {
+  static void f() {
+    // The partial specialization matches because has_type_member<Child>
+    // is a friend of Child.
+    extern int x[1];
+    extern int x[has_type_member<Child>::value];
+  }
+};
diff --git a/gcc/testsuite/g++.dg/template/crash50.C b/gcc/testsuite/g++.dg/template/crash50.C
index 286685a..4b846cd 100644
--- a/gcc/testsuite/g++.dg/template/crash50.C
+++ b/gcc/testsuite/g++.dg/template/crash50.C
@@ -3,5 +3,5 @@
 
 struct A
 {
-  template<int> void* foo(; // { dg-error "primary-expression|initialization|static|template" }
+  template<int> void* foo(; // { dg-error "expected|initialization|static|template" }
 };
diff --git a/gcc/testsuite/g++.target/i386/avx2-pr54700-2.C b/gcc/testsuite/g++.target/i386/avx2-pr54700-2.C
index c9054e5..e7a85c3 100644
--- a/gcc/testsuite/g++.target/i386/avx2-pr54700-2.C
+++ b/gcc/testsuite/g++.target/i386/avx2-pr54700-2.C
@@ -2,9 +2,15 @@
 /* { dg-do run { target avx2 } } */
 /* { dg-options "-O2 -std=c++14 -mavx2 -mno-xop -mno-avx512f" } */
 
-#include "avx2-check.h"
+#ifndef CHECK_H
+#define CHECK_H "avx2-check.h"
+#endif
 
+#ifndef TEST
 #define TEST avx2_test
+#endif
+
+#include CHECK_H
 
 #include "avx2-pr54700-1.C"
 
diff --git a/gcc/testsuite/g++.target/i386/avx512vl-pr54700-1a.C b/gcc/testsuite/g++.target/i386/avx512vl-pr54700-1a.C
new file mode 100644
index 0000000..fedc3aa
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/avx512vl-pr54700-1a.C
@@ -0,0 +1,9 @@
+/* PR target/100648 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -std=c++14 -mavx2 -mno-xop -mavx512vl -mavx512bw" } */
+/* { dg-final { scan-assembler-not "vpcmpgt\[bdq]" } } */
+/* { dg-final { scan-assembler-times "vpblendvb" 2 } } */
+/* { dg-final { scan-assembler-times "vblendvps" 4 } } */
+/* { dg-final { scan-assembler-times "vblendvpd" 4 } } */
+
+#include "avx2-pr54700-1.C"
diff --git a/gcc/testsuite/g++.target/i386/avx512vl-pr54700-1b.C b/gcc/testsuite/g++.target/i386/avx512vl-pr54700-1b.C
new file mode 100644
index 0000000..03f9343
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/avx512vl-pr54700-1b.C
@@ -0,0 +1,9 @@
+/* PR target/100648 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -std=c++14 -mavx512vl -mavx512bw -mno-xop" } */
+/* { dg-final { scan-assembler-not "pcmpgt\[bdq]" } } */
+/* { dg-final { scan-assembler-times "pblendvb" 2 } } */
+/* { dg-final { scan-assembler-times "blendvps" 4 } } */
+/* { dg-final { scan-assembler-times "blendvpd" 4 } } */
+
+#include "sse4_1-pr54700-1.C"
diff --git a/gcc/testsuite/g++.target/i386/avx512vl-pr54700-2a.C b/gcc/testsuite/g++.target/i386/avx512vl-pr54700-2a.C
new file mode 100644
index 0000000..687a8c4
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/avx512vl-pr54700-2a.C
@@ -0,0 +1,17 @@
+/* PR target/100648  */
+/* { dg-do run { target avx2 } } */
+/* { dg-options "-O2 -std=c++14 -mavx2 -mavx512vl -mavx512bw" } */
+
+#ifndef CHECK_H
+#define CHECK_H "avx512f-helper.h"
+#endif
+
+#ifndef TEST
+#define TEST_test_256
+#endif
+
+#include CHECK_H
+#include "avx2-pr54700-2.C"
+
+#define AVX512VL
+#define AVX512BW
diff --git a/gcc/testsuite/g++.target/i386/avx512vl-pr54700-2b.C b/gcc/testsuite/g++.target/i386/avx512vl-pr54700-2b.C
new file mode 100644
index 0000000..40450a9
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/avx512vl-pr54700-2b.C
@@ -0,0 +1,17 @@
+/* PR target/pr100648 */
+/* { dg-do run { target sse4 } } */
+/* { dg-options "-O2 -std=c++14 -msse4 -mavx512vl -mavx512bw -mno-xop" } */
+
+#ifndef CHECK_H
+#define CHECK_H "avx512f-helper.h"
+#endif
+
+#ifndef TEST
+#define TEST_test_128
+#endif
+
+#include CHECK_H
+#include "sse4_1-pr54700-2.C"
+
+#define AVX512VL
+#define AVX512BW
diff --git a/gcc/testsuite/gcc.dg/Wnonnull-7.c b/gcc/testsuite/gcc.dg/Wnonnull-7.c
new file mode 100644
index 0000000..e7b331a
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/Wnonnull-7.c
@@ -0,0 +1,15 @@
+/* PR middle-end/101216 - spurious notes for function calls
+   { dg-do compile }
+   { dg-options "-O2 -w" } */
+
+__attribute__ ((access (write_only, 1, 2))) char*
+getcwd (char *, __SIZE_TYPE__);
+
+char* f (void)
+{
+  char a[8];
+  return getcwd (0, 8);
+}
+
+/* Expect no messages of any kind on output.
+   { dg-bogus "" "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.dg/torture/pr101173.c b/gcc/testsuite/gcc.dg/torture/pr101173.c
new file mode 100644
index 0000000..0c9090d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr101173.c
@@ -0,0 +1,18 @@
+/* { dg-do run } */
+/* { dg-additional-options "-floop-interchange" } */
+
+int a[6][9];
+int main()
+{
+  a[1][3] = 8;
+  for (int b = 1; b <= 5; b++)
+    for (int d = 0; d <= 5; d++)
+#pragma GCC unroll 0
+      for (int c = 0; c <= 5; c++)
+        a[b][c] = a[b][c + 2] & 216;
+  for (int e = 0; e < 6; e++)
+    for (int f = 0; f < 9; f++)
+      if (a[e][f] != 0)
+        __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr101202.c b/gcc/testsuite/gcc.dg/torture/pr101202.c
new file mode 100644
index 0000000..e76c908
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr101202.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-ftree-vectorize" } */
+
+int printf(const char *, ...);
+unsigned a, b, d;
+int c, e, f;
+int main()
+{
+  while (a)
+    if (b)
+      {
+	f = a;
+	while (e)
+	  {
+	    int h, i;
+	    if (d)
+	      {
+		h = a;
+		i = d;
+L:
+		d = a | d && c;
+		if (a)
+		  {
+		    printf("%d", a);
+		    goto L;
+		  }
+	      }
+	    a = h;
+	    d = i;
+	  }
+      }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr101229.c b/gcc/testsuite/gcc.dg/torture/pr101229.c
new file mode 100644
index 0000000..3708031
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr101229.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+
+int a[1024];
+void foo()
+{
+  for (int i; i; i += 4) {
+    int suma = a[i];
+    int sumb = a[i + 1];
+    int sumc;
+    for (unsigned j = 0; j < 77; ++j) {
+      suma = (suma ^ i) + 1;
+      sumb = (sumb ^ i) + 2;
+      sumc = suma ^ i;
+    }
+    a[i] = suma;
+    a[i + 1] = sumb;
+    a[i + 2] = sumc;
+  }
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr101230-1.c b/gcc/testsuite/gcc.dg/torture/pr101230-1.c
new file mode 100644
index 0000000..f10ca8b
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr101230-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-fno-signed-zeros" } */
+
+
+double distance3d_sqr_pt4d_pt4d(void);
+
+int update_r_k_curr_cluster;
+void update_r_k(void) {
+  double curr_distance = distance3d_sqr_pt4d_pt4d();
+  for (int cluster; cluster; cluster++)
+    if (0 < curr_distance) {
+      curr_distance = 0;
+      update_r_k_curr_cluster = cluster;
+    }
+}
diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr101207.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr101207.c
new file mode 100644
index 0000000..1f51d66
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr101207.c
@@ -0,0 +1,25 @@
+/* { dg-do run } */
+/* { dg-additional-options "-ffast-math" } */
+
+#include "tree-vect.h"
+
+double a[2];
+double x, y;
+
+void __attribute__((noipa)) foo ()
+{
+  x = a[1] - a[0];
+  y = a[0] + a[1];
+}
+
+int main()
+{
+  check_vect ();
+
+  a[0] = 0.;
+  a[1] = 1.;
+  foo ();
+  if (x != 1. || y != 1.)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-blendv-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-blendv-1.c
new file mode 100644
index 0000000..6aa004b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-blendv-1.c
@@ -0,0 +1,51 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512vl" } */
+/* { dg-final { scan-assembler-times {pblendvb[\t ]*%xmm} 1 } } */
+/* { dg-final { scan-assembler-times {pblendvb[\t ]*%ymm} 1 } } */
+/* { dg-final { scan-assembler-times {blendvps[\t ]*%xmm} 1 } } */
+/* { dg-final { scan-assembler-times {blendvps[\t ]*%ymm} 1 } } */
+/* { dg-final { scan-assembler-times {blendvpd[\t ]*%xmm} 1 } } */
+/* { dg-final { scan-assembler-times {blendvpd[\t ]*%ymm} 1 } } */
+
+typedef float v4sf __attribute__ ((vector_size (16)));
+typedef float v8sf __attribute__ ((vector_size (32)));
+typedef double v2df __attribute__ ((vector_size (16)));
+typedef double v4df __attribute__ ((vector_size (32)));
+typedef char v16qi __attribute__ ((vector_size (16)));
+typedef char v32qi __attribute__ ((vector_size (32)));
+
+v4sf
+foo (v4sf a, v4sf b, v4sf c)
+{
+  return __builtin_ia32_blendvps (a, b, c);
+}
+
+v8sf
+foo2 (v8sf a, v8sf b, v8sf c)
+{
+  return __builtin_ia32_blendvps256 (a, b, c);
+}
+
+v2df
+foo3 (v2df a, v2df b, v2df c)
+{
+  return __builtin_ia32_blendvpd (a, b, c);
+}
+
+v4df
+foo4 (v4df a, v4df b, v4df c)
+{
+  return __builtin_ia32_blendvpd256 (a, b, c);
+}
+
+v16qi
+foo5 (v16qi a, v16qi b, v16qi c)
+{
+  return __builtin_ia32_pblendvb128 (a, b, c);
+}
+
+v32qi
+foo6 (v32qi a, v32qi b, v32qi c)
+{
+  return __builtin_ia32_pblendvb256 (a, b, c);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-blendv-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-blendv-2.c
new file mode 100644
index 0000000..daddcd5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-blendv-2.c
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512vl" } */
+/* { dg-final { scan-assembler-not {pblendv} } } */
+/* { dg-final { scan-assembler-not {blendvp} } } */
+
+#include <x86intrin.h>
+__m128
+foo (__m128 a, __m128 b)
+{
+  return _mm_blendv_ps (a, b, _mm_setzero_ps ());
+}
+
+__m256
+foo2 (__m256 a, __m256 b)
+{
+  return _mm256_blendv_ps (a, b, _mm256_set1_ps (-1.0));
+}
+
+__m128d
+foo3 (__m128d a, __m128d b, __m128d c)
+{
+  return _mm_blendv_pd (a, b, _mm_set1_pd (1.0));
+}
+
+__m256d
+foo4 (__m256d a, __m256d b, __m256d c)
+{
+  return _mm256_blendv_pd (a, b, _mm256_set1_pd (-134.3));
+}
+
+__m128i
+foo5 (__m128i a, __m128i b, __m128i c)
+{
+  return _mm_blendv_epi8 (a, b, _mm_set1_epi8 (3));
+}
+
+__m256i
+foo6 (__m256i a, __m256i b, __m256i c)
+{
+  return _mm256_blendv_epi8 (a, b, _mm256_set1_epi8 (-22));
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-pr100648.c b/gcc/testsuite/gcc.target/i386/avx512vl-pr100648.c
new file mode 100644
index 0000000..2ef7c7b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-pr100648.c
@@ -0,0 +1,21 @@
+/* PR target/100648.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512vl -mavx512bw -masm=att" } */
+/* { dg-final { scan-assembler-times "\tvpblendvb\t" 2 } } */
+/* { dg-final { scan-assembler-not "\tvpcmpeq" } } */
+/* { dg-final { scan-assembler-not "\tvpandn" } } */
+#include <x86intrin.h>
+
+__m256i
+f1 (__m256i a, __m256i b, __m256i mask)
+{
+  return _mm256_blendv_epi8(a, b, 
+    _mm256_andnot_si256(mask, _mm256_set1_epi8(255)));
+}
+
+__m128i
+f2 (__m128i a, __m128i b, __m128i mask)
+{
+  return _mm_blendv_epi8(a, b, 
+    _mm_andnot_si128(mask, _mm_set1_epi8(255)));
+}
diff --git a/gcc/testsuite/gcc.target/i386/blendv-1.c b/gcc/testsuite/gcc.target/i386/blendv-1.c
new file mode 100644
index 0000000..fcbbfb9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/blendv-1.c
@@ -0,0 +1,51 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx2 -O2 -mno-avx512f" } */
+/* { dg-final { scan-assembler-times {pblendvb[\t ]*%xmm} 1 } } */
+/* { dg-final { scan-assembler-times {pblendvb[\t ]*%ymm} 1 } } */
+/* { dg-final { scan-assembler-times {blendvps[\t ]*%xmm} 1 } } */
+/* { dg-final { scan-assembler-times {blendvps[\t ]*%ymm} 1 } } */
+/* { dg-final { scan-assembler-times {blendvpd[\t ]*%xmm} 1 } } */
+/* { dg-final { scan-assembler-times {blendvpd[\t ]*%ymm} 1 } } */
+
+typedef float v4sf __attribute__ ((vector_size (16)));
+typedef float v8sf __attribute__ ((vector_size (32)));
+typedef double v2df __attribute__ ((vector_size (16)));
+typedef double v4df __attribute__ ((vector_size (32)));
+typedef char v16qi __attribute__ ((vector_size (16)));
+typedef char v32qi __attribute__ ((vector_size (32)));
+
+v4sf
+foo (v4sf a, v4sf b, v4sf c)
+{
+  return __builtin_ia32_blendvps (a, b, c);
+}
+
+v8sf
+foo2 (v8sf a, v8sf b, v8sf c)
+{
+  return __builtin_ia32_blendvps256 (a, b, c);
+}
+
+v2df
+foo3 (v2df a, v2df b, v2df c)
+{
+  return __builtin_ia32_blendvpd (a, b, c);
+}
+
+v4df
+foo4 (v4df a, v4df b, v4df c)
+{
+  return __builtin_ia32_blendvpd256 (a, b, c);
+}
+
+v16qi
+foo5 (v16qi a, v16qi b, v16qi c)
+{
+  return __builtin_ia32_pblendvb128 (a, b, c);
+}
+
+v32qi
+foo6 (v32qi a, v32qi b, v32qi c)
+{
+  return __builtin_ia32_pblendvb256 (a, b, c);
+}
diff --git a/gcc/testsuite/gcc.target/i386/blendv-2.c b/gcc/testsuite/gcc.target/i386/blendv-2.c
new file mode 100644
index 0000000..e61e023
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/blendv-2.c
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx2 -O2 -mno-avx512f" } */
+/* { dg-final { scan-assembler-not {pblendv} } } */
+/* { dg-final { scan-assembler-not {blendvp} } } */
+
+#include <x86intrin.h>
+__m128
+foo (__m128 a, __m128 b)
+{
+  return _mm_blendv_ps (a, b, _mm_setzero_ps ());
+}
+
+__m256
+foo2 (__m256 a, __m256 b)
+{
+  return _mm256_blendv_ps (a, b, _mm256_set1_ps (-1.0));
+}
+
+__m128d
+foo3 (__m128d a, __m128d b, __m128d c)
+{
+  return _mm_blendv_pd (a, b, _mm_set1_pd (1.0));
+}
+
+__m256d
+foo4 (__m256d a, __m256d b, __m256d c)
+{
+  return _mm256_blendv_pd (a, b, _mm256_set1_pd (-134.3));
+}
+
+__m128i
+foo5 (__m128i a, __m128i b, __m128i c)
+{
+  return _mm_blendv_epi8 (a, b, _mm_set1_epi8 (3));
+}
+
+__m256i
+foo6 (__m256i a, __m256i b, __m256i c)
+{
+  return _mm256_blendv_epi8 (a, b, _mm256_set1_epi8 (-22));
+}
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-8.c b/gcc/testsuite/gcc.target/i386/funcspec-8.c
index 0a6c709..f155411 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-8.c
+++ b/gcc/testsuite/gcc.target/i386/funcspec-8.c
@@ -52,19 +52,19 @@ generic_psignd128 (__m128w a, __m128w b)
 #error "-msse4.1 should not be set for this test"
 #endif
 
-__m128d sse4_1_blendvpd (__m128d a, __m128d b, __m128d c) __attribute__((__target__("sse4.1")));
-__m128d generic_blendvpd (__m128d a, __m128d b, __m128d c);
+__m128 sse4_1_roundv4sf2 (__m128 a) __attribute__((__target__("sse4.1")));
+__m128 generic_roundv4sf2 (__m128 a);
 
-__m128d
-sse4_1_blendvpd  (__m128d a, __m128d b, __m128d c)
+__m128
+sse4_1_roundv4sf2  (__m128 a)
 {
-  return __builtin_ia32_blendvpd (a, b, c);
+  return __builtin_ia32_roundps_az (a);
 }
 
-__m128d
-generic_blendvpd  (__m128d a, __m128d b, __m128d c)
+__m128
+generic_blendvpd  (__m128 a)
 {
-  return __builtin_ia32_blendvpd (a, b, c);		/* { dg-error "needs isa option" } */
+  return __builtin_ia32_roundps_az (a);		/* { dg-error "needs isa option" } */
 }
 
 #ifdef __SSE4_2__
diff --git a/gcc/testsuite/jit.dg/test-asm.c b/gcc/testsuite/jit.dg/test-asm.c
index e7777ee..35a9f9d 100644
--- a/gcc/testsuite/jit.dg/test-asm.c
+++ b/gcc/testsuite/jit.dg/test-asm.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-do compile { target x86_64-*-* } } */
 
 #include <stdlib.h>
 #include <stdio.h>
diff --git a/gcc/testsuite/jit.dg/test-asm.cc b/gcc/testsuite/jit.dg/test-asm.cc
index 6f18280..be487e3 100644
--- a/gcc/testsuite/jit.dg/test-asm.cc
+++ b/gcc/testsuite/jit.dg/test-asm.cc
@@ -1,4 +1,4 @@
-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-do compile { target x86_64-*-* } } */
 
 #include "libgccjit++.h"
 
diff --git a/gcc/testsuite/jit.dg/test-vector-rvalues.cc b/gcc/testsuite/jit.dg/test-vector-rvalues.cc
index ac230bf7..0287711 100644
--- a/gcc/testsuite/jit.dg/test-vector-rvalues.cc
+++ b/gcc/testsuite/jit.dg/test-vector-rvalues.cc
@@ -165,6 +165,14 @@ check_div (const V &a, const V &b, const V &c)
     CHECK_VALUE (c[i], a[i] / b[i]);
 }
 
+template <>
+void
+check_div<v4f> (const v4f &a, const v4f &b, const v4f &c)
+{
+  for (int i = 0; i < 4; i++)
+    CHECK_DOUBLE_VALUE (c[i], a[i] / b[i]);
+}
+
 template <typename V, typename E>
 void
 verify_vec_code (gcc_jit_context *ctxt, gcc_jit_result *result,
diff --git a/gcc/testsuite/jit.dg/test-vector-types.cc b/gcc/testsuite/jit.dg/test-vector-types.cc
index 3389e04..1f49be6 100644
--- a/gcc/testsuite/jit.dg/test-vector-types.cc
+++ b/gcc/testsuite/jit.dg/test-vector-types.cc
@@ -139,6 +139,14 @@ check_div (const T &a, const T &b, const T &c)
     CHECK_VALUE (c[i], a[i] / b[i]);
 }
 
+template <>
+void
+check_div<v4f> (const v4f &a, const v4f &b, const v4f &c)
+{
+  for (int i = 0; i < 4; i++)
+    CHECK_DOUBLE_VALUE (c[i], a[i] / b[i]);
+}
+
 template <typename T>
 void
 verify_vec_code (gcc_jit_context *ctxt, gcc_jit_result *result,
diff --git a/gcc/tree-ssa-phiopt.c b/gcc/tree-ssa-phiopt.c
index ce5f0d5..ab12e85 100644
--- a/gcc/tree-ssa-phiopt.c
+++ b/gcc/tree-ssa-phiopt.c
@@ -391,6 +391,32 @@ replace_phi_edge_with_variable (basic_block cond_block,
   basic_block bb = gimple_bb (phi);
   basic_block block_to_remove;
   gimple_stmt_iterator gsi;
+  tree phi_result = PHI_RESULT (phi);
+
+  /* Duplicate range info if we're the only things setting the target PHI.
+     This is needed as later on, the new_tree will be replacing
+     The assignement of the PHI.
+     For an example:
+     bb1:
+     _4 = min<a_1, 255>
+     goto bb2
+
+     range<-INF,255>
+     a_3 = PHI<_4(1)>
+     bb3:
+
+     use(a_3)
+     And _4 gets prograted into the use of a_3 and losing the range info.
+     This can't be done for more than 2 incoming edges as the progration
+     won't happen.  */
+  if (TREE_CODE (new_tree) == SSA_NAME
+      && EDGE_COUNT (gimple_bb (phi)->preds) == 2
+      && INTEGRAL_TYPE_P (TREE_TYPE (phi_result))
+      && !SSA_NAME_RANGE_INFO (new_tree)
+      && SSA_NAME_RANGE_INFO (phi_result))
+    duplicate_ssa_name_range_info (new_tree,
+				   SSA_NAME_RANGE_TYPE (phi_result),
+				   SSA_NAME_RANGE_INFO (phi_result));
 
   /* Change the PHI argument to new.  */
   SET_USE (PHI_ARG_DEF_PTR (phi, e->dest_idx), new_tree);
@@ -836,7 +862,7 @@ match_simplify_replacement (basic_block cond_bb, basic_block middle_bb,
       if (!is_gimple_assign (stmt_to_move))
 	return false;
 
-      tree lhs = gimple_assign_lhs  (stmt_to_move);
+      tree lhs = gimple_assign_lhs (stmt_to_move);
       gimple *use_stmt;
       use_operand_p use_p;
 
@@ -892,6 +918,7 @@ match_simplify_replacement (basic_block cond_bb, basic_block middle_bb,
 	}
       gimple_stmt_iterator gsi1 = gsi_for_stmt (stmt_to_move);
       gsi_move_before (&gsi1, &gsi);
+      reset_flow_sensitive_info (gimple_assign_lhs (stmt_to_move));
     }
   if (seq)
     gsi_insert_seq_before (&gsi, seq, GSI_SAME_STMT);
@@ -1384,16 +1411,6 @@ value_replacement (basic_block cond_bb, basic_block middle_bb,
 	   <bb 4>:
 	   # u_3 = PHI <u_6(3), 4294967295(2)>  */
       reset_flow_sensitive_info (lhs);
-      if (INTEGRAL_TYPE_P (TREE_TYPE (lhs)))
-	{
-	  /* If available, we can use VR of phi result at least.  */
-	  tree phires = gimple_phi_result (phi);
-	  struct range_info_def *phires_range_info
-	    = SSA_NAME_RANGE_INFO (phires);
-	  if (phires_range_info)
-	    duplicate_ssa_name_range_info (lhs, SSA_NAME_RANGE_TYPE (phires),
-					   phires_range_info);
-	}
       gimple_stmt_iterator gsi_from;
       for (int i = prep_cnt - 1; i >= 0; --i)
 	{
@@ -1793,13 +1810,6 @@ minmax_replacement (basic_block cond_bb, basic_block middle_bb,
   gimple_seq stmts = NULL;
   tree phi_result = PHI_RESULT (phi);
   result = gimple_build (&stmts, minmax, TREE_TYPE (phi_result), arg0, arg1);
-  /* Duplicate range info if we're the only things setting the target PHI.  */
-  if (!gimple_seq_empty_p (stmts)
-      && EDGE_COUNT (gimple_bb (phi)->preds) == 2
-      && !POINTER_TYPE_P (TREE_TYPE (phi_result))
-      && SSA_NAME_RANGE_INFO (phi_result))
-    duplicate_ssa_name_range_info (result, SSA_NAME_RANGE_TYPE (phi_result),
-				   SSA_NAME_RANGE_INFO (phi_result));
 
   gsi = gsi_last_bb (cond_bb);
   gsi_insert_seq_before (&gsi, stmts, GSI_NEW_STMT);
diff --git a/gcc/tree-vect-slp.c b/gcc/tree-vect-slp.c
index 227d6aa..5401dbe 100644
--- a/gcc/tree-vect-slp.c
+++ b/gcc/tree-vect-slp.c
@@ -3689,26 +3689,33 @@ vect_optimize_slp (vec_info *vinfo)
 
 	  vertices[idx].visited = 1;
 
-	  /* We do not handle stores with a permutation.  */
-	  stmt_vec_info rep = SLP_TREE_REPRESENTATIVE (node);
-	  if (STMT_VINFO_DATA_REF (rep)
-	      && DR_IS_WRITE (STMT_VINFO_DATA_REF (rep)))
-	    continue;
-	  /* We cannot move a permute across an operation that is
-	     not independent on lanes.  Note this is an explicit
-	     negative list since that's much shorter than the respective
-	     positive one but it's critical to keep maintaining it.  */
-	  if (is_gimple_call (STMT_VINFO_STMT (rep)))
-	    switch (gimple_call_combined_fn (STMT_VINFO_STMT (rep)))
-	      {
-	      case CFN_COMPLEX_ADD_ROT90:
-	      case CFN_COMPLEX_ADD_ROT270:
-	      case CFN_COMPLEX_MUL:
-	      case CFN_COMPLEX_MUL_CONJ:
-	      case CFN_VEC_ADDSUB:
+	  /* We still eventually have failed backedge SLP nodes in the
+	     graph, those are only cancelled when analyzing operations.
+	     Simply treat them as transparent ops, propagating permutes
+	     through them.  */
+	  if (SLP_TREE_DEF_TYPE (node) == vect_internal_def)
+	    {
+	      /* We do not handle stores with a permutation.  */
+	      stmt_vec_info rep = SLP_TREE_REPRESENTATIVE (node);
+	      if (STMT_VINFO_DATA_REF (rep)
+		  && DR_IS_WRITE (STMT_VINFO_DATA_REF (rep)))
 		continue;
-	      default:;
-	      }
+	      /* We cannot move a permute across an operation that is
+		 not independent on lanes.  Note this is an explicit
+		 negative list since that's much shorter than the respective
+		 positive one but it's critical to keep maintaining it.  */
+	      if (is_gimple_call (STMT_VINFO_STMT (rep)))
+		switch (gimple_call_combined_fn (STMT_VINFO_STMT (rep)))
+		  {
+		  case CFN_COMPLEX_ADD_ROT90:
+		  case CFN_COMPLEX_ADD_ROT270:
+		  case CFN_COMPLEX_MUL:
+		  case CFN_COMPLEX_MUL_CONJ:
+		  case CFN_VEC_ADDSUB:
+		    continue;
+		  default:;
+		  }
+	    }
 
 	  int perm = -1;
 	  for (graph_edge *succ = slpg->vertices[idx].succ;
@@ -3812,7 +3819,9 @@ vect_optimize_slp (vec_info *vinfo)
       slp_tree child;
       FOR_EACH_VEC_ELT (SLP_TREE_CHILDREN (node), j, child)
 	{
-	  if (!child || SLP_TREE_DEF_TYPE (child) == vect_internal_def)
+	  if (!child
+	      || (SLP_TREE_DEF_TYPE (child) != vect_constant_def
+		  && SLP_TREE_DEF_TYPE (child) != vect_external_def))
 	    continue;
 
 	  /* If the vector is uniform there's nothing to do.  */
@@ -3912,6 +3921,52 @@ vect_optimize_slp (vec_info *vinfo)
 	}
     }
 
+  /* Elide any permutations at BB reduction roots.  */
+  if (is_a <bb_vec_info> (vinfo))
+    {
+      for (slp_instance instance : vinfo->slp_instances)
+	{
+	  if (SLP_INSTANCE_KIND (instance) != slp_inst_kind_bb_reduc)
+	    continue;
+	  slp_tree old = SLP_INSTANCE_TREE (instance);
+	  if (SLP_TREE_CODE (old) == VEC_PERM_EXPR
+	      && SLP_TREE_CHILDREN (old).length () == 1)
+	    {
+	      slp_tree child = SLP_TREE_CHILDREN (old)[0];
+	      if (SLP_TREE_DEF_TYPE (child) == vect_external_def)
+		{
+		  /* Preserve the special VEC_PERM we use to shield existing
+		     vector defs from the rest.  But make it a no-op.  */
+		  unsigned i = 0;
+		  for (std::pair<unsigned, unsigned> &p
+		       : SLP_TREE_LANE_PERMUTATION (old))
+		    p.second = i++;
+		}
+	      else
+		{
+		  SLP_INSTANCE_TREE (instance) = child;
+		  SLP_TREE_REF_COUNT (child)++;
+		  vect_free_slp_tree (old);
+		}
+	    }
+	  else if (SLP_TREE_LOAD_PERMUTATION (old).exists ()
+		   && SLP_TREE_REF_COUNT (old) == 1
+		   && vertices[old->vertex].materialize)
+	    {
+	      /* ???  For loads the situation is more complex since
+		 we can't modify the permute in place in case the
+		 node is used multiple times.  In fact for loads this
+		 should be somehow handled in the propagation engine.  */
+	      /* Apply the reverse permutation to our stmts.  */
+	      int perm = vertices[old->vertex].get_perm_in ();
+	      vect_slp_permute (perms[perm],
+				SLP_TREE_SCALAR_STMTS (old), true);
+	      vect_slp_permute (perms[perm],
+				SLP_TREE_LOAD_PERMUTATION (old), true);
+	    }
+	}
+    }
+
   /* Free the perms vector used for propagation.  */
   while (!perms.is_empty ())
     perms.pop ().release ();
@@ -3978,48 +4033,6 @@ vect_optimize_slp (vec_info *vinfo)
 	    }
 	}
     }
-
-  /* And any permutations of BB reductions.  */
-  if (is_a <bb_vec_info> (vinfo))
-    {
-      for (slp_instance instance : vinfo->slp_instances)
-	{
-	  if (SLP_INSTANCE_KIND (instance) != slp_inst_kind_bb_reduc)
-	    continue;
-	  slp_tree old = SLP_INSTANCE_TREE (instance);
-	  if (SLP_TREE_CODE (old) == VEC_PERM_EXPR
-	      && SLP_TREE_CHILDREN (old).length () == 1)
-	    {
-	      slp_tree child = SLP_TREE_CHILDREN (old)[0];
-	      if (SLP_TREE_DEF_TYPE (child) == vect_external_def)
-		{
-		  /* Preserve the special VEC_PERM we use to shield existing
-		     vector defs from the rest.  But make it a no-op.  */
-		  unsigned i = 0;
-		  for (std::pair<unsigned, unsigned> &p
-		       : SLP_TREE_LANE_PERMUTATION (old))
-		    p.second = i++;
-		}
-	      else
-		{
-		  SLP_INSTANCE_TREE (instance) = child;
-		  SLP_TREE_REF_COUNT (child)++;
-		  vect_free_slp_tree (old);
-		}
-	    }
-	  else if (SLP_TREE_LOAD_PERMUTATION (old).exists ()
-		   && SLP_TREE_REF_COUNT (old) == 1)
-	    {
-	      /* ???  For loads the situation is more complex since
-		 we can't modify the permute in place in case the
-		 node is used multiple times.  In fact for loads this
-		 should be somehow handled in the propagation engine.  */
-	      auto fn = [] (const void *a, const void *b)
-			      { return *(const int *)a - *(const int *)b; };
-	      SLP_TREE_LOAD_PERMUTATION (old).qsort (fn);
-	    }
-	}
-    }
 }
 
 /* Gather loads reachable from the individual SLP graph entries.  */