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author | Stephane Carrez <stcarrez@nerim.fr> | 2003-04-12 22:35:28 +0200 |
---|---|---|
committer | Stephane Carrez <ciceron@gcc.gnu.org> | 2003-04-12 22:35:28 +0200 |
commit | a67bac5fc49398f26611dedaa0b62990b134d642 (patch) | |
tree | 44a7ea390f44c7d702b1a939c667beea38983236 /gcc | |
parent | 0921442473dbe2f14488153e94acb3d0b4524b92 (diff) | |
download | gcc-a67bac5fc49398f26611dedaa0b62990b134d642.zip gcc-a67bac5fc49398f26611dedaa0b62990b134d642.tar.gz gcc-a67bac5fc49398f26611dedaa0b62990b134d642.tar.bz2 |
m68hc11.md ("bitcmpqi" split): No need to test the mode of operand 0.
* config/m68hc11/m68hc11.md ("bitcmpqi" split): No need to test the
mode of operand 0.
(peephole2 optimize const load): Likewise for operand 2.
("*rotlhi3_with_carry"): Change pattern to a const 1 rotate which
clobbers CC_REGNUM.
("*rotrhi3_with_carry"): Likewise.
(ashift:DI 1 split): Update pattern to create the above rotate.
(lshiftrt:DI 1 split): Likewise.
From-SVN: r65524
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 11 | ||||
-rw-r--r-- | gcc/config/m68hc11/m68hc11.md | 32 |
2 files changed, 32 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5108099..b29c50a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,16 @@ 2003-04-12 Stephane Carrez <stcarrez@nerim.fr> + * config/m68hc11/m68hc11.md ("bitcmpqi" split): No need to test the + mode of operand 0. + (peephole2 optimize const load): Likewise for operand 2. + ("*rotlhi3_with_carry"): Change pattern to a const 1 rotate which + clobbers CC_REGNUM. + ("*rotrhi3_with_carry"): Likewise. + (ashift:DI 1 split): Update pattern to create the above rotate. + (lshiftrt:DI 1 split): Likewise. + +2003-04-12 Stephane Carrez <stcarrez@nerim.fr> + * config/m68hc11/m68hc11.md (SOFT_Z_REGNUM): New constant. ("tstqi_z_used" split): Use it. ("cmphi_z_used"): Likewise. diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md index f578502..6fd9d0e 100644 --- a/gcc/config/m68hc11/m68hc11.md +++ b/gcc/config/m68hc11/m68hc11.md @@ -445,7 +445,7 @@ [(set (cc0) (and:QI (match_operand:QI 0 "tst_operand" "") (match_operand:QI 1 "hard_addr_reg_operand" "")))] - "z_replacement_completed == 2 && GET_MODE (operands[0]) == QImode" + "z_replacement_completed == 2" [(set (match_dup 3) (match_dup 2)) (set (cc0) (and:QI (match_dup 0) (match_dup 4)))] "operands[2] = gen_rtx (REG, HImode, REGNO (operands[1])); @@ -4472,15 +4472,21 @@ (set (match_dup 4) (match_dup 2)) (set (match_dup 2) (match_dup 5)) - (set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI CC_REGNUM))) + (parallel [(set (match_dup 2) + (rotate:HI (match_dup 2) (const_int 1))) + (clobber (reg:HI CC_REGNUM))]) (set (match_dup 6) (match_dup 2)) (set (match_dup 2) (match_dup 7)) - (set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI CC_REGNUM))) + (parallel [(set (match_dup 2) + (rotate:HI (match_dup 2) (const_int 1))) + (clobber (reg:HI CC_REGNUM))]) (set (match_dup 8) (match_dup 2)) (set (match_dup 2) (match_dup 9)) - (set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI CC_REGNUM))) + (parallel [(set (match_dup 2) + (rotate:HI (match_dup 2) (const_int 1))) + (clobber (reg:HI CC_REGNUM))]) (set (match_dup 10) (match_dup 2))] "operands[3] = m68hc11_gen_lowpart (SImode, operands[1]); operands[5] = m68hc11_gen_highpart (HImode, operands[3]); @@ -5335,15 +5341,18 @@ (set (match_dup 4) (match_dup 2)) (set (match_dup 2) (match_dup 5)) - (set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI CC_REGNUM))) + (parallel [(set (match_dup 2) (rotatert:HI (match_dup 2) (const_int 1))) + (clobber (reg:HI CC_REGNUM))]) (set (match_dup 6) (match_dup 2)) (set (match_dup 2) (match_dup 7)) - (set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI CC_REGNUM))) + (parallel [(set (match_dup 2) (rotatert:HI (match_dup 2) (const_int 1))) + (clobber (reg:HI CC_REGNUM))]) (set (match_dup 8) (match_dup 2)) (set (match_dup 2) (match_dup 9)) - (set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI CC_REGNUM))) + (parallel [(set (match_dup 2) (rotatert:HI (match_dup 2) (const_int 1))) + (clobber (reg:HI CC_REGNUM))]) (set (match_dup 10) (match_dup 2))] "operands[3] = m68hc11_gen_highpart (SImode, operands[1]); operands[5] = m68hc11_gen_lowpart (HImode, operands[3]); @@ -5770,7 +5779,8 @@ (define_insn "*rotlhi3_with_carry" [(set (match_operand:HI 0 "register_operand" "=d") (rotate:HI (match_operand:HI 1 "register_operand" "0") - (reg:HI CC_REGNUM)))] + (const_int 1))) + (clobber (reg:HI CC_REGNUM))] "" "* { @@ -5781,7 +5791,8 @@ (define_insn "*rotrhi3_with_carry" [(set (match_operand:HI 0 "register_operand" "=d") (rotatert:HI (match_operand:HI 1 "register_operand" "0") - (reg:HI CC_REGNUM)))] + (const_int 1))) + (clobber (reg:HI CC_REGNUM))] "" "* { @@ -6713,8 +6724,7 @@ (set (match_operand:HI 2 "hard_reg_operand" "") (match_dup 1))] "(D_REG_P (operands[2]) || X_REG_P (operands[2]) || Y_REG_P (operands[2])) - && !reg_mentioned_p (operands[2], operands[0]) - && GET_MODE (operands[2]) == HImode" + && !reg_mentioned_p (operands[2], operands[0])" [(set (match_dup 2) (match_dup 1)) (set (match_dup 0) (match_dup 2))] "") |