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| author | Christophe Lyon <christophe.lyon@foss.st.com> | 2021-08-06 14:06:44 +0000 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@foss.st.com> | 2021-08-06 14:06:44 +0000 |
| commit | a22b3e022c2b45047a28d901042888eb77620499 (patch) | |
| tree | 293c31f2276291b7681db5f3190280ec9f38368d /gcc | |
| parent | f31da42e047e8018ca6ad9809273bc7efb6ffcaf (diff) | |
| download | gcc-a22b3e022c2b45047a28d901042888eb77620499.zip gcc-a22b3e022c2b45047a28d901042888eb77620499.tar.gz gcc-a22b3e022c2b45047a28d901042888eb77620499.tar.bz2 | |
arm: Fix typos for reorder assembler architecture directives [PR101723]
Two tests had typos preventing them from passing, committed as obvious.
2021-08-06 Christophe Lyon <christophe.lyon@foss.st.com>
gcc/testsuite/
PR target/101723
* gcc.target/arm/attr-neon3.c: Fix typo.
* gcc.target/arm/pragma_fpu_attribute_2.c: Fix typo.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/attr-neon3.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/gcc/testsuite/gcc.target/arm/attr-neon3.c b/gcc/testsuite/gcc.target/arm/attr-neon3.c index 0fbce6e..b6171e7 100644 --- a/gcc/testsuite/gcc.target/arm/attr-neon3.c +++ b/gcc/testsuite/gcc.target/arm/attr-neon3.c @@ -33,7 +33,7 @@ my (float32x2_t __a, float32x2_t __b) ** | ** vld1.64 {d[0-9]+}, \[r[0-9]+:64\]! ** vld1.64 {d[0-9]+}, \[r[0-9]+:64\] -** } +** ) ** ... ** bx lr */ diff --git a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c index 3d33b04..398d8ff 100644 --- a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c +++ b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c @@ -28,5 +28,5 @@ uint32_t restored () /* We can't tell exactly how many times the following tests will match because command-line options may cause additional instances to be generated, but each must be present at least once. */ -/* { dg-final { scan-assembler-times {\.fpu\s+vfpv4\n} } } */ -/* { dg-final { scan-assembler-times {\.fpu\s+vfpv3-d16\n} } } */ +/* { dg-final { scan-assembler {\.fpu\s+vfpv4\n} } } */ +/* { dg-final { scan-assembler {\.fpu\s+vfpv3-d16\n} } } */ |