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author | Richard Sandiford <richard.sandiford@linaro.org> | 2018-01-07 03:59:54 +0000 |
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committer | Jeff Law <law@gcc.gnu.org> | 2018-01-06 20:59:54 -0700 |
commit | 9ea52d27eca0c56c88a3941b413ef56950d9f5c3 (patch) | |
tree | 133af00754548097ceaf8d792693e0d26a6cee01 /gcc | |
parent | 064ee4de335fad071c3887f5bcd817d1f9e3e5ff (diff) | |
download | gcc-9ea52d27eca0c56c88a3941b413ef56950d9f5c3.zip gcc-9ea52d27eca0c56c88a3941b413ef56950d9f5c3.tar.gz gcc-9ea52d27eca0c56c88a3941b413ef56950d9f5c3.tar.bz2 |
re PR middle-end/83699 (Many 64-bit SPARC gcc.dg/vect tests FAIL)
PR rtl-optimization/83699
* expmed.c (extract_bit_field_1): Restrict the vector usage of
extract_bit_field_as_subreg to cases in which the extracted
value is also a vector.
From-SVN: r256318
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/expmed.c | 14 |
2 files changed, 9 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 767d745..bade4b2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org> + PR rtl-optimization/83699 + * expmed.c (extract_bit_field_1): Restrict the vector usage of + extract_bit_field_as_subreg to cases in which the extracted + value is also a vector. + * lra-constraints.c (process_alt_operands): Test for the equivalence substitutions when detecting a possible reload cycle. diff --git a/gcc/expmed.c b/gcc/expmed.c index d88ea35..808b067 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -1738,16 +1738,10 @@ extract_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, return target; } } - /* Using subregs is useful if we're extracting the least-significant - vector element, or if we're extracting one register vector from - a multi-register vector. extract_bit_field_as_subreg checks - for valid bitsize and bitnum, so we don't need to do that here. - - The mode check makes sure that we're extracting either - a single element or a subvector with the same element type. - If the modes aren't such a natural fit, fall through and - bitcast to integers first. */ - if (GET_MODE_INNER (mode) == innermode) + /* Using subregs is useful if we're extracting one register vector + from a multi-register vector. extract_bit_field_as_subreg checks + for valid bitsize and bitnum, so we don't need to do that here. */ + if (VECTOR_MODE_P (mode)) { rtx sub = extract_bit_field_as_subreg (mode, op0, bitsize, bitnum); if (sub) |