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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2017-01-25 11:10:30 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2017-01-25 11:10:30 +0000 |
| commit | 9aa483a2d87e2d1a5d976ddf9ecd6352d8eebf9e (patch) | |
| tree | a92aa52013146cabe4ac2b6eafaa46d986c0e1bb /gcc | |
| parent | a5a2202779dec6edce80112fa3ed664f0412673a (diff) | |
| download | gcc-9aa483a2d87e2d1a5d976ddf9ecd6352d8eebf9e.zip gcc-9aa483a2d87e2d1a5d976ddf9ecd6352d8eebf9e.tar.gz gcc-9aa483a2d87e2d1a5d976ddf9ecd6352d8eebf9e.tar.bz2 | |
[ARM] PR target/79145 Fix xordi3 expander for immediate operands in iWMMXt
PR target/79145
* config/arm/arm.md (xordi3): Force constant operand into a register
for TARGET_IWMMXT.
* gcc.target/arm/pr79145.c: New test.
From-SVN: r244894
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 9 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/pr79145.c | 16 |
4 files changed, 35 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c648e57..6bd1c69 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + PR target/79145 + * config/arm/arm.md (xordi3): Force constant operand into a register + for TARGET_IWMMXT. + +2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + * doc/invoke.texi (-fstore-merging): Correct default optimization levels at which it is enabled. (-O): Move -fstore-merging from list to... diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 446fb22..8720a71 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3313,7 +3313,14 @@ (xor:DI (match_operand:DI 1 "s_register_operand" "") (match_operand:DI 2 "arm_xordi_operand" "")))] "TARGET_32BIT" - "" + { + /* The iWMMXt pattern for xordi3 accepts only register operands but we want + to reuse this expander for all TARGET_32BIT targets so just force the + constants into a register. Unlike for the anddi3 and iordi3 there are + no NEON instructions that take an immediate. */ + if (TARGET_IWMMXT && !REG_P (operands[2])) + operands[2] = force_reg (DImode, operands[2]); + } ) (define_insn_and_split "*xordi3_insn" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 65cae6f..9eb748f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/79145 + * gcc.target/arm/pr79145.c: New test. + 2017-01-25 Richard Biener <rguenther@suse.de> PR debug/78363 diff --git a/gcc/testsuite/gcc.target/arm/pr79145.c b/gcc/testsuite/gcc.target/arm/pr79145.c new file mode 100644 index 0000000..6678244 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr79145.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */ +/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */ +/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */ +/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-require-effective-target arm_iwmmxt_ok } */ +/* { dg-options "-mcpu=iwmmxt" } */ + +int +main (void) +{ + volatile long long t1; + t1 ^= 0x55; + return 0; +} |