Add missing expander for vector float_extend and float_truncate.

2020-05-25  Hongtao Liu  <hongtao.liu@intel.com>

gcc/ChangeLog
	PR target/95125
	* config/i386/sse.md (sf2dfmode_lower): New mode attribute.
	(trunc<mode><sf2dfmode_lower>2) New expander.
	(extend<sf2dfmode_lower><mode>2): Ditto.

gcc/testsuite/ChangeLog
	* gcc.target/i386/pr95125-avx.c: New test.
	* gcc.target/i386/pr95125-avx512f.c: Ditto.

5 files changed, 90 insertions, 0 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ede1f15..1a808b7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2020-05-25  Hongtao Liu  <hongtao.liu@intel.com>
+
+	PR target/95125
+	* config/i386/sse.md (sf2dfmode_lower): New mode attribute.
+	(trunc<mode><sf2dfmode_lower>2) New expander.
+	(extend<sf2dfmode_lower><mode>2): Ditto.
+
 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
 
 	* config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index bb8ee19..cee2b28 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6552,6 +6552,20 @@
 ;; For <sse2_avx_avx512f>_cvtps2pd<avxsizesuffix> insn pattern
 (define_mode_attr sf2dfmode
   [(V8DF "V8SF") (V4DF "V4SF")])
+(define_mode_attr sf2dfmode_lower
+  [(V8DF "v8sf") (V4DF "v4sf")])
+
+(define_expand "trunc<mode><sf2dfmode_lower>2"
+  [(set (match_operand:<sf2dfmode> 0 "register_operand")
+	(float_truncate:<sf2dfmode>
+	  (match_operand:VF2_512_256 1 "vector_operand")))]
+  "TARGET_AVX")
+
+(define_expand "extend<sf2dfmode_lower><mode>2"
+  [(set (match_operand:VF2_512_256 0 "register_operand")
+	(float_extend:VF2_512_256
+	  (match_operand:<sf2dfmode> 1 "vector_operand")))]
+  "TARGET_AVX")
 
 (define_insn "<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix><mask_name><round_saeonly_name>"
   [(set (match_operand:VF2_512_256 0 "register_operand" "=v")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2710d2e..f12bc69 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-05-25  Hongtao Liu  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/pr95125-avx.c: New test.
+	* gcc.target/i386/pr95125-avx512f.c: Ditto.
+
 2020-05-24  Harald Anlauf  <anlauf@gmx.de>
 
 	PR fortran/95106
diff --git a/gcc/testsuite/gcc.target/i386/pr95125-avx.c b/gcc/testsuite/gcc.target/i386/pr95125-avx.c
new file mode 100644
index 0000000..3cd1a08
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr95125-avx.c
@@ -0,0 +1,27 @@
+/* PR target/92125 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -mavx" } */
+
+extern float f[4];
+extern double d[4];
+
+void
+float_truncate_256 (void)
+{
+  f[0] = d[0];
+  f[1] = d[1];
+  f[2] = d[2];
+  f[3] = d[3];
+}
+
+void
+float_extend_256 (void)
+{
+  d[0] = f[0];
+  d[1] = f[1];
+  d[2] = f[2];
+  d[3] = f[3];
+}
+
+/* { dg-final { scan-assembler-times "vcvtps2pd" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr95125-avx512f.c b/gcc/testsuite/gcc.target/i386/pr95125-avx512f.c
new file mode 100644
index 0000000..109278c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr95125-avx512f.c
@@ -0,0 +1,37 @@
+/* PR target/95125 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -mavx512f -mprefer-vector-width=512 " } */
+
+extern float f[8];
+extern double d[8];
+
+void
+float_truncate_512 (void)
+{
+  f[0] = d[0];
+  f[1] = d[1];
+  f[2] = d[2];
+  f[3] = d[3];
+  f[4] = d[4];
+  f[5] = d[5];
+  f[6] = d[6];
+  f[7] = d[7];
+}
+
+void
+float_extend_512 (void)
+{
+  d[0] = f[0];
+  d[1] = f[1];
+  d[2] = f[2];
+  d[3] = f[3];
+  d[4] = f[4];
+  d[5] = f[5];
+  d[6] = f[6];
+  d[7] = f[7];
+}
+
+
+
+/* { dg-final { scan-assembler-times "vcvtps2pd" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps" 1 } } */