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author | Jeffrey A Law <law@cygnus.com> | 1998-11-24 23:15:19 +0000 |
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committer | Jeff Law <law@gcc.gnu.org> | 1998-11-24 16:15:19 -0700 |
commit | 940da3246db50a1c1fde531ba1457e6bef61b3f9 (patch) | |
tree | 488e0bd31e47424105f777ed841d306134aabbfd /gcc | |
parent | 83f660b7585eed3232073f360075fd93a2c66468 (diff) | |
download | gcc-940da3246db50a1c1fde531ba1457e6bef61b3f9.zip gcc-940da3246db50a1c1fde531ba1457e6bef61b3f9.tar.gz gcc-940da3246db50a1c1fde531ba1457e6bef61b3f9.tar.bz2 |
cse.c (fold_rtx): Make autoincrement addressing mode tests be runtime selectable.
* cse.c (fold_rtx): Make autoincrement addressing mode tests be
runtime selectable.
* expr.c (move_by_pieces): Similarly.
(move_by_pieces_1, clear_by_pieces, clear_by_pieces_1): Similarly.
* flow.c (find_auto_inc): Similarly.
(try_pre_increment): Similarly.
* loop.c (strength_reduce): Similarly.
* regclass.c (auto_inc_dec_reg_p): Similarly.
* regmove.c (try_auto_increment): Similarly.
(fixup_match_1): Similarly.
* rtl.h (HAVE_PRE_INCREMENT): Define if not already defined.
(HAVE_PRE_DECREMENT): Similarly.
(HAVE_POST_INCREMENT, HAVE_POST_DECREMENT): Similarly.
sponding changes to all target header files.
From-SVN: r23837
Diffstat (limited to 'gcc')
39 files changed, 220 insertions, 239 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d986252..389fbd6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +Wed Nov 25 00:07:11 1998 Jeffrey A Law (law@cygnus.com) + + * cse.c (fold_rtx): Make autoincrement addressing mode tests be + runtime selectable. + * expr.c (move_by_pieces): Similarly. + (move_by_pieces_1, clear_by_pieces, clear_by_pieces_1): Similarly. + * flow.c (find_auto_inc): Similarly. + (try_pre_increment): Similarly. + * loop.c (strength_reduce): Similarly. + * regclass.c (auto_inc_dec_reg_p): Similarly. + * regmove.c (try_auto_increment): Similarly. + (fixup_match_1): Similarly. + * rtl.h (HAVE_PRE_INCREMENT): Define if not already defined. + (HAVE_PRE_DECREMENT): Similarly. + (HAVE_POST_INCREMENT, HAVE_POST_DECREMENT): Similarly. + sponding changes to all target header files. + Tue Nov 24 20:24:59 1998 Jim Wilson <wilson@cygnus.com> * configure.in (m68020-*-elf*, m68k-*-elf*): New targets. diff --git a/gcc/config/1750a/1750a.h b/gcc/config/1750a/1750a.h index 0a3aa8e..8c5607a 100644 --- a/gcc/config/1750a/1750a.h +++ b/gcc/config/1750a/1750a.h @@ -707,10 +707,10 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA /* 1750 doesn't have a lot of auto-incr./decr. - just for the stack ptr. */ -/* #define HAVE_POST_INCREMENT just for R15 (stack pointer) */ -/* #define HAVE_POST_DECREMENT */ -/* #define HAVE_PRE_DECREMENT just for R15 (stack pointer) */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_POST_INCREMENT 0 just for R15 (stack pointer) */ +/* #define HAVE_POST_DECREMENT 0 */ +/* #define HAVE_PRE_DECREMENT 0 just for R15 (stack pointer) */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/a29k/a29k.h b/gcc/config/a29k/a29k.h index c3e6174..a6c8941 100644 --- a/gcc/config/a29k/a29k.h +++ b/gcc/config/a29k/a29k.h @@ -1067,11 +1067,11 @@ extern char *a29k_function_name; /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 13ce722..5490289 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -1316,11 +1316,11 @@ extern void alpha_init_expanders (); /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index ab1dc15..49d9fe2 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -927,8 +927,8 @@ do { \ #define MAX_REGS_PER_ADDRESS 1 /* We have pre inc/dec (load/store with update). */ -#define HAVE_PRE_INCREMENT -#define HAVE_PRE_DECREMENT +#define HAVE_PRE_INCREMENT 1 +#define HAVE_PRE_DECREMENT 1 /* Recognize any constant value that is a valid address. */ #define CONSTANT_ADDRESS_P(X) \ diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h index 527c0a7..9715453 100644 --- a/gcc/config/c4x/c4x.h +++ b/gcc/config/c4x/c4x.h @@ -1519,14 +1519,14 @@ extern struct rtx_def *c4x_gen_compare_reg (); /* Addressing Modes */ -#define HAVE_POST_INCREMENT -#define HAVE_PRE_INCREMENT -#define HAVE_POST_DECREMENT -#define HAVE_PRE_DECREMENT -#define HAVE_PRE_MODIFY_REG -#define HAVE_POST_MODIFY_REG -#define HAVE_PRE_MODIFY_DISP -#define HAVE_POST_MODIFY_DISP +#define HAVE_POST_INCREMENT 1 +#define HAVE_PRE_INCREMENT 1 +#define HAVE_POST_DECREMENT 1 +#define HAVE_PRE_DECREMENT 1 +#define HAVE_PRE_MODIFY_REG 1 +#define HAVE_POST_MODIFY_REG 1 +#define HAVE_PRE_MODIFY_DISP 1 +#define HAVE_POST_MODIFY_DISP 1 /* What about LABEL_REF? */ #define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == SYMBOL_REF) diff --git a/gcc/config/clipper/clipper.h b/gcc/config/clipper/clipper.h index 8ce8c47..666e96d 100644 --- a/gcc/config/clipper/clipper.h +++ b/gcc/config/clipper/clipper.h @@ -639,9 +639,9 @@ do \ /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/convex/convex.h b/gcc/config/convex/convex.h index 893d83a..f455f96 100644 --- a/gcc/config/convex/convex.h +++ b/gcc/config/convex/convex.h @@ -892,11 +892,11 @@ enum reg_class { /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/dsp16xx/dsp16xx.h b/gcc/config/dsp16xx/dsp16xx.h index d63cc80..f71ed37 100644 --- a/gcc/config/dsp16xx/dsp16xx.h +++ b/gcc/config/dsp16xx/dsp16xx.h @@ -1299,11 +1299,11 @@ extern struct dsp16xx_frame_info current_frame_info; /* ADDRESSING MODES */ /* The 1610 has post-increment and decrement, but no pre-modify */ -#define HAVE_POST_INCREMENT -#define HAVE_POST_DECREMENT +#define HAVE_POST_INCREMENT 1 +#define HAVE_POST_DECREMENT 1 -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Recognize any constant value that is a valid address. */ #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) diff --git a/gcc/config/elxsi/elxsi.h b/gcc/config/elxsi/elxsi.h index 5d35ace..6e8da32 100644 --- a/gcc/config/elxsi/elxsi.h +++ b/gcc/config/elxsi/elxsi.h @@ -499,11 +499,11 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES }; /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/fx80/fx80.h b/gcc/config/fx80/fx80.h index 0826236..651d13d0 100644 --- a/gcc/config/fx80/fx80.h +++ b/gcc/config/fx80/fx80.h @@ -607,11 +607,11 @@ extern enum reg_class regno_reg_class[]; /* Addressing modes, and classification of registers for them. */ -#define HAVE_POST_INCREMENT -/* #define HAVE_POST_DECREMENT */ +#define HAVE_POST_INCREMENT 1 +/* #define HAVE_POST_DECREMENT 0 */ -#define HAVE_PRE_DECREMENT -/* #define HAVE_PRE_INCREMENT */ +#define HAVE_PRE_DECREMENT 1 +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/gmicro/gmicro.h b/gcc/config/gmicro/gmicro.h index ebcab0c..789ca84 100644 --- a/gcc/config/gmicro/gmicro.h +++ b/gcc/config/gmicro/gmicro.h @@ -863,11 +863,11 @@ extern enum reg_class regno_reg_class[]; /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h index f159174..8f617ae 100644 --- a/gcc/config/h8300/h8300.h +++ b/gcc/config/h8300/h8300.h @@ -721,11 +721,11 @@ struct rtx_def *function_arg(); /* Addressing modes, and classification of registers for them. */ -#define HAVE_POST_INCREMENT -/*#define HAVE_POST_DECREMENT */ +#define HAVE_POST_INCREMENT 1 +/*#define HAVE_POST_DECREMENT 0 */ -#define HAVE_PRE_DECREMENT -/*#define HAVE_PRE_INCREMENT */ +#define HAVE_PRE_DECREMENT 1 +/*#define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/i370/i370.h b/gcc/config/i370/i370.h index 1bb4e06..22675eb 100644 --- a/gcc/config/i370/i370.h +++ b/gcc/config/i370/i370.h @@ -612,11 +612,11 @@ enum reg_class /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* These assume that REGNO is a hard or pseudo reg number. They give nonzero only if REGNO is a hard reg of the suitable class or a pseudo diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index d599c9a..9e1150b 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1606,11 +1606,11 @@ do { \ /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/i860/i860.h b/gcc/config/i860/i860.h index 316ba65..d6b2911 100644 --- a/gcc/config/i860/i860.h +++ b/gcc/config/i860/i860.h @@ -656,11 +656,11 @@ struct cumulative_args { int ints, floats; }; /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h index fac037b..31102e5 100644 --- a/gcc/config/i960/i960.h +++ b/gcc/config/i960/i960.h @@ -924,11 +924,11 @@ extern struct rtx_def *i960_function_arg (); /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h index d825f98..425b83c 100644 --- a/gcc/config/m32r/m32r.h +++ b/gcc/config/m32r/m32r.h @@ -1126,9 +1126,9 @@ do { \ /* We have post-inc load and pre-dec,pre-inc store, but only for 4 byte vals. */ #if 0 -#define HAVE_PRE_DECREMENT -#define HAVE_PRE_INCREMENT -#define HAVE_POST_INCREMENT +#define HAVE_PRE_DECREMENT 1 +#define HAVE_PRE_INCREMENT 1 +#define HAVE_POST_INCREMENT 1 #endif /* Recognize any constant value that is a valid address. */ diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 2641ab6..3db12e6 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -1281,11 +1281,11 @@ __transfer_from_trampoline () \ /* Addressing modes, and classification of registers for them. */ -#define HAVE_POST_INCREMENT -/* #define HAVE_POST_DECREMENT */ +#define HAVE_POST_INCREMENT 1 +/* #define HAVE_POST_DECREMENT 0 */ -#define HAVE_PRE_DECREMENT -/* #define HAVE_PRE_INCREMENT */ +#define HAVE_PRE_DECREMENT 1 +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/m88k/m88k.h b/gcc/config/m88k/m88k.h index 855b6bf..66d218b 100644 --- a/gcc/config/m88k/m88k.h +++ b/gcc/config/m88k/m88k.h @@ -1259,11 +1259,11 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, #define SELECT_CC_MODE(OP,X,Y) CCmode -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Recognize any constant value that is a valid address. When PIC, we do not accept an address that would require a scratch reg diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 271570d..f36398a 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2634,11 +2634,11 @@ typedef struct mips_args { /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* These assume that REGNO is a hard or pseudo reg number. They give nonzero only if REGNO is a hard reg of the suitable class diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h index 7c138a4..d2e81d1 100644 --- a/gcc/config/ns32k/ns32k.h +++ b/gcc/config/ns32k/ns32k.h @@ -808,11 +808,11 @@ __transfer_from_trampoline () \ /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 411fb99..7d31381 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -1368,11 +1368,11 @@ extern struct rtx_def *hppa_builtin_saveregs (); /* Addressing modes, and classification of registers for them. */ -#define HAVE_POST_INCREMENT -#define HAVE_POST_DECREMENT +#define HAVE_POST_INCREMENT 1 +#define HAVE_POST_DECREMENT 1 -#define HAVE_PRE_DECREMENT -#define HAVE_PRE_INCREMENT +#define HAVE_PRE_DECREMENT 1 +#define HAVE_PRE_INCREMENT 1 /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h index 55f9993..a628197 100644 --- a/gcc/config/pdp11/pdp11.h +++ b/gcc/config/pdp11/pdp11.h @@ -687,11 +687,11 @@ extern int current_function_pretend_args_size; /* Addressing modes, and classification of registers for them. */ -#define HAVE_POST_INCREMENT -/* #define HAVE_POST_DECREMENT */ +#define HAVE_POST_INCREMENT 1 +/* #define HAVE_POST_DECREMENT 0 */ -#define HAVE_PRE_DECREMENT -/* #define HAVE_PRE_INCREMENT */ +#define HAVE_PRE_DECREMENT 1 +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/pyr/pyr.h b/gcc/config/pyr/pyr.h index 42d55c0..e5ffcb8 100644 --- a/gcc/config/pyr/pyr.h +++ b/gcc/config/pyr/pyr.h @@ -803,11 +803,11 @@ extern int current_function_calls_alloca; /*** Addressing modes, and classification of registers for them. ***/ -/* #define HAVE_POST_INCREMENT */ /* pyramid has none of these */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ /* pyramid has none of these */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/romp/romp.h b/gcc/config/romp/romp.h index f307e68..82a0186 100644 --- a/gcc/config/romp/romp.h +++ b/gcc/config/romp/romp.h @@ -905,11 +905,11 @@ struct rt_cargs {int gregs, fregs; }; /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 66e9c9e..e5e6991 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1755,11 +1755,11 @@ typedef struct rs6000_args /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -#define HAVE_PRE_DECREMENT -#define HAVE_PRE_INCREMENT +#define HAVE_PRE_DECREMENT 1 +#define HAVE_PRE_INCREMENT 1 /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 8bcabc5..852a93f 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -2271,11 +2271,11 @@ extern struct rtx_def *sparc_builtin_saveregs (); /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/spur/spur.h b/gcc/config/spur/spur.h index c75caf6..e6d058a 100644 --- a/gcc/config/spur/spur.h +++ b/gcc/config/spur/spur.h @@ -586,11 +586,11 @@ extern int current_function_pretend_args_size; /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h index 3b4c549..ad8fb7c 100644 --- a/gcc/config/vax/vax.h +++ b/gcc/config/vax/vax.h @@ -579,11 +579,11 @@ gen_rtx (PLUS, Pmode, frame, GEN_INT (12)) /* Addressing modes, and classification of registers for them. */ -#define HAVE_POST_INCREMENT -/* #define HAVE_POST_DECREMENT */ +#define HAVE_POST_INCREMENT 1 +/* #define HAVE_POST_DECREMENT 0 */ -#define HAVE_PRE_DECREMENT -/* #define HAVE_PRE_INCREMENT */ +#define HAVE_PRE_DECREMENT 1 +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/we32k/we32k.h b/gcc/config/we32k/we32k.h index 07f0010..0859ec1 100644 --- a/gcc/config/we32k/we32k.h +++ b/gcc/config/we32k/we32k.h @@ -509,11 +509,11 @@ enum reg_class { NO_REGS, GENERAL_REGS, /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ +/* #define HAVE_POST_INCREMENT 0 */ +/* #define HAVE_POST_DECREMENT 0 */ -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ +/* #define HAVE_PRE_DECREMENT 0 */ +/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ @@ -5760,14 +5760,14 @@ fold_rtx (x, insn) identical powers of two with post decrement. */ if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const) - && (0 -#if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT) - || exact_log2 (INTVAL (const_arg1)) >= 0 -#endif -#if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT) - || exact_log2 (- INTVAL (const_arg1)) >= 0 -#endif - )) + && ((HAVE_PRE_INCREMENT + && exact_log2 (INTVAL (const_arg1)) >= 0) + || (HAVE_POST_INCREMENT + && exact_log2 (INTVAL (const_arg1)) >= 0) + || (HAVE_PRE_DECREMENT + && exact_log2 (- INTVAL (const_arg1)) >= 0) + || (HAVE_POST_DECREMENT + && exact_log2 (- INTVAL (const_arg1)) >= 0))) break; /* Compute the code used to compose the constants. For example, @@ -1442,40 +1442,32 @@ move_by_pieces (to, from, len, align) if (!(data.autinc_from && data.autinc_to) && move_by_pieces_ninsns (len, align) > 2) { -#ifdef HAVE_PRE_DECREMENT - if (data.reverse && ! data.autinc_from) + if (HAVE_PRE_DECREMENT && data.reverse && ! data.autinc_from) { data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len)); data.autinc_from = 1; data.explicit_inc_from = -1; } -#endif -#ifdef HAVE_POST_INCREMENT - if (! data.autinc_from) + if (HAVE_POST_INCREMENT && ! data.autinc_from) { data.from_addr = copy_addr_to_reg (from_addr); data.autinc_from = 1; data.explicit_inc_from = 1; } -#endif if (!data.autinc_from && CONSTANT_P (from_addr)) data.from_addr = copy_addr_to_reg (from_addr); -#ifdef HAVE_PRE_DECREMENT - if (data.reverse && ! data.autinc_to) + if (HAVE_PRE_DECREMENT && data.reverse && ! data.autinc_to) { data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len)); data.autinc_to = 1; data.explicit_inc_to = -1; } -#endif -#ifdef HAVE_POST_INCREMENT - if (! data.reverse && ! data.autinc_to) + if (HAVE_POST_INCREMENT && ! data.reverse && ! data.autinc_to) { data.to_addr = copy_addr_to_reg (to_addr); data.autinc_to = 1; data.explicit_inc_to = 1; } -#endif if (!data.autinc_to && CONSTANT_P (to_addr)) data.to_addr = copy_addr_to_reg (to_addr); } @@ -1586,20 +1578,16 @@ move_by_pieces_1 (genfun, mode, data) data->offset)))); MEM_IN_STRUCT_P (from1) = data->from_struct; -#ifdef HAVE_PRE_DECREMENT - if (data->explicit_inc_to < 0) + if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0) emit_insn (gen_add2_insn (data->to_addr, GEN_INT (-size))); - if (data->explicit_inc_from < 0) + if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0) emit_insn (gen_add2_insn (data->from_addr, GEN_INT (-size))); -#endif emit_insn ((*genfun) (to1, from1)); -#ifdef HAVE_POST_INCREMENT - if (data->explicit_inc_to > 0) + if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0) emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size))); - if (data->explicit_inc_from > 0) + if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0) emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size))); -#endif if (! data->reverse) data->offset += size; @@ -2267,22 +2255,18 @@ clear_by_pieces (to, len, align) if (!data.autinc_to && move_by_pieces_ninsns (len, align) > 2) { -#ifdef HAVE_PRE_DECREMENT - if (data.reverse && ! data.autinc_to) + if (HAVE_PRE_DECREMENT && data.reverse && ! data.autinc_to) { data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len)); data.autinc_to = 1; data.explicit_inc_to = -1; } -#endif -#ifdef HAVE_POST_INCREMENT - if (! data.reverse && ! data.autinc_to) + if (HAVE_POST_INCREMENT && ! data.reverse && ! data.autinc_to) { data.to_addr = copy_addr_to_reg (to_addr); data.autinc_to = 1; data.explicit_inc_to = 1; } -#endif if (!data.autinc_to && CONSTANT_P (to_addr)) data.to_addr = copy_addr_to_reg (to_addr); } @@ -2345,16 +2329,12 @@ clear_by_pieces_1 (genfun, mode, data) data->offset)))); MEM_IN_STRUCT_P (to1) = data->to_struct; -#ifdef HAVE_PRE_DECREMENT - if (data->explicit_inc_to < 0) + if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0) emit_insn (gen_add2_insn (data->to_addr, GEN_INT (-size))); -#endif emit_insn ((*genfun) (to1, const0_rtx)); -#ifdef HAVE_POST_INCREMENT - if (data->explicit_inc_to > 0) + if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0) emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size))); -#endif if (! data->reverse) data->offset += size; @@ -2444,20 +2444,14 @@ find_auto_inc (needed, x, insn) && (y = SET_SRC (set), GET_CODE (y) == PLUS) && XEXP (y, 0) == addr && GET_CODE (XEXP (y, 1)) == CONST_INT - && (0 -#ifdef HAVE_POST_INCREMENT - || (INTVAL (XEXP (y, 1)) == size && offset == 0) -#endif -#ifdef HAVE_POST_DECREMENT - || (INTVAL (XEXP (y, 1)) == - size && offset == 0) -#endif -#ifdef HAVE_PRE_INCREMENT - || (INTVAL (XEXP (y, 1)) == size && offset == size) -#endif -#ifdef HAVE_PRE_DECREMENT - || (INTVAL (XEXP (y, 1)) == - size && offset == - size) -#endif - ) + && ((HAVE_POST_INCREMENT + && (INTVAL (XEXP (y, 1)) == size && offset == 0)) + || (HAVE_POST_DECREMENT + && (INTVAL (XEXP (y, 1)) == - size && offset == 0)) + || (HAVE_PRE_INCREMENT + && (INTVAL (XEXP (y, 1)) == size && offset == size)) + || (HAVE_PRE_DECREMENT + && (INTVAL (XEXP (y, 1)) == - size && offset == - size))) /* Make sure this reg appears only once in this insn. */ && (use = find_use_as_address (PATTERN (insn), addr, offset), use != 0 && use != (rtx) 1)) @@ -3021,23 +3015,15 @@ try_pre_increment (insn, reg, amount) /* From the sign of increment, see which possibilities are conceivable on this target machine. */ -#ifdef HAVE_PRE_INCREMENT - if (amount > 0) + if (HAVE_PRE_INCREMENT && amount > 0) pre_ok = 1; -#endif -#ifdef HAVE_POST_INCREMENT - if (amount > 0) + if (HAVE_POST_INCREMENT && amount > 0) post_ok = 1; -#endif -#ifdef HAVE_PRE_DECREMENT - if (amount < 0) + if (HAVE_PRE_DECREMENT && amount < 0) pre_ok = 1; -#endif -#ifdef HAVE_POST_DECREMENT - if (amount < 0) + if (HAVE_POST_DECREMENT && amount < 0) post_ok = 1; -#endif if (! (pre_ok || post_ok)) return 0; @@ -4168,14 +4168,18 @@ strength_reduce (scan_start, end, loop_top, insn_count, if (v->giv_type == DEST_ADDR && GET_CODE (v->mult_val) == CONST_INT) { -#if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT) - if (INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode)) + if (HAVE_POST_INCREMENT + && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode)) benefit += add_cost * bl->biv_count; -#endif -#if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT) - if (-INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode)) + else if (HAVE_PRE_INCREMENT + && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode)) + benefit += add_cost * bl->biv_count; + else if (HAVE_POST_DECREMENT + && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode)) + benefit += add_cost * bl->biv_count; + else if (HAVE_PRE_DECREMENT + && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode)) benefit += add_cost * bl->biv_count; -#endif } #endif diff --git a/gcc/regclass.c b/gcc/regclass.c index 1788c3d..1c249ea 100644 --- a/gcc/regclass.c +++ b/gcc/regclass.c @@ -1770,25 +1770,21 @@ auto_inc_dec_reg_p (reg, mode) rtx reg; enum machine_mode mode; { -#ifdef HAVE_POST_INCREMENT - if (memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg))) + if (HAVE_POST_INCREMENT + && memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg))) return 1; -#endif -#ifdef HAVE_POST_DECREMENT - if (memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg))) + if (HAVE_POST_DECREMENT + && memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg))) return 1; -#endif -#ifdef HAVE_PRE_INCREMENT - if (memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg))) + if (HAVE_PRE_INCREMENT + && memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg))) return 1; -#endif -#ifdef HAVE_PRE_DECREMENT - if (memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg))) + if (HAVE_PRE_DECREMENT + && memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg))) return 1; -#endif return 0; } diff --git a/gcc/regmove.c b/gcc/regmove.c index f1353c8..937241a 100644 --- a/gcc/regmove.c +++ b/gcc/regmove.c @@ -52,9 +52,7 @@ struct match { int early_clobber[MAX_RECOG_OPERANDS]; }; -#ifdef AUTO_INC_DEC static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int)); -#endif static int find_matches PROTO((rtx, struct match *)); static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *)) ; @@ -93,7 +91,6 @@ gen_add3_insn (r0, r1, c) return (GEN_FCN (icode) (r0, r1, c)); } -#ifdef AUTO_INC_DEC /* INC_INSN is an instruction that adds INCREMENT to REG. Try to fold INC_INSN as a post/pre in/decrement into INSN. @@ -117,18 +114,14 @@ try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre) { int size = GET_MODE_SIZE (GET_MODE (use)); if (0 -#ifdef HAVE_POST_INCREMENT - || (pre == 0 && (inc_code = POST_INC, increment == size)) -#endif -#ifdef HAVE_PRE_INCREMENT - || (pre == 1 && (inc_code = PRE_INC, increment == size)) -#endif -#ifdef HAVE_POST_DECREMENT - || (pre == 0 && (inc_code = POST_DEC, increment == -size)) -#endif -#ifdef HAVE_PRE_DECREMENT - || (pre == 1 && (inc_code = PRE_DEC, increment == -size)) -#endif + || (HAVE_POST_INCREMENT + && pre == 0 && (inc_code = POST_INC, increment == size)) + || (HAVE_PRE_INCREMENT + && pre == 1 && (inc_code = PRE_INC, increment == size)) + || (HAVE_POST_DECREMENT + && pre == 0 && (inc_code = POST_DEC, increment == -size)) + || (HAVE_PRE_DECREMENT + && pre == 1 && (inc_code = PRE_DEC, increment == -size)) ) { if (inc_insn_set) @@ -156,7 +149,6 @@ try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre) } return 0; } -#endif /* AUTO_INC_DEC */ static int *regno_src_regno; @@ -1725,11 +1717,10 @@ fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number, if (code == MINUS) { post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p); -#if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) - if (search_end + if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT) + && search_end && try_auto_increment (search_end, post_inc, 0, src, newconst, 1)) post_inc = 0; -#endif validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0); REG_N_SETS (REGNO (src))++; REG_N_REFS (REGNO (src)) += true_loop_depth; @@ -1834,31 +1825,23 @@ fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number, else in the next two conditionally included code blocks. */ if (0) {;} -#if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) - else if ((code == PLUS || code == MINUS) && insn_const + else if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT) + && (code == PLUS || code == MINUS) && insn_const && try_auto_increment (p, insn, 0, src, insn_const, 1)) insn = p; -#endif -#if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) - else if (post_inc + else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT) + && post_inc && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0)) post_inc = 0; -#endif -#if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) /* If post_inc still prevails, try to find an insn where it can be used as a pre-in/decrement. If code is MINUS, this was already tried. */ if (post_inc && code == PLUS /* Check that newconst is likely to be usable in a pre-in/decrement before starting the search. */ - && (0 -#if defined (HAVE_PRE_INCREMENT) - || (newconst > 0 && newconst <= MOVE_MAX) -#endif -#if defined (HAVE_PRE_DECREMENT) - || (newconst < 0 && newconst >= -MOVE_MAX) -#endif - ) && exact_log2 (newconst)) + && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX) + || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX)) + && exact_log2 (newconst)) { rtx q, inc_dest; @@ -1895,7 +1878,6 @@ fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number, } } } -#endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */ /* Move the death note for DST to INSN if it is used there. */ if (reg_overlap_mentioned_p (dst, PATTERN (insn))) @@ -699,6 +699,22 @@ extern char *note_insn_name[]; #define AUTO_INC_DEC #endif +#ifndef HAVE_PRE_INCREMENT +#define HAVE_PRE_INCREMENT 0 +#endif + +#ifndef HAVE_PRE_DECREMENT +#define HAVE_PRE_DECREMENT 0 +#endif + +#ifndef HAVE_POST_INCREMENT +#define HAVE_POST_INCREMENT 0 +#endif + +#ifndef HAVE_POST_DECREMENT +#define HAVE_POST_DECREMENT 0 +#endif + /* Accessors for RANGE_INFO. */ /* For RANGE_{START,END} notes return the RANGE_START note. */ #define RANGE_INFO_NOTE_START(INSN) (XEXP (INSN, 0)) diff --git a/gcc/tm.texi b/gcc/tm.texi index 7a0dd0e..be5ccc9 100644 --- a/gcc/tm.texi +++ b/gcc/tm.texi @@ -4156,7 +4156,7 @@ This is about addressing modes. @table @code @findex HAVE_POST_INCREMENT @item HAVE_POST_INCREMENT -Define this macro if the machine supports post-increment addressing. +A C expression that is nonzero the machine supports post-increment addressing. @findex HAVE_PRE_INCREMENT @findex HAVE_POST_DECREMENT |