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authorClaudiu Zissulescu <claziss@gmail.com>2020-01-28 13:59:34 +0200
committerClaudiu Zissulescu <claziss@gmail.com>2020-01-28 14:00:25 +0200
commit928605936939d4364b5019b2bdda63612fbc4fdb (patch)
treede19771717d9f5dc1cdb8dcc15cd78130ebf8b62 /gcc
parent465c7c89e92a6d6d582173e505cb16dcb9873034 (diff)
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[ARC] Pass along -mcode-density flag to the assembler.
This change makes sure that if the driver is invoked with "-mcode-density" flag, then the assembler will receive it too. Note Claudiu Zissulescu: This is an old patch of which I forgot to add the test. testsuite/ 2019-09-03 Sahahb Vahedi <shahab@synopsys.com> * gcc.target/arc/code-density-flag.c: New test.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/ChangeLog4
-rw-r--r--gcc/testsuite/gcc.target/arc/code-density-flag.c34
2 files changed, 38 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d9441cb..c08bc22 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2020-01-28 Sahahb Vahedi <shahab@synopsys.com>
+
+ * gcc.target/arc/code-density-flag.c: New test
+
2020-01-28 Tobias Burnus <tobias@codesourcery.com>
PR fortran/93464
diff --git a/gcc/testsuite/gcc.target/arc/code-density-flag.c b/gcc/testsuite/gcc.target/arc/code-density-flag.c
new file mode 100644
index 0000000..1ecf1a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/code-density-flag.c
@@ -0,0 +1,34 @@
+/* Produce code-dense instructions and the assembler must *
+ * be okay with it. An example would be: *
+ * *
+ * sub_s r3, r1, r3 *
+ * *
+ * While generally for _short instructions_ , it is not *
+ * allowed to have different registers as the first and *
+ * second operands, the code-dense mode allows it. *
+ * This test is about the fact that if "-mcode-density" is *
+ * passed to gcc driver as the flag, "as" must receive it *
+ * as well, else it is going to choke on such encodings. */
+
+/* { dg-do assemble } */
+/* { dg-skip-if "" { ! { clmcpu } } } */
+/* { dg-options "-mcpu=em_mini -mcode-density" } */
+
+typedef long long uint64_t;
+
+uint64_t f1(void)
+{
+ return 1;
+}
+
+void f2(void)
+{
+ uint64_t start_us = 0;
+ while ((f1() - start_us) < 2);
+}
+
+/* This is a tricky check, because it hardcodes register *
+ * numbers. Nevertheless, it is easier than coming up with *
+ * a regular expression that the first two operands should *
+ * not be the same. */
+/* { dg-final { scan-assembler "sub_s\\s+r3,r1,r3" } } */