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| author | Chung-Ju Wu <jasonwucj@gmail.com> | 2018-05-19 14:51:09 +0000 |
|---|---|---|
| committer | Chung-Ju Wu <jasonwucj@gcc.gnu.org> | 2018-05-19 14:51:09 +0000 |
| commit | 8c9babb8517b548d5a1e398228c630cdc552455f (patch) | |
| tree | 2e530a26bfb53e64a75eae09b1a7addd4ac7d442 /gcc | |
| parent | cca59a3cfcd29b6485d4f0da92f4baa04714b5c5 (diff) | |
| download | gcc-8c9babb8517b548d5a1e398228c630cdc552455f.zip gcc-8c9babb8517b548d5a1e398228c630cdc552455f.tar.gz gcc-8c9babb8517b548d5a1e398228c630cdc552455f.tar.bz2 | |
[NDS32] Add abssi2 pattern.
gcc/
* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Add
MASK_HW_ABS.
* config/nds32/nds32.md (abssi2): New pattern.
From-SVN: r260398
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/common/config/nds32/nds32-common.c | 2 | ||||
| -rw-r--r-- | gcc/config/nds32/nds32.md | 14 |
3 files changed, 22 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2eb3960..fb25925 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-05-19 Chung-Ju Wu <jasonwucj@gmail.com> + + * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Add + MASK_HW_ABS. + * config/nds32/nds32.md (abssi2): New pattern. + 2018-05-19 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.md (rex64namesuffix): New mode attribute. diff --git a/gcc/common/config/nds32/nds32-common.c b/gcc/common/config/nds32/nds32-common.c index dbcc390..04dc864 100644 --- a/gcc/common/config/nds32/nds32-common.c +++ b/gcc/common/config/nds32/nds32-common.c @@ -103,6 +103,7 @@ static const struct default_options nds32_option_optimization_table[] = TARGET_EXT_PERF : Generate performance extention instrcution. TARGET_EXT_PERF2 : Generate performance extention version 2 instrcution. TARGET_EXT_STRING : Generate string extention instrcution. + TARGET_HW_ABS : Generate hardware abs instruction. TARGET_CMOV : Generate conditional move instruction. */ #undef TARGET_DEFAULT_TARGET_FLAGS #define TARGET_DEFAULT_TARGET_FLAGS \ @@ -113,6 +114,7 @@ static const struct default_options nds32_option_optimization_table[] = | MASK_EXT_PERF \ | MASK_EXT_PERF2 \ | MASK_EXT_STRING \ + | MASK_HW_ABS \ | MASK_CMOV) #undef TARGET_HANDLE_OPTION diff --git a/gcc/config/nds32/nds32.md b/gcc/config/nds32/nds32.md index 7e19dcd..f63ca68 100644 --- a/gcc/config/nds32/nds32.md +++ b/gcc/config/nds32/nds32.md @@ -2086,6 +2086,20 @@ ;; Performance Extension +; If -fwrapv option is issued, GCC expects there will be +; signed overflow situation. So the ABS(INT_MIN) is still INT_MIN +; (e.g. ABS(0x80000000)=0x80000000). +; However, the hardware ABS instruction of nds32 target +; always performs saturation: abs 0x80000000 -> 0x7fffffff. +; So that we can only enable abssi2 pattern if flag_wrapv is NOT presented. +(define_insn "abssi2" + [(set (match_operand:SI 0 "register_operand" "=r") + (abs:SI (match_operand:SI 1 "register_operand" " r")))] + "TARGET_EXT_PERF && TARGET_HW_ABS && !flag_wrapv" + "abs\t%0, %1" + [(set_attr "type" "alu") + (set_attr "length" "4")]) + (define_insn "clzsi2" [(set (match_operand:SI 0 "register_operand" "=r") (clz:SI (match_operand:SI 1 "register_operand" " r")))] |