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| author | Nick Clifton <nickc@cygnus.com> | 1998-08-19 10:56:21 -0600 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1998-08-19 10:56:21 -0600 |
| commit | 893779cc020424b6555cb851fd2659597174461a (patch) | |
| tree | 4a5e8babf1e3a9af986a823b85c3472af3bf6f48 /gcc | |
| parent | bb4c2bf3d8be8225c98beb11c3bb2e26c67a0d96 (diff) | |
| download | gcc-893779cc020424b6555cb851fd2659597174461a.zip gcc-893779cc020424b6555cb851fd2659597174461a.tar.gz gcc-893779cc020424b6555cb851fd2659597174461a.tar.bz2 | |
thumb.md (extendqisi2_insn): Cope with REG + OFFSET addressing.
* config/arm/thumb.md (extendqisi2_insn): Cope with REG +
OFFSET addressing.
From-SVN: r21862
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arm/thumb.md | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/gcc/config/arm/thumb.md b/gcc/config/arm/thumb.md index 0369bb1..93d0c05 100644 --- a/gcc/config/arm/thumb.md +++ b/gcc/config/arm/thumb.md @@ -484,7 +484,23 @@ { ops[1] = XEXP (XEXP (operands[1], 0), 0); ops[2] = XEXP (XEXP (operands[1], 0), 1); - output_asm_insn (\"ldrsb\\t%0, [%1, %2]\", ops); + + if (GET_CODE (ops[1]) == REG && GET_CODE (ops[2]) == REG) + output_asm_insn (\"ldrsb\\t%0, [%1, %2]\", ops); + else if (GET_CODE (ops[1]) == REG) + { + if (REGNO (ops[1]) == REGNO (operands[0])) + output_asm_insn (\"ldrb\\t%0, [%1, %2]\;lsl\\t%0, %0, #24\;asr\\t%0, %0, #24\", ops); + else + output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops); + } + else + { + if (REGNO (ops[2]) == REGNO (operands[0])) + output_asm_insn (\"ldrb\\t%0, [%2, %1]\;lsl\\t%0, %0, #24\;asr\\t%0, %0, #24\", ops); + else + output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops); + } } else if (REGNO (operands[0]) == REGNO (XEXP (operands[1], 0))) { |