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| author | Alan Modra <amodra@gmail.com> | 2016-08-03 10:12:06 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gcc.gnu.org> | 2016-08-03 10:12:06 +0930 |
| commit | 860271ec6cd4c9419f91eac6cea76ea574397d5c (patch) | |
| tree | 95504cc37370d794e9dff3494b0794392acc1815 /gcc | |
| parent | cef58349a086b8294d14514c37fbacdf44395d18 (diff) | |
| download | gcc-860271ec6cd4c9419f91eac6cea76ea574397d5c.zip gcc-860271ec6cd4c9419f91eac6cea76ea574397d5c.tar.gz gcc-860271ec6cd4c9419f91eac6cea76ea574397d5c.tar.bz2 | |
[RS6000] power8 unaligned fp load/store
According to the POWER8 Processor User’s Manual and some
experimentation on power8 hardware, unaligned fp load/store on power8
does not invoke the alignment interrupt.
* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Make scalar
float access depend on TARGET_EFFICIENT_UNALIGNED_VSX.
* config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Renamed
from -mefficient-unaligned-vector. Note that this affects fp too.
From-SVN: r239013
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.h | 8 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.opt | 4 |
3 files changed, 13 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e8de5b9..3da9eb7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2016-08-03 Alan Modra <amodra@gmail.com> + * config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Make scalar + float access depend on TARGET_EFFICIENT_UNALIGNED_VSX. + * config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Renamed + from -mefficient-unaligned-vector. Note that this affects fp too. + +2016-08-03 Alan Modra <amodra@gmail.com> + * config/rs6000/rs6000.c (rs6000_rtx_costs): Make unaligned mem cost more. diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 9b3e83b..af77258 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -990,10 +990,10 @@ enum data_align { align_abi, align_opt, align_both }; aligned to 4 or 8 bytes. */ #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) \ (STRICT_ALIGNMENT \ - || (SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) && (ALIGN) < 32) \ - || (!TARGET_EFFICIENT_UNALIGNED_VSX \ - && ((VECTOR_MODE_P (MODE) || FLOAT128_VECTOR_P (MODE)) \ - && (((int)(ALIGN)) < VECTOR_ALIGN (MODE))))) + || (!TARGET_EFFICIENT_UNALIGNED_VSX \ + && ((SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) && (ALIGN) < 32) \ + || ((VECTOR_MODE_P (MODE) || FLOAT128_VECTOR_P (MODE)) \ + && (int) (ALIGN) < VECTOR_ALIGN (MODE))))) /* Standard register usage. */ diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 9e9d33e..e47f47f 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -211,9 +211,9 @@ mallow-movmisalign Target Undocumented Var(TARGET_ALLOW_MOVMISALIGN) Init(-1) Save ; Allow the movmisalign in DF/DI vectors -mefficient-unaligned-vector +mefficient-unaligned-vsx Target Undocumented Report Mask(EFFICIENT_UNALIGNED_VSX) Var(rs6000_isa_flags) -; Consider unaligned VSX accesses to be efficient +; Consider unaligned VSX vector and fp accesses to be efficient mallow-df-permute Target Undocumented Var(TARGET_ALLOW_DF_PERMUTE) Save |