(bsetmemqi, bclrmemqi): New patterns to set bit in memory byte with

bit number dynamic (use bclr/bset instructions).

From-SVN: r8631

1 files changed, 59 insertions, 0 deletions

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 2afdedc..cfb5704 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -3831,6 +3831,65 @@
   ""
   "ror%.b %1,%0")
 
+
+;; Bit set/clear in memory byte.
+
+;; set bit, bit number is int
+(define_insn "bsetmemqi"
+  [(set (match_operand:QI 0 "memory_operand" "+m")
+	(ior:QI (subreg:QI (ashift:SI (const_int 1)
+		(match_operand:SI 1 "general_operand" "d")) 0)
+	(match_dup 0)))]
+  ""
+  "*
+{
+  CC_STATUS_INIT;
+  return \"bset %1,%0\";
+}")
+
+;; set bit, bit number is (sign/zero)_extended from HImode/QImode
+(define_insn ""
+  [(set (match_operand:QI 0 "memory_operand" "+m")
+	(ior:QI (subreg:QI (ashift:SI (const_int 1)
+	    (match_operator:SI 2 "extend_operator"
+		[(match_operand 1 "general_operand" "d")])) 0)
+	(match_dup 0)))]
+  ""
+  "*
+{
+  CC_STATUS_INIT;
+  return \"bset %1,%0\";
+}")
+
+;; clear bit, bit number is int
+(define_insn "bclrmemqi"
+  [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+m")
+	(const_int 1)
+	(minus:SI (const_int 7)
+	    (match_operand:SI 1 "general_operand" "d")))
+    (const_int 0))]
+  ""
+  "*
+{
+  CC_STATUS_INIT;
+  return \"bclr %1,%0\";
+}")
+
+;; clear bit, bit number is (sign/zero)_extended from HImode/QImode
+(define_insn ""
+  [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+m")
+	(const_int 1)
+	(minus:SI (const_int 7)
+	    (match_operator:SI 2 "extend_operator"
+		[(match_operand 1 "general_operand" "d")])))
+    (const_int 0))]
+  ""
+  "*
+{
+  CC_STATUS_INIT;
+  return \"bclr %1,%0\";
+}")
+
 ;; Special cases of bit-field insns which we should
 ;; recognize in preference to the general case.
 ;; These handle aligned 8-bit and 16-bit fields,