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| author | Serge Belyshev <1319@bot.ru> | 2004-04-01 22:45:25 +0000 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2004-04-01 14:45:25 -0800 |
| commit | 717415adaf2c79665b540000ca3203abaddc7629 (patch) | |
| tree | 8d8e835d84592ae3d9df9802e5e148ab5e48b776 /gcc | |
| parent | af5bdf6ad76dec71b64412212300e7eb1033c829 (diff) | |
| download | gcc-717415adaf2c79665b540000ca3203abaddc7629.zip gcc-717415adaf2c79665b540000ca3203abaddc7629.tar.gz gcc-717415adaf2c79665b540000ca3203abaddc7629.tar.bz2 | |
re PR target/14702 (wrong definitions of instructions mmx_pshufw, sse2_pshufd, sse2_pshuflw, sse2_pshufhw)
PR target/14702
* config/i386/i386.md: fix source operand constraints in
mmx_pshufw, sse2_pshufd, sse2_pshuflw, sse2_pshufhw
From-SVN: r80330
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 8 |
2 files changed, 10 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0d3b02b..5f47077 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2004-04-01 Serge Belyshev <1319@bot.ru> + + PR target/14702 + * config/i386/i386.md: fix source operand constraints in + mmx_pshufw, sse2_pshufd, sse2_pshuflw, sse2_pshufhw + 2004-04-01 Waldek Hebisch <hebisch@math.uni.wroc.pl> * fold-const.c (folda): Preserve types of comparisons. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 4906d35..47482a9 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -20624,7 +20624,7 @@ (define_insn "mmx_pshufw" [(set (match_operand:V4HI 0 "register_operand" "=y") - (unspec:V4HI [(match_operand:V4HI 1 "register_operand" "0") + (unspec:V4HI [(match_operand:V4HI 1 "nonimmediate_operand" "ym") (match_operand:SI 2 "immediate_operand" "i")] UNSPEC_SHUFFLE))] "TARGET_SSE || TARGET_3DNOW_A" @@ -22321,7 +22321,7 @@ (define_insn "sse2_pshufd" [(set (match_operand:V4SI 0 "register_operand" "=x") - (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "0") + (unspec:V4SI [(match_operand:V4SI 1 "nonimmediate_operand" "xm") (match_operand:SI 2 "immediate_operand" "i")] UNSPEC_SHUFFLE))] "TARGET_SSE2" @@ -22331,7 +22331,7 @@ (define_insn "sse2_pshuflw" [(set (match_operand:V8HI 0 "register_operand" "=x") - (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "0") + (unspec:V8HI [(match_operand:V8HI 1 "nonimmediate_operand" "xm") (match_operand:SI 2 "immediate_operand" "i")] UNSPEC_PSHUFLW))] "TARGET_SSE2" @@ -22341,7 +22341,7 @@ (define_insn "sse2_pshufhw" [(set (match_operand:V8HI 0 "register_operand" "=x") - (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "0") + (unspec:V8HI [(match_operand:V8HI 1 "nonimmediate_operand" "xm") (match_operand:SI 2 "immediate_operand" "i")] UNSPEC_PSHUFHW))] "TARGET_SSE2" |