i386.md (SWI1248_AVX512BWDQ_64): Rename from SWI1248_AVX512BWDQ2_64.

	* config/i386/i386.md (SWI1248_AVX512BWDQ_64): Rename from
	SWI1248_AVX512BWDQ2_64.  Unconditionally enable HImode.
	(*cmp<mode>_ccz_1): Emit kortest instead of ktest insn.
	Use SWI1248_AVX512BWDQ_64 mode iterator and enable only for
	TARGET_AVX512F.

testsuite/ChangeLog:

	* gcc.target/i386/avx512dq-pr82855.c: Update scan-assembler pattern.

From-SVN: r267286

4 files changed, 84 insertions, 76 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 53cdc83..46732eb6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2018-12-19  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.md (SWI1248_AVX512BWDQ_64): Rename from
+	SWI1248_AVX512BWDQ2_64.  Unconditionally enable HImode.
+	(*cmp<mode>_ccz_1): Emit kortest instead of ktest insn.
+	Use SWI1248_AVX512BWDQ_64 mode iterator and enable only for
+	TARGET_AVX512F.
+
 2018-12-19  Thomas Preud'homme  <thomas.preudhomme@linaro.org>
 
 	* config/arm/elf.h: Update comment about condition that need to
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6e29427..c529406 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1244,20 +1244,20 @@
 	(compare:CC (match_operand:SWI48 0 "nonimmediate_operand")
 		    (match_operand:SWI48 1 "<general_operand>")))])
 
-(define_mode_iterator SWI1248_AVX512BWDQ2_64
-  [(QI "TARGET_AVX512DQ") (HI "TARGET_AVX512DQ")
+(define_mode_iterator SWI1248_AVX512BWDQ_64
+  [(QI "TARGET_AVX512DQ") HI
    (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW && TARGET_64BIT")])
 
 (define_insn "*cmp<mode>_ccz_1"
   [(set (reg FLAGS_REG)
-	(compare (match_operand:SWI1248_AVX512BWDQ2_64 0
+	(compare (match_operand:SWI1248_AVX512BWDQ_64 0
 			"nonimmediate_operand" "<r>,?m<r>,$k")
-		 (match_operand:SWI1248_AVX512BWDQ2_64 1 "const0_operand")))]
-  "ix86_match_ccmode (insn, CCZmode)"
+		 (match_operand:SWI1248_AVX512BWDQ_64 1 "const0_operand")))]
+  "TARGET_AVX512F && ix86_match_ccmode (insn, CCZmode)"
   "@
    test{<imodesuffix>}\t%0, %0
    cmp{<imodesuffix>}\t{%1, %0|%0, %1}
-   ktest<mskmodesuffix>\t%0, %0"
+   kortest<mskmodesuffix>\t%0, %0"
   [(set_attr "type" "test,icmp,msklog")
    (set_attr "length_immediate" "0,1,*")
    (set_attr "prefix" "*,*,vex")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e199cd0..6a3ed92 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2018-12-19  Uros Bizjak  <ubizjak@gmail.com>
+
+	* gcc.target/i386/avx512dq-pr82855.c: Update scan-assembler pattern.
+
 2018-12-19  Tony Wang  <tony.wang@arm.com>
 	    Thomas Preud'homme  <thomas.preudhomme@linaro.org>
 
@@ -722,17 +726,13 @@
 	* gfortran.dg/goacc/nested-parallelism.f90: Likewise.
 
 	* gfortran.dg/goacc/loop-2.f95: Split into...
-	* gfortran.dg/goacc/loop-2-kernels-nested.f95: ... this new
-	file...
-	* gfortran.dg/goacc/loop-2-kernels-tile.f95: ..., and this new
-	file...
+	* gfortran.dg/goacc/loop-2-kernels-nested.f95: ... this new file...
+	* gfortran.dg/goacc/loop-2-kernels-tile.f95: ..., and this new file...
 	* gfortran.dg/goacc/loop-2-kernels.f95: ..., and this new file...
-	* gfortran.dg/goacc/loop-2-parallel-3.f95: ..., and this new
-	file...
+	* gfortran.dg/goacc/loop-2-parallel-3.f95: ..., and this new file...
 	* gfortran.dg/goacc/loop-2-parallel-nested.f95: ..., and this new
 	file...
-	* gfortran.dg/goacc/loop-2-parallel-tile.f95: ..., and this new
-	file...
+	* gfortran.dg/goacc/loop-2-parallel-tile.f95: ..., and this new file...
 	* gfortran.dg/goacc/loop-2-parallel.f95: ..., and this new file.
 
 	PR fortran/88420
@@ -975,8 +975,8 @@
 2018-12-05  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
 	PR testsuite/88208
-	* gcc.target/sparc/attr-aligned.c (MAXALIGN) [__sparcv9 ||
-	__arch64__]: Define.
+	* gcc.target/sparc/attr-aligned.c (MAXALIGN)
+	[__sparcv9 || __arch64__]: Define.
 
 2018-12-05  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
@@ -1105,7 +1105,7 @@
 	gnat.dg/overload2_q.ads: New testcase.
 
 2018-12-03  Fritz Reese  <fritzoreese@gmail.com>
-            Mark Eggleston  <mark.eggleston@codethink.co.uk>
+	    Mark Eggleston  <mark.eggleston@codethink.co.uk>
 
 	PR fortran/87919
 	* gfortran.dg/array_temporaries_5.f90: New test.
@@ -1903,7 +1903,7 @@
 	* c-c++-common/builtin-has-attribute-4.c: New test.
 	* c-c++-common/builtin-has-attribute.c: New test.
 	* gcc.dg/builtin-has-attribute.c: New test.
-	* gcc/testsuite/gcc.target/i386/builtin-has-attribute.c: New test.
+	* gcc.target/i386/builtin-has-attribute.c: New test.
 
 2018-11-20  Jan Hubicka  <hubicka@ucw.cz>
 
@@ -2223,8 +2223,8 @@
 
 2018-11-15  Richard Biener  <rguenther@suse.de>
 
-        PR middle-end/88029
-        * gcc.dg/tree-ssa/pr88029.c: New testcase.
+	PR middle-end/88029
+	* gcc.dg/tree-ssa/pr88029.c: New testcase.
 
 2018-11-15  Richard Biener  <rguenther@suse.de>
 
@@ -3023,7 +3023,7 @@
 
 2018-11-06  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
 
-	* gcc/testsuite/gcc.target/msp430/special-regs.c: New test.
+	* gcc.target/msp430/special-regs.c: New test.
 
 2018-11-06  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
@@ -3620,53 +3620,53 @@
 	* gfortran.dg/findloc_6.f90: New test.
 
 2018-10-26  Bill Schmidt  <wschmidt@linux.ibm.com>
-            Jinsong Ji  <jji@us.ibm.com>
-
-        * gcc.target/powerpc/sse-addss-1.c: Call abort under DEBUG also;
-        formatting cleanup.
-        * gcc.target/powerpc/sse-pavgw-1.c: Likewise.
-        * gcc.target/powerpc/sse2-addsd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvtdq2pd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvtpd2dq-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvtpd2ps-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvtps2dq-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvtps2pd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvtsd2si-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvtsd2si-2.c: Likewise.
-        * gcc.target/powerpc/sse2-cvtsd2ss-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvtss2sd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvttpd2dq-1.c: Likewise.
-        * gcc.target/powerpc/sse2-cvttsd2si-1.c: Likewise.
-        * gcc.target/powerpc/sse2-divpd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-divsd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-maxsd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-minsd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-movmskpd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-movq-1.c: Likewise.
-        * gcc.target/powerpc/sse2-movsd-3.c: Likewise.
-        * gcc.target/powerpc/sse2-mulpd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-mulsd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-packssdw-1.c: Likewise.
-        * gcc.target/powerpc/sse2-packsswb-1.c: Likewise.
-        * gcc.target/powerpc/sse2-packuswb-1.c: Likewise.
-        * gcc.target/powerpc/sse2-paddsb-1.c: Likewise.
-        * gcc.target/powerpc/sse2-paddsw-1.c: Likewise.
-        * gcc.target/powerpc/sse2-paddusb-1.c: Likewise.
-        * gcc.target/powerpc/sse2-pmovmskb-1.c: Likewise.
-        * gcc.target/powerpc/sse2-pmulhw-1.c: Likewise.
-        * gcc.target/powerpc/sse2-pmuludq1.c: Likewise.
-        * gcc.target/powerpc/sse2-psadbw-1.c: Likewise.
-        * gcc.target/powerpc/sse2-pshufd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-pshufhw-1.c: Likewise.
-        * gcc.target/powerpc/sse2-pshuflw-1.c: Likewise.
-        * gcc.target/powerpc/sse2-pslld-2.c: Likewise.
-        * gcc.target/powerpc/sse2-pslldq-1.c: Likewise.
-        * gcc.target/powerpc/sse2-psrld-1.c: Likewise.
-        * gcc.target/powerpc/sse2-psrld-2.c: Likewise.
-        * gcc.target/powerpc/sse2-psrldq-1.c: Likewise.
-        * gcc.target/powerpc/sse2-psubusb-1.c: Likewise.
-        * gcc.target/powerpc/sse2-sqrtpd-1.c: Likewise.
-        * gcc.target/powerpc/sse2-subsd-1.c: Likewise.
+	    Jinsong Ji  <jji@us.ibm.com>
+
+	* gcc.target/powerpc/sse-addss-1.c: Call abort under DEBUG also;
+	formatting cleanup.
+	* gcc.target/powerpc/sse-pavgw-1.c: Likewise.
+	* gcc.target/powerpc/sse2-addsd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvtdq2pd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvtpd2dq-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvtpd2ps-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvtps2dq-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvtps2pd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvtsd2si-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvtsd2si-2.c: Likewise.
+	* gcc.target/powerpc/sse2-cvtsd2ss-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvtss2sd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvttpd2dq-1.c: Likewise.
+	* gcc.target/powerpc/sse2-cvttsd2si-1.c: Likewise.
+	* gcc.target/powerpc/sse2-divpd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-divsd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-maxsd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-minsd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-movmskpd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-movq-1.c: Likewise.
+	* gcc.target/powerpc/sse2-movsd-3.c: Likewise.
+	* gcc.target/powerpc/sse2-mulpd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-mulsd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-packssdw-1.c: Likewise.
+	* gcc.target/powerpc/sse2-packsswb-1.c: Likewise.
+	* gcc.target/powerpc/sse2-packuswb-1.c: Likewise.
+	* gcc.target/powerpc/sse2-paddsb-1.c: Likewise.
+	* gcc.target/powerpc/sse2-paddsw-1.c: Likewise.
+	* gcc.target/powerpc/sse2-paddusb-1.c: Likewise.
+	* gcc.target/powerpc/sse2-pmovmskb-1.c: Likewise.
+	* gcc.target/powerpc/sse2-pmulhw-1.c: Likewise.
+	* gcc.target/powerpc/sse2-pmuludq1.c: Likewise.
+	* gcc.target/powerpc/sse2-psadbw-1.c: Likewise.
+	* gcc.target/powerpc/sse2-pshufd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-pshufhw-1.c: Likewise.
+	* gcc.target/powerpc/sse2-pshuflw-1.c: Likewise.
+	* gcc.target/powerpc/sse2-pslld-2.c: Likewise.
+	* gcc.target/powerpc/sse2-pslldq-1.c: Likewise.
+	* gcc.target/powerpc/sse2-psrld-1.c: Likewise.
+	* gcc.target/powerpc/sse2-psrld-2.c: Likewise.
+	* gcc.target/powerpc/sse2-psrldq-1.c: Likewise.
+	* gcc.target/powerpc/sse2-psubusb-1.c: Likewise.
+	* gcc.target/powerpc/sse2-sqrtpd-1.c: Likewise.
+	* gcc.target/powerpc/sse2-subsd-1.c: Likewise.
 
 2018-10-26  Paul A. Clarke  <pc@us.ibm.com>
 
@@ -4238,7 +4238,7 @@
 	(__builtin_ia32_vfnmaddps512_maskz): Likewise.
 	(__builtin_ia32_vfnmsubpd512_maskz): Likewise.
 	(__builtin_ia32_vfnmsubps512_maskz): Likewise.
-	* testsuite/gcc.target/i386/sse-13.c
+	* gcc.target/i386/sse-13.c
 	(__builtin_ia32_vfmsubpd512_mask): Likewise.
 	(__builtin_ia32_vfmsubpd512_maskz): Likewise.
 	(__builtin_ia32_vfmsubps512_mask): Likewise.
@@ -4249,7 +4249,7 @@
 	(__builtin_ia32_vfnmaddps512_maskz): Likewise.
 	(__builtin_ia32_vfnmsubpd512_maskz): Likewise.
 	(__builtin_ia32_vfnmsubps512_maskz): Likewise.
-	* testsuite/gcc.target/i386/sse-23.c
+	* gcc.target/i386/sse-23.c
 	(__builtin_ia32_vfmsubpd512_mask): Likewise.
 	(__builtin_ia32_vfmsubpd512_maskz): Likewise.
 	(__builtin_ia32_vfmsubps512_mask): Likewise.
@@ -5133,7 +5133,7 @@
 	* gcc.dg/stack-check-12.c: ILP32 fixup.
 	* gcc.dg/stack-check-5.c: Add AArch64 specific checks.
 	* gcc.dg/stack-check-6a.c: Skip on AArch64, we don't support this.
-	* testsuite/lib/target-supports.exp
+	* lib/target-supports.exp
 	(check_effective_target_frame_pointer_for_non_leaf): AArch64 does not
 	require frame pointer for non-leaf functions.
 
@@ -6348,9 +6348,9 @@
 2018-08-30  Qing Zhao  <qing.zhao@oracle.com>
 
 	PR testsuite/86519
-	gcc.dg/strcmpopt_6.c: Remove.
-	gcc.target/aarch64/strcmpopt_6.c: New testcase.
-	gcc.target/i386/strcmpopt_6.c: Likewise.
+	* gcc.dg/strcmpopt_6.c: Remove.
+	* gcc.target/aarch64/strcmpopt_6.c: New testcase.
+	* gcc.target/i386/strcmpopt_6.c: Likewise.
 
 2018-08-30  Richard Biener  <rguenther@suse.de>
 
@@ -6359,7 +6359,7 @@
 
 2018-08-30  Tamar Christina  <tamar.christina@arm.com>
 
- 	* gcc.target/aarch64/large_struct_copy_2.c: New.
+	* gcc.target/aarch64/large_struct_copy_2.c: New.
 
 2018-08-29  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-pr82855.c b/gcc/testsuite/gcc.target/i386/avx512dq-pr82855.c
index 563454c..76a60ea 100644
--- a/gcc/testsuite/gcc.target/i386/avx512dq-pr82855.c
+++ b/gcc/testsuite/gcc.target/i386/avx512dq-pr82855.c
@@ -1,7 +1,7 @@
 /* PR target/82855 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512vl -mavx512dq" } */
-/* { dg-final { scan-assembler {\mktestb\M} } } */
+/* { dg-final { scan-assembler {\mkortestb\M} } } */
 
 #include <immintrin.h>