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| author | Nick Clifton <nickc@gcc.gnu.org> | 2012-07-18 07:56:37 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@gcc.gnu.org> | 2012-07-18 07:56:37 +0000 |
| commit | 59194a3c611b2356baa899f55222afbcd6fd8694 (patch) | |
| tree | 9d8f0b28fcee69c10ba2238c30ae547be710e149 /gcc | |
| parent | ee04b091074db255f327f2f48831383e05baa16d (diff) | |
| download | gcc-59194a3c611b2356baa899f55222afbcd6fd8694.zip gcc-59194a3c611b2356baa899f55222afbcd6fd8694.tar.gz gcc-59194a3c611b2356baa899f55222afbcd6fd8694.tar.bz2 | |
* doc/invoke.texi (ARM Options): Document -munaligned-access.
From-SVN: r189604
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 20 |
2 files changed, 24 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ce9cea0..cb7ea3d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2012-07-18 Nick Clifton <nickc@redhat.com> + + * doc/invoke.texi (ARM Options): Document -munaligned-access. + 2012-07-18 Oleg Endo <olegendo@gcc.gnu.org> * config/sh/sh.md (mulsidi3, umulsidi3): Remove constraints in @@ -12,7 +16,7 @@ PR target/33135 * config/sh/sh.opt (mieee): Use Var instead of Mask. Correct description. - * config/sh/sh.c (sh_option_override): Do not change + * config/sh/sh.c (sh_option_override): Do not change flag_finite_math_only. Set TARGET_IEEE to complement of flag_finite_math_only. * doc/invoke.texi (SH options): Add mno-ieee. Correct description diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 1207f85..bbd99b7 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -497,7 +497,8 @@ Objective-C and Objective-C++ Dialects}. -mcaller-super-interworking -mcallee-super-interworking @gol -mtp=@var{name} -mtls-dialect=@var{dialect} @gol -mword-relocations @gol --mfix-cortex-m3-ldrd} +-mfix-cortex-m3-ldrd @gol +-munaligned-access} @emph{AVR Options} @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol @@ -11049,6 +11050,23 @@ with overlapping destination and base registers are used. This option avoids generating these instructions. This option is enabled by default when @option{-mcpu=cortex-m3} is specified. +@item -munaligned-access +@itemx -mno-unaligned-access +@opindex munaligned-access +@opindex mno-unaligned-access +Enables (or disables) reading and writing of 16- and 32- bit values +from addresses that are not 16- or 32- bit aligned. By default +unaligned access is disabled for all pre-ARMv6 and all ARMv6-M +architectures, and enabled for all other architectures. If unaligned +access is not enabled then words in packed data structures will be +accessed a byte at a time. + +The ARM attribute @code{Tag_CPU_unaligned_access} will be set in the +generated object file to either true or false, depending upon the +setting of this option. If unaligned access is enabled then the +preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be +defined. + @end table @node AVR Options |