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| author | Martin Liska <mliska@suse.cz> | 2022-10-21 12:48:02 +0200 |
|---|---|---|
| committer | Martin Liska <mliska@suse.cz> | 2022-10-21 12:48:02 +0200 |
| commit | 5776a5ffab3b92d6ccac87ccf32c580ee2742d5a (patch) | |
| tree | cbdbbff551198c5e4bba8d08d734ad74a1d0d684 /gcc | |
| parent | 4465e2a047c3b175bf6c4ca500547eb6b12df52f (diff) | |
| parent | bf3b532b524ecacb3202ab2c8af419ffaaab7cff (diff) | |
| download | gcc-5776a5ffab3b92d6ccac87ccf32c580ee2742d5a.zip gcc-5776a5ffab3b92d6ccac87ccf32c580ee2742d5a.tar.gz gcc-5776a5ffab3b92d6ccac87ccf32c580ee2742d5a.tar.bz2 | |
Merge branch 'master' into devel/sphinx
Diffstat (limited to 'gcc')
206 files changed, 10893 insertions, 1267 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 04c9dec..26fc404 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,302 @@ +2022-10-20 Aldy Hernandez <aldyh@redhat.com> + + PR c++/106654 + * value-query.cc (get_range_global): Handle non integer ranges for + default def SSA names. + +2022-10-20 Aldy Hernandez <aldyh@redhat.com> + + * range-op-float.cc (foperator_unordered_lt::op1_range): New. + (foperator_unordered_lt::op2_range): New. + +2022-10-20 Artem Klimov <jakmobius@gmail.com> + Alexander Monakov <amonakov@gcc.gnu.org> + + PR middle-end/99619 + * ipa-visibility.cc (function_and_variable_visibility): Promote + TLS access model afer visibility optimizations. + * varasm.cc (have_optimized_refs): New helper. + (optimize_dyn_tls_for_decl_p): New helper. Use it ... + (decl_default_tls_model): ... here in place of 'optimize' check. + +2022-10-20 Aldy Hernandez <aldyh@redhat.com> + + * range-op-float.cc (foperator_unordered_le::op1_range): Adjust + false side with a NAN operand. + (foperator_unordered_le::op2_range): Same. + (foperator_unordered_gt::op1_range): Same. + (foperator_unordered_gt::op2_range): Same. + (foperator_unordered_ge::op1_range): Same. + (foperator_unordered_ge::op2_range): Same. + (foperator_unordered_equal::op1_range): Same. + +2022-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR tree-optimization/107326 + * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern): Change + vectype when widening container. + +2022-10-20 Aldy Hernandez <aldyh@redhat.com> + + * value-range.h (frange::set_varying): Do not set NAN flags for + !HONOR_NANS. + * value-range.cc (frange::normalize_kind): Adjust for no NAN when + !HONOR_NANS. + (frange::verify_range): Same. + * range-op-float.cc (maybe_isnan): Remove flag_finite_math_only check. + +2022-10-20 Aldy Hernandez <aldyh@redhat.com> + + * range-op-float.cc (finite_operand_p): Remove. + (finite_operands_p): Rename to... + (maybe_isnan): ...this. + (frelop_early_resolve): Use maybe_isnan instead of finite_operands_p. + (foperator_equal::fold_range): Same. + (foperator_equal::op1_range): Same. + (foperator_not_equal::fold_range): Same. + (foperator_lt::fold_range): Same. + (foperator_le::fold_range): Same. + (foperator_gt::fold_range): Same. + (foperator_ge::fold_range): Same. + +2022-10-20 Jakub Jelinek <jakub@redhat.com> + + * passes.cc (pass_manager::register_pass): Fix a comment + typo - copmilation -> compilation. + +2022-10-20 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.cc (vect_phi_first_order_recurrence_p): + Disallow latch PHI defs. + (vectorizable_recurr): Revert previous change. + +2022-10-20 Julian Brown <julian@codesourcery.com> + + PR target/105421 + * config/gcn/gcn.cc (gcn_detect_incoming_pointer_arg): Any pointer + argument forces FLAT addressing mode, not just + pointer-to-non-aggregate. + +2022-10-20 Thomas Schwinge <thomas@codesourcery.com> + + * configure.ac (AC_CONFIG_MACRO_DIRS): Instantiate. + * configure: Regenerate. + +2022-10-20 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve-builtins.h + (gimple_folder::fold_to_cstu): New member function. + * config/aarch64/aarch64-sve-builtins.cc + (gimple_folder::fold_to_cstu): Define. + * config/aarch64/aarch64-sve-builtins-base.cc + (svcnt_bhwd_impl::fold): Use it. + +2022-10-20 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve-builtins-functions.h (quiet) + (rtx_code_function, rtx_code_function_rotated, unspec_based_function) + (unspec_based_function_rotated, unspec_based_function_exact_insn) + (unspec_based_fused_function, unspec_based_fused_lane_function): + Replace constructors with using directives. + * config/aarch64/aarch64-sve-builtins-base.cc (svcnt_bhwd_pat_impl) + (svcreate_impl, svdotprod_lane_impl, svget_impl, svld1_extend_impl) + (svld1_gather_extend_impl, svld234_impl, svldff1_gather_extend) + (svset_impl, svst1_scatter_truncate_impl, svst1_truncate_impl) + (svst234_impl, svundef_impl): Likewise. + * config/aarch64/aarch64-sve-builtins-sve2.cc + (svldnt1_gather_extend_impl, svmovl_lb_impl): Likewise. + (svstnt1_scatter_truncate_impl): Likewise. + +2022-10-20 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve-builtins-base.cc: Replace CONSTEXPR + with constexpr throughout. + * config/aarch64/aarch64-sve-builtins-functions.h: Likewise. + * config/aarch64/aarch64-sve-builtins-shapes.cc: Likewise. + * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise. + * config/aarch64/aarch64-sve-builtins.cc: Likewise. + +2022-10-20 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64-sve.md (*aarch64_brk<brk_op>_cc): Remove + merging alternative. + (*aarch64_brk<brk_op>_ptest): Likewise. + +2022-10-20 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/iterators.md (SVE_BRKP): New iterator. + * config/aarch64/aarch64-sve.md (*aarch64_brkn_cc): New pattern. + (*aarch64_brkn_ptest): Likewise. + (*aarch64_brk<brk_op>_cc): Restrict to SVE_BRKP. + (*aarch64_brk<brk_op>_ptest): Likewise. + +2022-10-20 Richard Biener <rguenther@suse.de> + + PR c/107305 + PR c/107306 + * tree-cfg.h (verify_gimple_in_seq): Add parameter to + indicate whether to emit an ICE. Add return value. + (verify_gimple_in_cfg): Likewise. + * tree-cfg.cc (verify_gimple_in_seq): Likewise. + (verify_gimple_in_cfg): Likewise. + +2022-10-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/107240 + * tree-vect-patterns.cc (vect_recog_bit_insert_pattern): Attempt to + simplify shifted value first. + +2022-10-20 Andrew MacLeod <amacleod@redhat.com> + + * gimple-range-gori.h (compute_operand_range): Make public. + * gimple-range-infer.cc (gimple_infer_range::check_assume_func): New. + (gimple_infer_range::gimple_infer_range): Check for assume calls. + * gimple-range-infer.h (check_assume_func): Add prototype. + * gimple-range.cc (assume_query::assume_range_p): New. + (assume_query::range_of_expr): New. + (assume_query::assume_query): New. + (assume_query::calculate_op): New. + (assume_query::calculate_phi): New. + (assume_query::check_taken_edge): New. + (assume_query::calculate_stmt): New. + (assume_query::dump): New. + * gimple-range.h (class assume_query): New. + * tree-vrp.cc (pass_assumptions::execute): Add processing. + +2022-10-19 Aldy Hernandez <aldyh@redhat.com> + + * range-op-float.cc (build_le): Document result. + (build_lt): Same. + (build_ge): Same. + (foperator_ge::op2_range): Check result of build_*. + (foperator_unordered_le::op1_range): Same. + (foperator_unordered_le::op2_range): Same. + (foperator_unordered_gt::op1_range): Same. + (foperator_unordered_gt::op2_range): Same. + (foperator_unordered_ge::op1_range): Same. + (foperator_unordered_ge::op2_range): Same. + +2022-10-19 Marek Polacek <polacek@redhat.com> + + PR c++/85043 + * doc/invoke.texi: Update documentation of -Wuseless-cast. + +2022-10-19 Andrew MacLeod <amacleod@redhat.com> + + * gimple-range-cache.cc (ranger_cache::range_from_dom): Use + Value_Range not int_range_max. + +2022-10-19 Aldy Hernandez <aldyh@redhat.com> + + PR tree-optimization/107312 + * range.h (range_true_and_false): Special case 1-bit signed types. + * value-range.cc (range_tests_misc): New test. + +2022-10-19 LIU Hao <lh_mouse@126.com> + + * config/i386/mingw-mcfgthread.h: New file + * config/i386/mingw32.h: Add builtin macro and default libraries + for mcfgthread when thread model is `mcf` + * config.gcc: Include 'i386/mingw-mcfgthread.h' when thread model + is `mcf` + * configure.ac: Recognize `mcf` as a valid thread model + * config.in: Regenerate + * configure: Regenerate + +2022-10-19 Lewis Hyatt <lhyatt@gmail.com> + + * gengtype.cc (output_escaped_param): Add missing const. + (get_string_option): Add missing check for option type. + (walk_type): Support new "string_length" GTY option. + (write_types_process_field): Likewise. + * ggc-common.cc (gt_pch_note_object): Add optional length argument. + * ggc.h (gt_pch_note_object): Adjust prototype for new argument. + (gt_pch_n_S2): Declare... + * stringpool.cc (gt_pch_n_S2): ...new function. + * doc/gty.texi: Document new GTY((string_length)) option. + +2022-10-19 Martin Liska <mliska@suse.cz> + + * doc/extend.texi: Remove useless @tie{} directives. + +2022-10-19 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/107206 + * tree-sra.cc (struct access): New field grp_result_of_prop_from_lhs. + (analyze_access_subtree): Do not create replacements for accesses with + this flag when not toally scalarizing. + (propagate_subaccesses_from_lhs): Set the new flag. + +2022-10-19 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> + + PR target/106355 + * config/s390/s390.cc (s390_call_saved_register_used): For a + parameter with BLKmode fix determining number of consecutive + registers. + +2022-10-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> + + * config/xtensa/xtensa-protos.h + (xtensa_split1_finished_p, xtensa_split_DI_reg_imm): New prototypes. + * config/xtensa/xtensa.cc + (xtensa_split1_finished_p, xtensa_split_DI_reg_imm, xtensa_lra_p): + New functions. + (TARGET_LRA_P): Replace the dummy hook with xtensa_lra_p. + (xt_true_regnum): Rework. + * config/xtensa/xtensa.h (CALL_REALLY_USED_REGISTERS): + Switch from CALL_USED_REGISTERS, and revise the comment. + * config/xtensa/constraints.md (Y): + Use !xtensa_split1_finished_p() instead of can_create_pseudo_p(). + * config/xtensa/predicates.md (move_operand): Ditto. + * config/xtensa/xtensa.md: Add two new split patterns: + - splits DImode immediate load into two SImode ones + - puts out-of-constraint SImode constants into the constant pool + * config/xtensa/xtensa.opt (-mlra): New target-specific option + for testing purpose. + +2022-10-19 Robin Dapp <rdapp@linux.ibm.com> + + * config/s390/s390.md: Move reload_completed and check operands for REG_P. + +2022-10-19 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/107262 + * expr.cc (convert_mode_scalar): For BFmode -> SFmode conversions + of constants, use simplify_unary_operation if fromi has VOIDmode + instead of recursive convert_mode_scalar. + +2022-10-19 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/106990 + * match.pd ((~X - ~Y) -> Y - X, -x & 1 -> x & 1): Guard with + !TYPE_OVERFLOW_SANITIZED (type). + +2022-10-19 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386-builtins.cc (ix86_bf16_ptr_type_node): Remove. + (ix86_bf16_type_node): New variable. + (ix86_register_bf16_builtin_type): If bfloat16_type_node is NULL + from generic code, set only ix86_bf16_type_node to a new REAL_TYPE + rather than bfloat16_type_node, otherwise set ix86_bf16_type_node + to bfloat16_type_node. Register __bf16 on ix86_bf16_type_node + rather than bfloat16_type_node. Don't initialize unused + ix86_bf16_ptr_type_node. + * config/i386/i386-builtin-types.def (BFLOAT16): Use + ix86_bf16_type_node rather than bfloat16_type_node. + +2022-10-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/106781 + * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): Copy + LHS removal from fixup_noreturn_call. + +2022-10-19 liuhongt <hongtao.liu@intel.com> + + PR target/107271 + * config/i386/i386-expand.cc (ix86_vec_perm_index_canon): New. + (expand_vec_perm_shufps_shufps): Call + ix86_vec_perm_index_canon + 2022-10-18 Martin Jambor <mjambor@suse.cz> * ipa-prop.h (ipa_agg_value): Remove type. diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 268d1b4..0f7d77c 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20221019 +20221021 diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog index f753d1a..375a87f 100644 --- a/gcc/analyzer/ChangeLog +++ b/gcc/analyzer/ChangeLog @@ -1,3 +1,16 @@ +2022-10-19 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/105765 + * varargs.cc (get_BT_VALIST_ARG): Rename to... + (get_va_copy_arg): ...this, and update logic for determining level + of indirection of va_copy's argument to use type of argument, + rather than looking at va_list_type_node, to correctly handle + __builtin_ms_va_copy. + (get_stateful_BT_VALIST_ARG): Rename to... + (get_stateful_va_copy_arg): ...this. + (va_list_state_machine::on_va_copy): Update for renaming. + (region_model::impl_call_va_copy): Likewise. + 2022-10-13 David Malcolm <dmalcolm@redhat.com> PR analyzer/107210 diff --git a/gcc/analyzer/varargs.cc b/gcc/analyzer/varargs.cc index b2e6cd5..20c83db 100644 --- a/gcc/analyzer/varargs.cc +++ b/gcc/analyzer/varargs.cc @@ -132,7 +132,7 @@ namespace ana { __builtin_va_start (&ap, [...]); except for the 2nd param of __builtin_va_copy, where the type - is already target-dependent (see the discussion of BT_VALIST_ARG + is already target-dependent (see the discussion of get_va_copy_arg below). */ /* Get a tree for diagnostics. @@ -147,26 +147,33 @@ get_va_list_diag_arg (tree va_list_tree) return va_list_tree; } -/* Get argument ARG_IDX of type BT_VALIST_ARG (for use by va_copy). +/* Get argument ARG_IDX of va_copy. builtin-types.def has: DEF_PRIMITIVE_TYPE (BT_VALIST_ARG, va_list_arg_type_node) and c_common_nodes_and_builtins initializes va_list_arg_type_node based on whether TREE_CODE (va_list_type_node) is of ARRAY_TYPE or - not, giving either one or zero levels of indirection. */ + not, giving either one or zero levels of indirection. + + Alternatively we could be dealing with __builtin_ms_va_copy or + __builtin_sysv_va_copy. + + Handle this by looking at the types of the argument in question. */ static const svalue * -get_BT_VALIST_ARG (const region_model *model, - region_model_context *ctxt, - const gcall *call, - unsigned arg_idx) +get_va_copy_arg (const region_model *model, + region_model_context *ctxt, + const gcall *call, + unsigned arg_idx) { tree arg = gimple_call_arg (call, arg_idx); const svalue *arg_sval = model->get_rvalue (arg, ctxt); if (const svalue *cast = arg_sval->maybe_undo_cast ()) arg_sval = cast; - if (TREE_CODE (va_list_type_node) == ARRAY_TYPE) + /* Expect a POINTER_TYPE; does it point to an array type? */ + gcc_assert (TREE_CODE (TREE_TYPE (arg)) == POINTER_TYPE); + if (TREE_CODE (TREE_TYPE (TREE_TYPE (arg))) == ARRAY_TYPE) { /* va_list_arg_type_node is a pointer to a va_list; return *ARG_SVAL. */ @@ -551,19 +558,19 @@ va_list_state_machine::check_for_ended_va_list (sm_context *sm_ctxt, usage_fnname)); } -/* Get the svalue with associated va_list_state_machine state for a - BT_VALIST_ARG for ARG_IDX of CALL, if SM_CTXT supports this, +/* Get the svalue with associated va_list_state_machine state for + ARG_IDX of CALL to va_copy, if SM_CTXT supports this, or NULL otherwise. */ static const svalue * -get_stateful_BT_VALIST_ARG (sm_context *sm_ctxt, - const gcall *call, - unsigned arg_idx) +get_stateful_va_copy_arg (sm_context *sm_ctxt, + const gcall *call, + unsigned arg_idx) { if (const program_state *new_state = sm_ctxt->get_new_program_state ()) { const region_model *new_model = new_state->m_region_model; - const svalue *arg = get_BT_VALIST_ARG (new_model, NULL, call, arg_idx); + const svalue *arg = get_va_copy_arg (new_model, NULL, call, arg_idx); return arg; } return NULL; @@ -576,7 +583,7 @@ va_list_state_machine::on_va_copy (sm_context *sm_ctxt, const supernode *node, const gcall *call) const { - const svalue *src_arg = get_stateful_BT_VALIST_ARG (sm_ctxt, call, 1); + const svalue *src_arg = get_stateful_va_copy_arg (sm_ctxt, call, 1); if (src_arg) check_for_ended_va_list (sm_ctxt, node, call, src_arg, "va_copy"); @@ -686,7 +693,7 @@ region_model::impl_call_va_copy (const call_details &cd) { const svalue *out_dst_ptr = cd.get_arg_svalue (0); const svalue *in_va_list - = get_BT_VALIST_ARG (this, cd.get_ctxt (), cd.get_call_stmt (), 1); + = get_va_copy_arg (this, cd.get_ctxt (), cd.get_call_stmt (), 1); in_va_list = check_for_poison (in_va_list, get_va_list_diag_arg (cd.get_arg_tree (1)), cd.get_ctxt ()); diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index 63076ed..bb85e78 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,19 @@ +2022-10-19 Joseph Myers <joseph@codesourcery.com> + + * c-format.h (enum format_lengths): Add FMT_LEN_w8, FMT_LEN_w16, + FMT_LEN_w32, FMT_LEN_w64, FMT_LEN_wf8, FMT_LEN_wf16, FMT_LEN_wf32 + and FMT_LEN_wf64. + (NOARGUMENTS, NOLENGTHS): Update definitions. + (T_I8, T2X_I8, T_I16, T2X_I16, T_I32, T2X_I32, T_I64, T2X_I64) + (T_U8, T2X_U8, T_U16, T2X_U16, T_U32, T2X_U32, T_U64, T2X_U64) + (T_IF8, T2X_IF8, T_IF16, T2X_IF16, T_IF32, T2X_IF32, T_IF64) + (T2X_IF64, T_UF8, T2X_UF8, T_UF16, T2X_UF16, T_UF32, T2X_UF32) + (T_UF64, T2X_UF64): New macros. + * c-format.cc (printf_length_specs, scanf_length_specs): Add wN + and wfN length modifiers. + (print_char_table, scan_char_table): Add entries using wN and wfN + length modifiers. + 2022-10-18 Joseph Myers <joseph@codesourcery.com> PR c/36113 diff --git a/gcc/c-family/c-format.cc b/gcc/c-family/c-format.cc index a202659..01adea4 100644 --- a/gcc/c-family/c-format.cc +++ b/gcc/c-family/c-format.cc @@ -488,6 +488,14 @@ static const format_length_info printf_length_specs[] = { "j", FMT_LEN_j, STD_C99, NO_FMT, 0 }, { "H", FMT_LEN_H, STD_C2X, NO_FMT, 0 }, { "D", FMT_LEN_D, STD_C2X, "DD", FMT_LEN_DD, STD_C2X, 0 }, + { "w8", FMT_LEN_w8, STD_C2X, NO_FMT, 0 }, + { "w16", FMT_LEN_w16, STD_C2X, NO_FMT, 0 }, + { "w32", FMT_LEN_w32, STD_C2X, NO_FMT, 0 }, + { "w64", FMT_LEN_w64, STD_C2X, NO_FMT, 0 }, + { "wf8", FMT_LEN_wf8, STD_C2X, NO_FMT, 0 }, + { "wf16", FMT_LEN_wf16, STD_C2X, NO_FMT, 0 }, + { "wf32", FMT_LEN_wf32, STD_C2X, NO_FMT, 0 }, + { "wf64", FMT_LEN_wf64, STD_C2X, NO_FMT, 0 }, { NO_FMT, NO_FMT, 0 } }; @@ -525,6 +533,14 @@ static const format_length_info scanf_length_specs[] = { "j", FMT_LEN_j, STD_C99, NO_FMT, 0 }, { "H", FMT_LEN_H, STD_C2X, NO_FMT, 0 }, { "D", FMT_LEN_D, STD_C2X, "DD", FMT_LEN_DD, STD_C2X, 0 }, + { "w8", FMT_LEN_w8, STD_C2X, NO_FMT, 0 }, + { "w16", FMT_LEN_w16, STD_C2X, NO_FMT, 0 }, + { "w32", FMT_LEN_w32, STD_C2X, NO_FMT, 0 }, + { "w64", FMT_LEN_w64, STD_C2X, NO_FMT, 0 }, + { "wf8", FMT_LEN_wf8, STD_C2X, NO_FMT, 0 }, + { "wf16", FMT_LEN_wf16, STD_C2X, NO_FMT, 0 }, + { "wf32", FMT_LEN_wf32, STD_C2X, NO_FMT, 0 }, + { "wf64", FMT_LEN_wf64, STD_C2X, NO_FMT, 0 }, { NO_FMT, NO_FMT, 0 } }; @@ -693,26 +709,26 @@ static const format_flag_pair strfmon_flag_pairs[] = static const format_char_info print_char_table[] = { /* C89 conversion specifiers. */ - { "di", 0, STD_C89, { T89_I, T99_SC, T89_S, T89_L, T9L_LL, TEX_LL, T99_SST, T99_PD, T99_IM, BADLEN, BADLEN, BADLEN }, "-wp0 +'I", "i", NULL }, - { "oxX", 0, STD_C89, { T89_UI, T99_UC, T89_US, T89_UL, T9L_ULL, TEX_ULL, T99_ST, T99_UPD, T99_UIM, BADLEN, BADLEN, BADLEN }, "-wp0#", "i", NULL }, - { "u", 0, STD_C89, { T89_UI, T99_UC, T89_US, T89_UL, T9L_ULL, TEX_ULL, T99_ST, T99_UPD, T99_UIM, BADLEN, BADLEN, BADLEN }, "-wp0'I", "i", NULL }, - { "fgG", 0, STD_C89, { T89_D, BADLEN, BADLEN, T99_D, BADLEN, T89_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128 }, "-wp0 +#'I", "", NULL }, - { "eE", 0, STD_C89, { T89_D, BADLEN, BADLEN, T99_D, BADLEN, T89_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128 }, "-wp0 +#I", "", NULL }, - { "c", 0, STD_C89, { T89_I, BADLEN, BADLEN, T94_WI, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-w", "", NULL }, - { "s", 1, STD_C89, { T89_C, BADLEN, BADLEN, T94_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp", "cR", NULL }, - { "p", 1, STD_C89, { T89_V, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-w", "c", NULL }, - { "n", 1, STD_C89, { T89_I, T99_SC, T89_S, T89_L, T9L_LL, BADLEN, T99_SST, T99_PD, T99_IM, BADLEN, BADLEN, BADLEN }, "", "W", NULL }, + { "di", 0, STD_C89, { T89_I, T99_SC, T89_S, T89_L, T9L_LL, TEX_LL, T99_SST, T99_PD, T99_IM, BADLEN, BADLEN, BADLEN, T2X_I8, T2X_I16, T2X_I32, T2X_I64, T2X_IF8, T2X_IF16, T2X_IF32, T2X_IF64 }, "-wp0 +'I", "i", NULL }, + { "oxX", 0, STD_C89, { T89_UI, T99_UC, T89_US, T89_UL, T9L_ULL, TEX_ULL, T99_ST, T99_UPD, T99_UIM, BADLEN, BADLEN, BADLEN, T2X_U8, T2X_U16, T2X_U32, T2X_U64, T2X_UF8, T2X_UF16, T2X_UF32, T2X_UF64 }, "-wp0#", "i", NULL }, + { "u", 0, STD_C89, { T89_UI, T99_UC, T89_US, T89_UL, T9L_ULL, TEX_ULL, T99_ST, T99_UPD, T99_UIM, BADLEN, BADLEN, BADLEN, T2X_U8, T2X_U16, T2X_U32, T2X_U64, T2X_UF8, T2X_UF16, T2X_UF32, T2X_UF64 }, "-wp0'I", "i", NULL }, + { "fgG", 0, STD_C89, { T89_D, BADLEN, BADLEN, T99_D, BADLEN, T89_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp0 +#'I", "", NULL }, + { "eE", 0, STD_C89, { T89_D, BADLEN, BADLEN, T99_D, BADLEN, T89_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp0 +#I", "", NULL }, + { "c", 0, STD_C89, { T89_I, BADLEN, BADLEN, T94_WI, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-w", "", NULL }, + { "s", 1, STD_C89, { T89_C, BADLEN, BADLEN, T94_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp", "cR", NULL }, + { "p", 1, STD_C89, { T89_V, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-w", "c", NULL }, + { "n", 1, STD_C89, { T89_I, T99_SC, T89_S, T89_L, T9L_LL, BADLEN, T99_SST, T99_PD, T99_IM, BADLEN, BADLEN, BADLEN, T2X_I8, T2X_I16, T2X_I32, T2X_I64, T2X_IF8, T2X_IF16, T2X_IF32, T2X_IF64 }, "", "W", NULL }, /* C99 conversion specifiers. */ - { "F", 0, STD_C99, { T99_D, BADLEN, BADLEN, T99_D, BADLEN, T99_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128 }, "-wp0 +#'I", "", NULL }, - { "aA", 0, STD_C99, { T99_D, BADLEN, BADLEN, T99_D, BADLEN, T99_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128 }, "-wp0 +#", "", NULL }, + { "F", 0, STD_C99, { T99_D, BADLEN, BADLEN, T99_D, BADLEN, T99_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp0 +#'I", "", NULL }, + { "aA", 0, STD_C99, { T99_D, BADLEN, BADLEN, T99_D, BADLEN, T99_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp0 +#", "", NULL }, /* C2X conversion specifiers. */ - { "b", 0, STD_C2X, { T2X_UI, T2X_UC, T2X_US, T2X_UL, T2X_ULL, TEX_ULL, T2X_ST, T2X_UPD, T2X_UIM, BADLEN, BADLEN, BADLEN }, "-wp0#", "i", NULL }, + { "b", 0, STD_C2X, { T2X_UI, T2X_UC, T2X_US, T2X_UL, T2X_ULL, TEX_ULL, T2X_ST, T2X_UPD, T2X_UIM, BADLEN, BADLEN, BADLEN, T2X_U8, T2X_U16, T2X_U32, T2X_U64, T2X_UF8, T2X_UF16, T2X_UF32, T2X_UF64 }, "-wp0#", "i", NULL }, /* X/Open conversion specifiers. */ - { "C", 0, STD_EXT, { TEX_WI, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-w", "", NULL }, - { "S", 1, STD_EXT, { TEX_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp", "R", NULL }, + { "C", 0, STD_EXT, { TEX_WI, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-w", "", NULL }, + { "S", 1, STD_EXT, { TEX_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp", "R", NULL }, /* GNU conversion specifiers. */ - { "m", 0, STD_EXT, { T89_V, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp", "", NULL }, - { "B", 0, STD_EXT, { T2X_UI, T2X_UC, T2X_US, T2X_UL, T2X_ULL, TEX_ULL, T2X_ST, T2X_UPD, T2X_UIM, BADLEN, BADLEN, BADLEN }, "-wp0#", "i", NULL }, + { "m", 0, STD_EXT, { T89_V, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp", "", NULL }, + { "B", 0, STD_EXT, { T2X_UI, T2X_UC, T2X_US, T2X_UL, T2X_ULL, TEX_ULL, T2X_ST, T2X_UPD, T2X_UIM, BADLEN, BADLEN, BADLEN, T2X_U8, T2X_U16, T2X_U32, T2X_U64, T2X_UF8, T2X_UF16, T2X_UF32, T2X_UF64 }, "-wp0#", "i", NULL }, { NULL, 0, STD_C89, NOLENGTHS, NULL, NULL, NULL } }; @@ -860,23 +876,23 @@ static const format_char_info gcc_dump_printf_char_table[] = static const format_char_info scan_char_table[] = { /* C89 conversion specifiers. */ - { "di", 1, STD_C89, { T89_I, T99_SC, T89_S, T89_L, T9L_LL, TEX_LL, T99_SST, T99_PD, T99_IM, BADLEN, BADLEN, BADLEN }, "*w'I", "W", NULL }, - { "u", 1, STD_C89, { T89_UI, T99_UC, T89_US, T89_UL, T9L_ULL, TEX_ULL, T99_ST, T99_UPD, T99_UIM, BADLEN, BADLEN, BADLEN }, "*w'I", "W", NULL }, - { "oxX", 1, STD_C89, { T89_UI, T99_UC, T89_US, T89_UL, T9L_ULL, TEX_ULL, T99_ST, T99_UPD, T99_UIM, BADLEN, BADLEN, BADLEN }, "*w", "W", NULL }, - { "efgEG", 1, STD_C89, { T89_F, BADLEN, BADLEN, T89_D, BADLEN, T89_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128 }, "*w'", "W", NULL }, - { "c", 1, STD_C89, { T89_C, BADLEN, BADLEN, T94_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*mw", "cW", NULL }, - { "s", 1, STD_C89, { T89_C, BADLEN, BADLEN, T94_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*amw", "cW", NULL }, - { "[", 1, STD_C89, { T89_C, BADLEN, BADLEN, T94_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*amw", "cW[", NULL }, - { "p", 2, STD_C89, { T89_V, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*w", "W", NULL }, - { "n", 1, STD_C89, { T89_I, T99_SC, T89_S, T89_L, T9L_LL, BADLEN, T99_SST, T99_PD, T99_IM, BADLEN, BADLEN, BADLEN }, "", "W", NULL }, + { "di", 1, STD_C89, { T89_I, T99_SC, T89_S, T89_L, T9L_LL, TEX_LL, T99_SST, T99_PD, T99_IM, BADLEN, BADLEN, BADLEN, T2X_I8, T2X_I16, T2X_I32, T2X_I64, T2X_IF8, T2X_IF16, T2X_IF32, T2X_IF64 }, "*w'I", "W", NULL }, + { "u", 1, STD_C89, { T89_UI, T99_UC, T89_US, T89_UL, T9L_ULL, TEX_ULL, T99_ST, T99_UPD, T99_UIM, BADLEN, BADLEN, BADLEN, T2X_U8, T2X_U16, T2X_U32, T2X_U64, T2X_UF8, T2X_UF16, T2X_UF32, T2X_UF64 }, "*w'I", "W", NULL }, + { "oxX", 1, STD_C89, { T89_UI, T99_UC, T89_US, T89_UL, T9L_ULL, TEX_ULL, T99_ST, T99_UPD, T99_UIM, BADLEN, BADLEN, BADLEN, T2X_U8, T2X_U16, T2X_U32, T2X_U64, T2X_UF8, T2X_UF16, T2X_UF32, T2X_UF64 }, "*w", "W", NULL }, + { "efgEG", 1, STD_C89, { T89_F, BADLEN, BADLEN, T89_D, BADLEN, T89_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*w'", "W", NULL }, + { "c", 1, STD_C89, { T89_C, BADLEN, BADLEN, T94_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*mw", "cW", NULL }, + { "s", 1, STD_C89, { T89_C, BADLEN, BADLEN, T94_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*amw", "cW", NULL }, + { "[", 1, STD_C89, { T89_C, BADLEN, BADLEN, T94_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*amw", "cW[", NULL }, + { "p", 2, STD_C89, { T89_V, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*w", "W", NULL }, + { "n", 1, STD_C89, { T89_I, T99_SC, T89_S, T89_L, T9L_LL, BADLEN, T99_SST, T99_PD, T99_IM, BADLEN, BADLEN, BADLEN, T2X_I8, T2X_I16, T2X_I32, T2X_I64, T2X_IF8, T2X_IF16, T2X_IF32, T2X_IF64 }, "", "W", NULL }, /* C99 conversion specifiers. */ - { "F", 1, STD_C99, { T99_F, BADLEN, BADLEN, T99_D, BADLEN, T99_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128 }, "*w'", "W", NULL }, - { "aA", 1, STD_C99, { T99_F, BADLEN, BADLEN, T99_D, BADLEN, T99_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128 }, "*w'", "W", NULL }, + { "F", 1, STD_C99, { T99_F, BADLEN, BADLEN, T99_D, BADLEN, T99_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*w'", "W", NULL }, + { "aA", 1, STD_C99, { T99_F, BADLEN, BADLEN, T99_D, BADLEN, T99_LD, BADLEN, BADLEN, BADLEN, T2X_D32, T2X_D64, T2X_D128, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*w'", "W", NULL }, /* C2X conversion specifiers. */ - { "b", 1, STD_C2X, { T2X_UI, T2X_UC, T2X_US, T2X_UL, T2X_ULL, TEX_ULL, T2X_ST, T2X_UPD, T2X_UIM, BADLEN, BADLEN, BADLEN }, "*w", "W", NULL }, + { "b", 1, STD_C2X, { T2X_UI, T2X_UC, T2X_US, T2X_UL, T2X_ULL, TEX_ULL, T2X_ST, T2X_UPD, T2X_UIM, BADLEN, BADLEN, BADLEN, T2X_U8, T2X_U16, T2X_U32, T2X_U64, T2X_UF8, T2X_UF16, T2X_UF32, T2X_UF64 }, "*w", "W", NULL }, /* X/Open conversion specifiers. */ - { "C", 1, STD_EXT, { TEX_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*mw", "W", NULL }, - { "S", 1, STD_EXT, { TEX_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*amw", "W", NULL }, + { "C", 1, STD_EXT, { TEX_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*mw", "W", NULL }, + { "S", 1, STD_EXT, { TEX_W, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*amw", "W", NULL }, { NULL, 0, STD_C89, NOLENGTHS, NULL, NULL, NULL } }; diff --git a/gcc/c-family/c-format.h b/gcc/c-family/c-format.h index 7f32f8d..173d3cd 100644 --- a/gcc/c-family/c-format.h +++ b/gcc/c-family/c-format.h @@ -36,6 +36,14 @@ enum format_lengths FMT_LEN_H, FMT_LEN_D, FMT_LEN_DD, + FMT_LEN_w8, + FMT_LEN_w16, + FMT_LEN_w32, + FMT_LEN_w64, + FMT_LEN_wf8, + FMT_LEN_wf16, + FMT_LEN_wf32, + FMT_LEN_wf64, FMT_LEN_w, /* GCC's HOST_WIDE_INT. */ FMT_LEN_MAX }; @@ -124,9 +132,9 @@ struct format_type_detail /* Macros to fill out tables of these. */ -#define NOARGUMENTS { T89_V, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN } +#define NOARGUMENTS { T89_V, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN } #define BADLEN { STD_C89, NULL, NULL } -#define NOLENGTHS { BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN } +#define NOLENGTHS { BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN } /* Structure describing a format conversion specifier (or a set of specifiers @@ -338,6 +346,38 @@ struct format_kind_info #define T2X_D64 { STD_C2X, "_Decimal64", T_D64 } #define T_D128 &dfloat128_type_node #define T2X_D128 { STD_C2X, "_Decimal128", T_D128 } +#define T_I8 &int_least8_type_node +#define T2X_I8 { STD_C2X, "int_least8_t", T_I8 } +#define T_I16 &int_least16_type_node +#define T2X_I16 { STD_C2X, "int_least16_t", T_I16 } +#define T_I32 &int_least32_type_node +#define T2X_I32 { STD_C2X, "int_least32_t", T_I32 } +#define T_I64 &int_least64_type_node +#define T2X_I64 { STD_C2X, "int_least64_t", T_I64 } +#define T_U8 &uint_least8_type_node +#define T2X_U8 { STD_C2X, "uint_least8_t", T_U8 } +#define T_U16 &uint_least16_type_node +#define T2X_U16 { STD_C2X, "uint_least16_t", T_U16 } +#define T_U32 &uint_least32_type_node +#define T2X_U32 { STD_C2X, "uint_least32_t", T_U32 } +#define T_U64 &uint_least64_type_node +#define T2X_U64 { STD_C2X, "uint_least64_t", T_U64 } +#define T_IF8 &int_fast8_type_node +#define T2X_IF8 { STD_C2X, "int_fast8_t", T_IF8 } +#define T_IF16 &int_fast16_type_node +#define T2X_IF16 { STD_C2X, "int_fast16_t", T_IF16 } +#define T_IF32 &int_fast32_type_node +#define T2X_IF32 { STD_C2X, "int_fast32_t", T_IF32 } +#define T_IF64 &int_fast64_type_node +#define T2X_IF64 { STD_C2X, "int_fast64_t", T_IF64 } +#define T_UF8 &uint_fast8_type_node +#define T2X_UF8 { STD_C2X, "uint_fast8_t", T_UF8 } +#define T_UF16 &uint_fast16_type_node +#define T2X_UF16 { STD_C2X, "uint_fast16_t", T_UF16 } +#define T_UF32 &uint_fast32_type_node +#define T2X_UF32 { STD_C2X, "uint_fast32_t", T_UF32 } +#define T_UF64 &uint_fast64_type_node +#define T2X_UF64 { STD_C2X, "uint_fast64_t", T_UF64 } /* Structure describing how format attributes such as "printf" are interpreted as "gnu_printf" or "ms_printf" on a particular system. diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index 7cb2e9c..76fe5fe 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,10 @@ +2022-10-20 Richard Biener <rguenther@suse.de> + + PR c/107305 + PR c/107306 + * gimple-parser.cc (c_parser_parse_gimple_body): Verify + the parsed IL and zap the body on error. + 2022-10-18 Joseph Myers <joseph@codesourcery.com> PR c/107164 diff --git a/gcc/c/gimple-parser.cc b/gcc/c/gimple-parser.cc index 5a2da2c..18ed4d4 100644 --- a/gcc/c/gimple-parser.cc +++ b/gcc/c/gimple-parser.cc @@ -364,6 +364,16 @@ c_parser_parse_gimple_body (c_parser *cparser, char *gimple_pass, cgraph_node::get_create (cfun->decl); cgraph_edge::rebuild_edges (); } + + /* Perform IL validation and if any error is found abort compilation + of this function by zapping its body. */ + if ((cfun->curr_properties & PROP_cfg) + && verify_gimple_in_cfg (cfun, false, false)) + init_empty_tree_cfg (); + else if (!(cfun->curr_properties & PROP_cfg) + && verify_gimple_in_seq (gimple_body (current_function_decl), false)) + gimple_set_body (current_function_decl, NULL); + dump_function (TDI_gimple, current_function_decl); } diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index b5c1b21..d45451c 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -253,13 +253,27 @@ get_amd_cpu (struct __processor_model *cpu_model, break; case 0x19: cpu_model->__cpu_type = AMDFAM19H; - /* AMD family 19h version 1. */ + /* AMD family 19h. */ if (model <= 0x0f) { cpu = "znver3"; CHECK___builtin_cpu_is ("znver3"); cpu_model->__cpu_subtype = AMDFAM19H_ZNVER3; } + else if ((model >= 0x10 && model <= 0x1f) + || (model >= 0x60 && model <= 0xaf)) + { + cpu = "znver4"; + CHECK___builtin_cpu_is ("znver4"); + cpu_model->__cpu_subtype = AMDFAM19H_ZNVER4; + } + else if (has_cpu_feature (cpu_model, cpu_features2, + FEATURE_AVX512F)) + { + cpu = "znver4"; + CHECK___builtin_cpu_is ("znver4"); + cpu_model->__cpu_subtype = AMDFAM19H_ZNVER4; + } else if (has_cpu_feature (cpu_model, cpu_features2, FEATURE_VAES)) { @@ -793,6 +807,10 @@ get_available_features (struct __processor_model *cpu_model, { if (eax & bit_AVXVNNI) set_feature (FEATURE_AVXVNNI); + if (eax & bit_AVXIFMA) + set_feature (FEATURE_AVXIFMA); + if (edx & bit_AVXVNNIINT8) + set_feature (FEATURE_AVXVNNIINT8); } if (avx512_usable) { diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index d6a68dc..4b01c35 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -76,6 +76,7 @@ along with GCC; see the file COPYING3. If not see (OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512F_SET) #define OPTION_MASK_ISA_AVX512IFMA_SET \ (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512F_SET) +#define OPTION_MASK_ISA2_AVXIFMA_SET OPTION_MASK_ISA2_AVXIFMA #define OPTION_MASK_ISA_AVX512VBMI_SET \ (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512BW_SET) #define OPTION_MASK_ISA2_AVX5124FMAPS_SET OPTION_MASK_ISA2_AVX5124FMAPS @@ -107,6 +108,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA2_AMX_TILE_SET OPTION_MASK_ISA2_AMX_TILE #define OPTION_MASK_ISA2_AMX_INT8_SET OPTION_MASK_ISA2_AMX_INT8 #define OPTION_MASK_ISA2_AMX_BF16_SET OPTION_MASK_ISA2_AMX_BF16 +#define OPTION_MASK_ISA2_AVXVNNIINT8_SET OPTION_MASK_ISA2_AVXVNNIINT8 /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same as -msse4.2. */ @@ -212,7 +214,8 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_AVX2_UNSET \ (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX512F_UNSET) #define OPTION_MASK_ISA2_AVX2_UNSET \ - (OPTION_MASK_ISA2_AVXVNNI_UNSET | OPTION_MASK_ISA2_AVX512F_UNSET) + (OPTION_MASK_ISA2_AVXIFMA_UNSET | OPTION_MASK_ISA2_AVXVNNI_UNSET \ + | OPTION_MASK_ISA2_AVXVNNIINT8_UNSET | OPTION_MASK_ISA2_AVX512F_UNSET) #define OPTION_MASK_ISA_AVX512F_UNSET \ (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX512CD_UNSET \ | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \ @@ -230,6 +233,7 @@ along with GCC; see the file COPYING3. If not see (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET) #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA +#define OPTION_MASK_ISA2_AVXIFMA_UNSET OPTION_MASK_ISA2_AVXIFMA #define OPTION_MASK_ISA_AVX512VBMI_UNSET OPTION_MASK_ISA_AVX512VBMI #define OPTION_MASK_ISA2_AVX5124FMAPS_UNSET OPTION_MASK_ISA2_AVX5124FMAPS #define OPTION_MASK_ISA2_AVX5124VNNIW_UNSET OPTION_MASK_ISA2_AVX5124VNNIW @@ -275,6 +279,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA2_KL_UNSET \ (OPTION_MASK_ISA2_KL | OPTION_MASK_ISA2_WIDEKL_UNSET) #define OPTION_MASK_ISA2_WIDEKL_UNSET OPTION_MASK_ISA2_WIDEKL +#define OPTION_MASK_ISA2_AVXVNNIINT8_UNSET OPTION_MASK_ISA2_AVXVNNIINT8 /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same as -mno-sse4.1. */ @@ -1124,6 +1129,39 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mavxifma: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVXIFMA_SET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVXIFMA_SET; + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET; + } + else + { + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVXIFMA_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVXIFMA_UNSET; + } + return true; + + case OPT_mavxvnniint8: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVXVNNIINT8_SET; + opts->x_ix86_isa_flags2_explicit |= + OPTION_MASK_ISA2_AVXVNNIINT8_SET; + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET; + } + else + { + opts->x_ix86_isa_flags2 &= + ~OPTION_MASK_ISA2_AVXVNNIINT8_UNSET; + opts->x_ix86_isa_flags2_explicit |= + OPTION_MASK_ISA2_AVXVNNIINT8_UNSET; + } + return true; + case OPT_mfma: if (value) { @@ -1830,7 +1868,8 @@ const char *const processor_names[] = "btver2", "znver1", "znver2", - "znver3" + "znver3", + "znver4" }; /* Guarantee that the array is aligned with enum processor_type. */ @@ -2066,37 +2105,17 @@ const pta processor_alias_table[] = | PTA_MOVBE | PTA_MWAITX, M_CPU_SUBTYPE (AMDFAM15H_BDVER4), P_PROC_AVX2}, {"znver1", PROCESSOR_ZNVER1, CPU_ZNVER1, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2 - | PTA_BMI | PTA_BMI2 | PTA_F16C | PTA_FMA | PTA_PRFCHW - | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT | PTA_FSGSBASE - | PTA_RDRND | PTA_MOVBE | PTA_MWAITX | PTA_ADX | PTA_RDSEED - | PTA_CLZERO | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES - | PTA_SHA | PTA_LZCNT | PTA_POPCNT, + PTA_ZNVER1, M_CPU_SUBTYPE (AMDFAM17H_ZNVER1), P_PROC_AVX2}, {"znver2", PROCESSOR_ZNVER2, CPU_ZNVER2, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2 - | PTA_BMI | PTA_BMI2 | PTA_F16C | PTA_FMA | PTA_PRFCHW - | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT | PTA_FSGSBASE - | PTA_RDRND | PTA_MOVBE | PTA_MWAITX | PTA_ADX | PTA_RDSEED - | PTA_CLZERO | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES - | PTA_SHA | PTA_LZCNT | PTA_POPCNT | PTA_CLWB | PTA_RDPID - | PTA_WBNOINVD, + PTA_ZNVER2, M_CPU_SUBTYPE (AMDFAM17H_ZNVER2), P_PROC_AVX2}, {"znver3", PROCESSOR_ZNVER3, CPU_ZNVER3, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2 - | PTA_BMI | PTA_BMI2 | PTA_F16C | PTA_FMA | PTA_PRFCHW - | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT | PTA_FSGSBASE - | PTA_RDRND | PTA_MOVBE | PTA_MWAITX | PTA_ADX | PTA_RDSEED - | PTA_CLZERO | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES - | PTA_SHA | PTA_LZCNT | PTA_POPCNT | PTA_CLWB | PTA_RDPID - | PTA_WBNOINVD | PTA_VAES | PTA_VPCLMULQDQ | PTA_PKU, + PTA_ZNVER3, M_CPU_SUBTYPE (AMDFAM19H_ZNVER3), P_PROC_AVX2}, + {"znver4", PROCESSOR_ZNVER4, CPU_ZNVER4, + PTA_ZNVER4, + M_CPU_SUBTYPE (AMDFAM19H_ZNVER4), P_PROC_AVX512F}, {"btver1", PROCESSOR_BTVER1, CPU_GENERIC, PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 | PTA_SSE4A | PTA_ABM | PTA_CX16 | PTA_PRFCHW diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h index 643fbd9..9893fc4 100644 --- a/gcc/common/config/i386/i386-cpuinfo.h +++ b/gcc/common/config/i386/i386-cpuinfo.h @@ -92,6 +92,7 @@ enum processor_subtypes AMDFAM19H_ZNVER3, INTEL_COREI7_ROCKETLAKE, ZHAOXIN_FAM7H_LUJIAZUI, + AMDFAM19H_ZNVER4, CPU_SUBTYPE_MAX }; @@ -240,6 +241,8 @@ enum processor_features FEATURE_X86_64_V2, FEATURE_X86_64_V3, FEATURE_X86_64_V4, + FEATURE_AVXIFMA, + FEATURE_AVXVNNIINT8, CPU_FEATURE_MAX }; diff --git a/gcc/common/config/i386/i386-isas.h b/gcc/common/config/i386/i386-isas.h index 2d0646a..8c1f351 100644 --- a/gcc/common/config/i386/i386-isas.h +++ b/gcc/common/config/i386/i386-isas.h @@ -175,4 +175,7 @@ ISA_NAMES_TABLE_START ISA_NAMES_TABLE_ENTRY("x86-64-v2", FEATURE_X86_64_V2, P_X86_64_V2, NULL) ISA_NAMES_TABLE_ENTRY("x86-64-v3", FEATURE_X86_64_V3, P_X86_64_V3, NULL) ISA_NAMES_TABLE_ENTRY("x86-64-v4", FEATURE_X86_64_V4, P_X86_64_V4, NULL) + ISA_NAMES_TABLE_ENTRY("avxifma", FEATURE_AVXIFMA, P_NONE, "-mavxifma") + ISA_NAMES_TABLE_ENTRY("avxvnniint8", FEATURE_AVXVNNIINT8, + P_NONE, "-mavxvnniint8") ISA_NAMES_TABLE_END diff --git a/gcc/config.gcc b/gcc/config.gcc index 2af30b4..160c52c 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -421,7 +421,8 @@ i[34567]86-*-* | x86_64-*-*) tsxldtrkintrin.h amxtileintrin.h amxint8intrin.h amxbf16intrin.h x86gprintrin.h uintrintrin.h hresetintrin.h keylockerintrin.h avxvnniintrin.h - mwaitintrin.h avx512fp16intrin.h avx512fp16vlintrin.h" + mwaitintrin.h avx512fp16intrin.h avx512fp16vlintrin.h + avxifmaintrin.h avxvnniint8intrin.h" ;; ia64-*-*) extra_headers=ia64intrin.h @@ -516,9 +517,11 @@ pru-*-*) riscv*) cpu_type=riscv extra_objs="riscv-builtins.o riscv-c.o riscv-sr.o riscv-shorten-memrefs.o riscv-selftests.o" - extra_objs="${extra_objs} riscv-vector-builtins.o" + extra_objs="${extra_objs} riscv-vector-builtins.o riscv-vector-builtins-shapes.o riscv-vector-builtins-bases.o" d_target_objs="riscv-d.o" extra_headers="riscv_vector.h" + target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.cc" + target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.h" ;; rs6000*-*-*) extra_options="${extra_options} g.opt fused-madd.opt rs6000/rs6000-tables.opt" @@ -657,7 +660,7 @@ c7 esther" # 64-bit x86 processors supported by --with-arch=. Each processor # MUST be separated by exactly one space. x86_64_archs="amdfam10 athlon64 athlon64-sse3 barcelona bdver1 bdver2 \ -bdver3 bdver4 znver1 znver2 znver3 btver1 btver2 k8 k8-sse3 opteron \ +bdver3 bdver4 znver1 znver2 znver3 znver4 btver1 btver2 k8 k8-sse3 opteron \ opteron-sse3 nocona core2 corei7 corei7-avx core-avx-i core-avx2 atom \ slm nehalem westmere sandybridge ivybridge haswell broadwell bonnell \ silvermont knl knm skylake-avx512 cannonlake icelake-client icelake-server \ @@ -2096,6 +2099,9 @@ i[34567]86-*-mingw* | x86_64-*-mingw*) if test x$enable_threads = xposix ; then tm_file="${tm_file} i386/mingw-pthread.h" fi + if test x$enable_threads = xmcf ; then + tm_file="${tm_file} i386/mingw-mcfgthread.h" + fi tm_file="${tm_file} i386/mingw32.h" # This makes the logic if mingw's or the w64 feature set has to be used case ${target} in @@ -3637,6 +3643,10 @@ case ${target} in arch=znver3 cpu=znver3 ;; + znver4-*) + arch=znver4 + cpu=znver4 + ;; bdver4-*) arch=bdver4 cpu=bdver4 @@ -3766,6 +3776,10 @@ case ${target} in arch=znver3 cpu=znver3 ;; + znver4-*) + arch=znver4 + cpu=znver4 + ;; bdver4-*) arch=bdver4 cpu=bdver4 diff --git a/gcc/config.in b/gcc/config.in index cc217b9..5e41748 100644 --- a/gcc/config.in +++ b/gcc/config.in @@ -1451,6 +1451,12 @@ #endif +/* Define to 1 if you have the `getauxval' function. */ +#ifndef USED_FOR_TARGET +#undef HAVE_GETAUXVAL +#endif + + /* Define to 1 if you have the `getchar_unlocked' function. */ #ifndef USED_FOR_TARGET #undef HAVE_GETCHAR_UNLOCKED @@ -2678,7 +2684,3 @@ #undef vfork #endif -/* Define to 1 if you have the `getauxval' function. */ -#ifndef USED_FOR_TARGET -#undef HAVE_GETAUXVAL -#endif diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc index 82f9eba..23b4d42 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc @@ -177,7 +177,7 @@ public: class svac_impl : public function_base { public: - CONSTEXPR svac_impl (int unspec) : m_unspec (unspec) {} + constexpr svac_impl (int unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -209,7 +209,7 @@ public: class svadr_bhwd_impl : public function_base { public: - CONSTEXPR svadr_bhwd_impl (unsigned int shift) : m_shift (shift) {} + constexpr svadr_bhwd_impl (unsigned int shift) : m_shift (shift) {} rtx expand (function_expander &e) const override @@ -259,7 +259,7 @@ public: class svbrk_binary_impl : public function_base { public: - CONSTEXPR svbrk_binary_impl (int unspec) : m_unspec (unspec) {} + constexpr svbrk_binary_impl (int unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -275,7 +275,7 @@ public: class svbrk_unary_impl : public function_base { public: - CONSTEXPR svbrk_unary_impl (int unspec) : m_unspec (unspec) {} + constexpr svbrk_unary_impl (int unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -309,7 +309,7 @@ public: class svclast_impl : public quiet<function_base> { public: - CONSTEXPR svclast_impl (int unspec) : m_unspec (unspec) {} + constexpr svclast_impl (int unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -381,7 +381,7 @@ public: class svcmp_impl : public function_base { public: - CONSTEXPR svcmp_impl (tree_code code, int unspec_for_fp) + constexpr svcmp_impl (tree_code code, int unspec_for_fp) : m_code (code), m_unspec_for_fp (unspec_for_fp) {} gimple * @@ -437,7 +437,7 @@ public: class svcmp_wide_impl : public function_base { public: - CONSTEXPR svcmp_wide_impl (tree_code code, int unspec_for_sint, + constexpr svcmp_wide_impl (tree_code code, int unspec_for_sint, int unspec_for_uint) : m_code (code), m_unspec_for_sint (unspec_for_sint), m_unspec_for_uint (unspec_for_uint) {} @@ -512,14 +512,12 @@ public: class svcnt_bhwd_impl : public function_base { public: - CONSTEXPR svcnt_bhwd_impl (machine_mode ref_mode) : m_ref_mode (ref_mode) {} + constexpr svcnt_bhwd_impl (machine_mode ref_mode) : m_ref_mode (ref_mode) {} gimple * fold (gimple_folder &f) const override { - tree count = build_int_cstu (TREE_TYPE (f.lhs), - GET_MODE_NUNITS (m_ref_mode)); - return gimple_build_assign (f.lhs, count); + return f.fold_to_cstu (GET_MODE_NUNITS (m_ref_mode)); } rtx @@ -536,8 +534,7 @@ public: class svcnt_bhwd_pat_impl : public svcnt_bhwd_impl { public: - CONSTEXPR svcnt_bhwd_pat_impl (machine_mode ref_mode) - : svcnt_bhwd_impl (ref_mode) {} + using svcnt_bhwd_impl::svcnt_bhwd_impl; gimple * fold (gimple_folder &f) const override @@ -554,10 +551,7 @@ public: unsigned int elements_per_vq = 128 / GET_MODE_UNIT_BITSIZE (m_ref_mode); HOST_WIDE_INT value = aarch64_fold_sve_cnt_pat (pattern, elements_per_vq); if (value >= 0) - { - tree count = build_int_cstu (TREE_TYPE (f.lhs), value); - return gimple_build_assign (f.lhs, count); - } + return f.fold_to_cstu (value); return NULL; } @@ -588,8 +582,7 @@ public: class svcreate_impl : public quiet<multi_vector_function> { public: - CONSTEXPR svcreate_impl (unsigned int vectors_per_tuple) - : quiet<multi_vector_function> (vectors_per_tuple) {} + using quiet<multi_vector_function>::quiet; gimple * fold (gimple_folder &f) const override @@ -722,12 +715,7 @@ public: class svdotprod_lane_impl : public unspec_based_function_base { public: - CONSTEXPR svdotprod_lane_impl (int unspec_for_sint, - int unspec_for_uint, - int unspec_for_float) - : unspec_based_function_base (unspec_for_sint, - unspec_for_uint, - unspec_for_float) {} + using unspec_based_function_base::unspec_based_function_base; rtx expand (function_expander &e) const override @@ -961,7 +949,7 @@ public: class svext_bhw_impl : public function_base { public: - CONSTEXPR svext_bhw_impl (scalar_int_mode from_mode) + constexpr svext_bhw_impl (scalar_int_mode from_mode) : m_from_mode (from_mode) {} rtx @@ -1003,8 +991,7 @@ public: class svget_impl : public quiet<multi_vector_function> { public: - CONSTEXPR svget_impl (unsigned int vectors_per_tuple) - : quiet<multi_vector_function> (vectors_per_tuple) {} + using quiet<multi_vector_function>::quiet; gimple * fold (gimple_folder &f) const override @@ -1066,7 +1053,7 @@ public: class svlast_impl : public quiet<function_base> { public: - CONSTEXPR svlast_impl (int unspec) : m_unspec (unspec) {} + constexpr svlast_impl (int unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -1118,8 +1105,7 @@ public: class svld1_extend_impl : public extending_load { public: - CONSTEXPR svld1_extend_impl (type_suffix_index memory_type) - : extending_load (memory_type) {} + using extending_load::extending_load; rtx expand (function_expander &e) const override @@ -1158,8 +1144,7 @@ public: class svld1_gather_extend_impl : public extending_load { public: - CONSTEXPR svld1_gather_extend_impl (type_suffix_index memory_type) - : extending_load (memory_type) {} + using extending_load::extending_load; rtx expand (function_expander &e) const override @@ -1289,8 +1274,7 @@ public: class svld234_impl : public full_width_access { public: - CONSTEXPR svld234_impl (unsigned int vectors_per_tuple) - : full_width_access (vectors_per_tuple) {} + using full_width_access::full_width_access; unsigned int call_properties (const function_instance &) const override @@ -1372,8 +1356,7 @@ public: class svldff1_gather_extend : public extending_load { public: - CONSTEXPR svldff1_gather_extend (type_suffix_index memory_type) - : extending_load (memory_type) {} + using extending_load::extending_load; rtx expand (function_expander &e) const override @@ -1416,7 +1399,7 @@ public: class svldxf1_impl : public full_width_access { public: - CONSTEXPR svldxf1_impl (int unspec) : m_unspec (unspec) {} + constexpr svldxf1_impl (int unspec) : m_unspec (unspec) {} unsigned int call_properties (const function_instance &) const override @@ -1443,7 +1426,7 @@ public: class svldxf1_extend_impl : public extending_load { public: - CONSTEXPR svldxf1_extend_impl (type_suffix_index memory_type, int unspec) + constexpr svldxf1_extend_impl (type_suffix_index memory_type, int unspec) : extending_load (memory_type), m_unspec (unspec) {} unsigned int @@ -1633,7 +1616,7 @@ public: class svnot_impl : public rtx_code_function { public: - CONSTEXPR svnot_impl () : rtx_code_function (NOT, NOT, -1) {} + constexpr svnot_impl () : rtx_code_function (NOT, NOT, -1) {} rtx expand (function_expander &e) const override @@ -1681,7 +1664,7 @@ public: class svpfirst_svpnext_impl : public function_base { public: - CONSTEXPR svpfirst_svpnext_impl (int unspec) : m_unspec (unspec) {} + constexpr svpfirst_svpnext_impl (int unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -1699,7 +1682,7 @@ public: class svprf_bhwd_impl : public function_base { public: - CONSTEXPR svprf_bhwd_impl (machine_mode mode) : m_mode (mode) {} + constexpr svprf_bhwd_impl (machine_mode mode) : m_mode (mode) {} unsigned int call_properties (const function_instance &) const override @@ -1723,7 +1706,7 @@ public: class svprf_bhwd_gather_impl : public function_base { public: - CONSTEXPR svprf_bhwd_gather_impl (machine_mode mode) : m_mode (mode) {} + constexpr svprf_bhwd_gather_impl (machine_mode mode) : m_mode (mode) {} unsigned int call_properties (const function_instance &) const override @@ -1761,7 +1744,7 @@ public: class svptest_impl : public function_base { public: - CONSTEXPR svptest_impl (rtx_code compare) : m_compare (compare) {} + constexpr svptest_impl (rtx_code compare) : m_compare (compare) {} rtx expand (function_expander &e) const override @@ -1866,7 +1849,7 @@ public: class svqdec_svqinc_bhwd_impl : public function_base { public: - CONSTEXPR svqdec_svqinc_bhwd_impl (rtx_code code_for_sint, + constexpr svqdec_svqinc_bhwd_impl (rtx_code code_for_sint, rtx_code code_for_uint, scalar_int_mode elem_mode) : m_code_for_sint (code_for_sint), @@ -1913,7 +1896,7 @@ public: class svqdec_bhwd_impl : public svqdec_svqinc_bhwd_impl { public: - CONSTEXPR svqdec_bhwd_impl (scalar_int_mode elem_mode) + constexpr svqdec_bhwd_impl (scalar_int_mode elem_mode) : svqdec_svqinc_bhwd_impl (SS_MINUS, US_MINUS, elem_mode) {} }; @@ -1921,7 +1904,7 @@ public: class svqinc_bhwd_impl : public svqdec_svqinc_bhwd_impl { public: - CONSTEXPR svqinc_bhwd_impl (scalar_int_mode elem_mode) + constexpr svqinc_bhwd_impl (scalar_int_mode elem_mode) : svqdec_svqinc_bhwd_impl (SS_PLUS, US_PLUS, elem_mode) {} }; @@ -1929,7 +1912,7 @@ public: class svqdecp_svqincp_impl : public function_base { public: - CONSTEXPR svqdecp_svqincp_impl (rtx_code code_for_sint, + constexpr svqdecp_svqincp_impl (rtx_code code_for_sint, rtx_code code_for_uint) : m_code_for_sint (code_for_sint), m_code_for_uint (code_for_uint) @@ -2070,8 +2053,7 @@ public: class svset_impl : public quiet<multi_vector_function> { public: - CONSTEXPR svset_impl (unsigned int vectors_per_tuple) - : quiet<multi_vector_function> (vectors_per_tuple) {} + using quiet<multi_vector_function>::quiet; gimple * fold (gimple_folder &f) const override @@ -2199,8 +2181,7 @@ public: class svst1_scatter_truncate_impl : public truncating_store { public: - CONSTEXPR svst1_scatter_truncate_impl (scalar_int_mode to_mode) - : truncating_store (to_mode) {} + using truncating_store::truncating_store; rtx expand (function_expander &e) const override @@ -2219,8 +2200,7 @@ public: class svst1_truncate_impl : public truncating_store { public: - CONSTEXPR svst1_truncate_impl (scalar_int_mode to_mode) - : truncating_store (to_mode) {} + using truncating_store::truncating_store; rtx expand (function_expander &e) const override @@ -2235,8 +2215,7 @@ public: class svst234_impl : public full_width_access { public: - CONSTEXPR svst234_impl (unsigned int vectors_per_tuple) - : full_width_access (vectors_per_tuple) {} + using full_width_access::full_width_access; unsigned int call_properties (const function_instance &) const override @@ -2296,7 +2275,7 @@ public: class svsub_impl : public rtx_code_function { public: - CONSTEXPR svsub_impl () + constexpr svsub_impl () : rtx_code_function (MINUS, MINUS, UNSPEC_COND_FSUB) {} rtx @@ -2325,7 +2304,7 @@ public: class svtrn_impl : public binary_permute { public: - CONSTEXPR svtrn_impl (int base) + constexpr svtrn_impl (int base) : binary_permute (base ? UNSPEC_TRN2 : UNSPEC_TRN1), m_base (base) {} gimple * @@ -2351,8 +2330,7 @@ public: class svundef_impl : public quiet<multi_vector_function> { public: - CONSTEXPR svundef_impl (unsigned int vectors_per_tuple) - : quiet<multi_vector_function> (vectors_per_tuple) {} + using quiet<multi_vector_function>::quiet; rtx expand (function_expander &e) const override @@ -2367,7 +2345,7 @@ public: class svunpk_impl : public quiet<function_base> { public: - CONSTEXPR svunpk_impl (bool high_p) : m_high_p (high_p) {} + constexpr svunpk_impl (bool high_p) : m_high_p (high_p) {} gimple * fold (gimple_folder &f) const override @@ -2409,7 +2387,7 @@ public: class svusdot_impl : public function_base { public: - CONSTEXPR svusdot_impl (bool su) : m_su (su) {} + constexpr svusdot_impl (bool su) : m_su (su) {} rtx expand (function_expander &e) const override @@ -2437,7 +2415,7 @@ private: class svuzp_impl : public binary_permute { public: - CONSTEXPR svuzp_impl (unsigned int base) + constexpr svuzp_impl (unsigned int base) : binary_permute (base ? UNSPEC_UZP2 : UNSPEC_UZP1), m_base (base) {} gimple * @@ -2460,7 +2438,7 @@ public: class svwhilelx_impl : public while_comparison { public: - CONSTEXPR svwhilelx_impl (int unspec_for_sint, int unspec_for_uint, bool eq_p) + constexpr svwhilelx_impl (int unspec_for_sint, int unspec_for_uint, bool eq_p) : while_comparison (unspec_for_sint, unspec_for_uint), m_eq_p (eq_p) {} @@ -2547,7 +2525,7 @@ public: class svzip_impl : public binary_permute { public: - CONSTEXPR svzip_impl (unsigned int base) + constexpr svzip_impl (unsigned int base) : binary_permute (base ? UNSPEC_ZIP2 : UNSPEC_ZIP1), m_base (base) {} gimple * diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h index b8a86e3..ec943c5 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h +++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h @@ -30,18 +30,7 @@ template<typename T> class quiet : public T { public: - CONSTEXPR quiet () : T () {} - - /* Unfortunately we can't use parameter packs yet. */ - template<typename T1> - CONSTEXPR quiet (const T1 &t1) : T (t1) {} - - template<typename T1, typename T2> - CONSTEXPR quiet (const T1 &t1, const T2 &t2) : T (t1, t2) {} - - template<typename T1, typename T2, typename T3> - CONSTEXPR quiet (const T1 &t1, const T2 &t2, const T3 &t3) - : T (t1, t2, t3) {} + using T::T; unsigned int call_properties (const function_instance &) const override @@ -55,7 +44,7 @@ public: class multi_vector_function : public function_base { public: - CONSTEXPR multi_vector_function (unsigned int vectors_per_tuple) + constexpr multi_vector_function (unsigned int vectors_per_tuple) : m_vectors_per_tuple (vectors_per_tuple) {} unsigned int @@ -74,7 +63,7 @@ public: class full_width_access : public multi_vector_function { public: - CONSTEXPR full_width_access (unsigned int vectors_per_tuple = 1) + constexpr full_width_access (unsigned int vectors_per_tuple = 1) : multi_vector_function (vectors_per_tuple) {} tree @@ -99,7 +88,7 @@ public: class extending_load : public function_base { public: - CONSTEXPR extending_load (type_suffix_index memory_type) + constexpr extending_load (type_suffix_index memory_type) : m_memory_type (memory_type) {} unsigned int @@ -142,7 +131,7 @@ public: class truncating_store : public function_base { public: - CONSTEXPR truncating_store (scalar_int_mode to_mode) : m_to_mode (to_mode) {} + constexpr truncating_store (scalar_int_mode to_mode) : m_to_mode (to_mode) {} unsigned int call_properties (const function_instance &) const override @@ -179,7 +168,7 @@ public: class rtx_code_function_base : public function_base { public: - CONSTEXPR rtx_code_function_base (rtx_code code_for_sint, + constexpr rtx_code_function_base (rtx_code code_for_sint, rtx_code code_for_uint, int unspec_for_fp = -1) : m_code_for_sint (code_for_sint), m_code_for_uint (code_for_uint), @@ -200,9 +189,7 @@ public: class rtx_code_function : public rtx_code_function_base { public: - CONSTEXPR rtx_code_function (rtx_code code_for_sint, rtx_code code_for_uint, - int unspec_for_fp = -1) - : rtx_code_function_base (code_for_sint, code_for_uint, unspec_for_fp) {} + using rtx_code_function_base::rtx_code_function_base; rtx expand (function_expander &e) const override @@ -219,10 +206,7 @@ public: class rtx_code_function_rotated : public rtx_code_function_base { public: - CONSTEXPR rtx_code_function_rotated (rtx_code code_for_sint, - rtx_code code_for_uint, - int unspec_for_fp = -1) - : rtx_code_function_base (code_for_sint, code_for_uint, unspec_for_fp) {} + using rtx_code_function_base::rtx_code_function_base; rtx expand (function_expander &e) const override @@ -243,7 +227,7 @@ public: class unspec_based_function_base : public function_base { public: - CONSTEXPR unspec_based_function_base (int unspec_for_sint, + constexpr unspec_based_function_base (int unspec_for_sint, int unspec_for_uint, int unspec_for_fp) : m_unspec_for_sint (unspec_for_sint), @@ -272,11 +256,7 @@ public: class unspec_based_function : public unspec_based_function_base { public: - CONSTEXPR unspec_based_function (int unspec_for_sint, int unspec_for_uint, - int unspec_for_fp) - : unspec_based_function_base (unspec_for_sint, unspec_for_uint, - unspec_for_fp) - {} + using unspec_based_function_base::unspec_based_function_base; rtx expand (function_expander &e) const override @@ -293,12 +273,7 @@ public: class unspec_based_function_rotated : public unspec_based_function_base { public: - CONSTEXPR unspec_based_function_rotated (int unspec_for_sint, - int unspec_for_uint, - int unspec_for_fp) - : unspec_based_function_base (unspec_for_sint, unspec_for_uint, - unspec_for_fp) - {} + using unspec_based_function_base::unspec_based_function_base; rtx expand (function_expander &e) const override @@ -321,12 +296,7 @@ template<insn_code (*CODE) (int, machine_mode)> class unspec_based_function_exact_insn : public unspec_based_function_base { public: - CONSTEXPR unspec_based_function_exact_insn (int unspec_for_sint, - int unspec_for_uint, - int unspec_for_fp) - : unspec_based_function_base (unspec_for_sint, unspec_for_uint, - unspec_for_fp) - {} + using unspec_based_function_base::unspec_based_function_base; rtx expand (function_expander &e) const override @@ -378,12 +348,7 @@ template<insn_code (*INT_CODE) (int, machine_mode)> class unspec_based_fused_function : public unspec_based_function_base { public: - CONSTEXPR unspec_based_fused_function (int unspec_for_sint, - int unspec_for_uint, - int unspec_for_fp) - : unspec_based_function_base (unspec_for_sint, unspec_for_uint, - unspec_for_fp) - {} + using unspec_based_function_base::unspec_based_function_base; rtx expand (function_expander &e) const override @@ -413,12 +378,7 @@ template<insn_code (*INT_CODE) (int, machine_mode)> class unspec_based_fused_lane_function : public unspec_based_function_base { public: - CONSTEXPR unspec_based_fused_lane_function (int unspec_for_sint, - int unspec_for_uint, - int unspec_for_fp) - : unspec_based_function_base (unspec_for_sint, unspec_for_uint, - unspec_for_fp) - {} + using unspec_based_function_base::unspec_based_function_base; rtx expand (function_expander &e) const override @@ -474,7 +434,7 @@ public: class fixed_insn_function : public function_base { public: - CONSTEXPR fixed_insn_function (insn_code code) : m_code (code) {} + constexpr fixed_insn_function (insn_code code) : m_code (code) {} rtx expand (function_expander &e) const override @@ -516,7 +476,7 @@ public: class binary_permute : public permute { public: - CONSTEXPR binary_permute (int unspec) : m_unspec (unspec) {} + constexpr binary_permute (int unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -533,13 +493,13 @@ public: class reduction : public function_base { public: - CONSTEXPR reduction (int unspec) + constexpr reduction (int unspec) : m_unspec_for_sint (unspec), m_unspec_for_uint (unspec), m_unspec_for_fp (unspec) {} - CONSTEXPR reduction (int unspec_for_sint, int unspec_for_uint, + constexpr reduction (int unspec_for_sint, int unspec_for_uint, int unspec_for_fp) : m_unspec_for_sint (unspec_for_sint), m_unspec_for_uint (unspec_for_uint), @@ -572,7 +532,7 @@ public: class shift_wide : public function_base { public: - CONSTEXPR shift_wide (rtx_code code, int wide_unspec) + constexpr shift_wide (rtx_code code, int wide_unspec) : m_code (code), m_wide_unspec (wide_unspec) {} rtx @@ -607,7 +567,7 @@ public: class unary_count : public quiet<function_base> { public: - CONSTEXPR unary_count (rtx_code code) : m_code (code) {} + constexpr unary_count (rtx_code code) : m_code (code) {} rtx expand (function_expander &e) const override @@ -630,7 +590,7 @@ public: class while_comparison : public function_base { public: - CONSTEXPR while_comparison (int unspec_for_sint, int unspec_for_uint) + constexpr while_comparison (int unspec_for_sint, int unspec_for_uint) : m_unspec_for_sint (unspec_for_sint), m_unspec_for_uint (unspec_for_uint) {} @@ -659,7 +619,7 @@ public: /* Declare the global function base NAME, creating it from an instance of class CLASS with constructor arguments ARGS. */ #define FUNCTION(NAME, CLASS, ARGS) \ - namespace { static CONSTEXPR const CLASS NAME##_obj ARGS; } \ + namespace { static constexpr const CLASS NAME##_obj ARGS; } \ namespace functions { const function_base *const NAME = &NAME##_obj; } #endif diff --git a/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc b/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc index 8e26bd8..bf1d05e 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc @@ -447,7 +447,7 @@ long_type_suffix (function_resolver &r, type_suffix_index type) /* Declare the function shape NAME, pointing it to an instance of class <NAME>_def. */ #define SHAPE(NAME) \ - static CONSTEXPR const NAME##_def NAME##_obj; \ + static constexpr const NAME##_def NAME##_obj; \ namespace shapes { const function_shape *const NAME = &NAME##_obj; } /* Base class for functions that are not overloaded. */ @@ -587,7 +587,7 @@ struct binary_imm_long_base : public overloaded_base<0> /* Base class for inc_dec and inc_dec_pat. */ struct inc_dec_base : public overloaded_base<0> { - CONSTEXPR inc_dec_base (bool pat_p) : m_pat_p (pat_p) {} + constexpr inc_dec_base (bool pat_p) : m_pat_p (pat_p) {} /* Resolve based on the first argument only, which must be either a scalar or a vector. If it's a scalar, it must be a 32-bit or @@ -1924,7 +1924,7 @@ SHAPE (get) whose size is tied to the [bhwd] suffix of "svfoo". */ struct inc_dec_def : public inc_dec_base { - CONSTEXPR inc_dec_def () : inc_dec_base (false) {} + constexpr inc_dec_def () : inc_dec_base (false) {} void build (function_builder &b, const function_group_info &group) const override @@ -1949,7 +1949,7 @@ SHAPE (inc_dec) whose size is tied to the [bhwd] suffix of "svfoo". */ struct inc_dec_pat_def : public inc_dec_base { - CONSTEXPR inc_dec_pat_def () : inc_dec_base (true) {} + constexpr inc_dec_pat_def () : inc_dec_base (true) {} void build (function_builder &b, const function_group_info &group) const override diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc b/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc index c010437..ca8f20d 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc @@ -138,8 +138,7 @@ public: class svldnt1_gather_extend_impl : public extending_load { public: - CONSTEXPR svldnt1_gather_extend_impl (type_suffix_index memory_type) - : extending_load (memory_type) {} + using extending_load::extending_load; rtx expand (function_expander &e) const override @@ -159,7 +158,7 @@ public: class svmatch_svnmatch_impl : public function_base { public: - CONSTEXPR svmatch_svnmatch_impl (int unspec) : m_unspec (unspec) {} + constexpr svmatch_svnmatch_impl (int unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -178,11 +177,7 @@ public: class svmovl_lb_impl : public unspec_based_function_base { public: - CONSTEXPR svmovl_lb_impl (int unspec_for_sint, int unspec_for_uint, - int unspec_for_fp) - : unspec_based_function_base (unspec_for_sint, unspec_for_uint, - unspec_for_fp) - {} + using unspec_based_function_base::unspec_based_function_base; rtx expand (function_expander &e) const override @@ -238,7 +233,7 @@ public: class svqrshl_impl : public unspec_based_function { public: - CONSTEXPR svqrshl_impl () + constexpr svqrshl_impl () : unspec_based_function (UNSPEC_SQRSHL, UNSPEC_UQRSHL, -1) {} gimple * @@ -272,7 +267,7 @@ public: class svqshl_impl : public unspec_based_function { public: - CONSTEXPR svqshl_impl () + constexpr svqshl_impl () : unspec_based_function (UNSPEC_SQSHL, UNSPEC_UQSHL, -1) {} gimple * @@ -308,7 +303,7 @@ public: class svrshl_impl : public unspec_based_function { public: - CONSTEXPR svrshl_impl () + constexpr svrshl_impl () : unspec_based_function (UNSPEC_SRSHL, UNSPEC_URSHL, -1) {} gimple * @@ -393,8 +388,7 @@ public: class svstnt1_scatter_truncate_impl : public truncating_store { public: - CONSTEXPR svstnt1_scatter_truncate_impl (scalar_int_mode to_mode) - : truncating_store (to_mode) {} + using truncating_store::truncating_store; rtx expand (function_expander &e) const override @@ -409,7 +403,7 @@ public: class svtbl2_impl : public quiet<multi_vector_function> { public: - CONSTEXPR svtbl2_impl () : quiet<multi_vector_function> (2) {} + constexpr svtbl2_impl () : quiet<multi_vector_function> (2) {} rtx expand (function_expander &e) const override @@ -437,7 +431,7 @@ public: class svwhilerw_svwhilewr_impl : public full_width_access { public: - CONSTEXPR svwhilerw_svwhilewr_impl (int unspec) : m_unspec (unspec) {} + constexpr svwhilerw_svwhilewr_impl (int unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc b/gcc/config/aarch64/aarch64-sve-builtins.cc index a70e3a6..37228f6 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins.cc @@ -99,7 +99,7 @@ struct registered_function_hasher : nofree_ptr_hash <registered_function> }; /* Information about each single-predicate or single-vector type. */ -static CONSTEXPR const vector_type_info vector_types[] = { +static constexpr const vector_type_info vector_types[] = { #define DEF_SVE_TYPE(ACLE_NAME, NCHARS, ABI_NAME, SCALAR_TYPE) \ { #ACLE_NAME, #ABI_NAME, "u" #NCHARS #ABI_NAME }, #include "aarch64-sve-builtins.def" @@ -116,7 +116,7 @@ static const char *const pred_suffixes[NUM_PREDS + 1] = { }; /* Static information about each mode_suffix_index. */ -CONSTEXPR const mode_suffix_info mode_suffixes[] = { +constexpr const mode_suffix_info mode_suffixes[] = { #define VECTOR_TYPE_none NUM_VECTOR_TYPES #define DEF_SVE_MODE(NAME, BASE, DISPLACEMENT, UNITS) \ { "_" #NAME, VECTOR_TYPE_##BASE, VECTOR_TYPE_##DISPLACEMENT, UNITS_##UNITS }, @@ -126,7 +126,7 @@ CONSTEXPR const mode_suffix_info mode_suffixes[] = { }; /* Static information about each type_suffix_index. */ -CONSTEXPR const type_suffix_info type_suffixes[NUM_TYPE_SUFFIXES + 1] = { +constexpr const type_suffix_info type_suffixes[NUM_TYPE_SUFFIXES + 1] = { #define DEF_SVE_TYPE_SUFFIX(NAME, ACLE_TYPE, CLASS, BITS, MODE) \ { "_" #NAME, \ VECTOR_TYPE_##ACLE_TYPE, \ @@ -522,7 +522,7 @@ static const predication_index preds_z_or_none[] = { static const predication_index preds_z[] = { PRED_z, NUM_PREDS }; /* A list of all SVE ACLE functions. */ -static CONSTEXPR const function_group_info function_groups[] = { +static constexpr const function_group_info function_groups[] = { #define DEF_SVE_FUNCTION(NAME, SHAPE, TYPES, PREDS) \ { #NAME, &functions::NAME, &shapes::SHAPE, types_##TYPES, preds_##PREDS, \ REQUIRED_EXTENSIONS | AARCH64_FL_SVE }, @@ -2615,6 +2615,13 @@ gimple_folder::redirect_call (const function_instance &instance) return call; } +/* Fold the call to constant VAL. */ +gimple * +gimple_folder::fold_to_cstu (poly_uint64 val) +{ + return gimple_build_assign (lhs, build_int_cstu (TREE_TYPE (lhs), val)); +} + /* Fold the call to a PTRUE, taking the element size from type suffix 0. */ gimple * gimple_folder::fold_to_ptrue () diff --git a/gcc/config/aarch64/aarch64-sve-builtins.h b/gcc/config/aarch64/aarch64-sve-builtins.h index 63d1db7..0d130b8 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins.h +++ b/gcc/config/aarch64/aarch64-sve-builtins.h @@ -500,6 +500,7 @@ public: tree load_store_cookie (tree); gimple *redirect_call (const function_instance &); + gimple *fold_to_cstu (poly_uint64); gimple *fold_to_pfalse (); gimple *fold_to_ptrue (); gimple *fold_to_vl_pred (unsigned int); diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index e08bee1..b8cc47e 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -9612,45 +9612,41 @@ (define_insn "*aarch64_brk<brk_op>_cc" [(set (reg:CC_NZC CC_REGNUM) (unspec:CC_NZC - [(match_operand:VNx16BI 1 "register_operand" "Upa, Upa") + [(match_operand:VNx16BI 1 "register_operand" "Upa") (match_dup 1) (match_operand:SI 4 "aarch64_sve_ptrue_flag") (unspec:VNx16BI [(match_dup 1) - (match_operand:VNx16BI 2 "register_operand" "Upa, Upa") - (match_operand:VNx16BI 3 "aarch64_simd_reg_or_zero" "Dz, 0")] + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "aarch64_simd_imm_zero")] SVE_BRK_UNARY)] UNSPEC_PTEST)) - (set (match_operand:VNx16BI 0 "register_operand" "=Upa, Upa") + (set (match_operand:VNx16BI 0 "register_operand" "=Upa") (unspec:VNx16BI [(match_dup 1) (match_dup 2) (match_dup 3)] SVE_BRK_UNARY))] "TARGET_SVE" - "@ - brk<brk_op>s\t%0.b, %1/z, %2.b - brk<brk_op>s\t%0.b, %1/m, %2.b" + "brk<brk_op>s\t%0.b, %1/z, %2.b" ) ;; Same, but with only the flags result being interesting. (define_insn "*aarch64_brk<brk_op>_ptest" [(set (reg:CC_NZC CC_REGNUM) (unspec:CC_NZC - [(match_operand:VNx16BI 1 "register_operand" "Upa, Upa") + [(match_operand:VNx16BI 1 "register_operand" "Upa") (match_dup 1) (match_operand:SI 4 "aarch64_sve_ptrue_flag") (unspec:VNx16BI [(match_dup 1) - (match_operand:VNx16BI 2 "register_operand" "Upa, Upa") - (match_operand:VNx16BI 3 "aarch64_simd_reg_or_zero" "Dz, 0")] + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "aarch64_simd_imm_zero")] SVE_BRK_UNARY)] UNSPEC_PTEST)) - (clobber (match_scratch:VNx16BI 0 "=Upa, Upa"))] + (clobber (match_scratch:VNx16BI 0 "=Upa"))] "TARGET_SVE" - "@ - brk<brk_op>s\t%0.b, %1/z, %2.b - brk<brk_op>s\t%0.b, %1/m, %2.b" + "brk<brk_op>s\t%0.b, %1/z, %2.b" ) ;; ------------------------------------------------------------------------- @@ -9677,7 +9673,61 @@ "brk<brk_op>\t%0.b, %1/z, %2.b, %<brk_reg_opno>.b" ) -;; Same, but also producing a flags result. +;; BRKN, producing both a predicate and a flags result. Unlike other +;; flag-setting instructions, these flags are always set wrt a ptrue. +(define_insn_and_rewrite "*aarch64_brkn_cc" + [(set (reg:CC_NZC CC_REGNUM) + (unspec:CC_NZC + [(match_operand:VNx16BI 4) + (match_operand:VNx16BI 5) + (const_int SVE_KNOWN_PTRUE) + (unspec:VNx16BI + [(match_operand:VNx16BI 1 "register_operand" "Upa") + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "register_operand" "0")] + UNSPEC_BRKN)] + UNSPEC_PTEST)) + (set (match_operand:VNx16BI 0 "register_operand" "=Upa") + (unspec:VNx16BI + [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_BRKN))] + "TARGET_SVE" + "brkns\t%0.b, %1/z, %2.b, %0.b" + "&& (operands[4] != CONST0_RTX (VNx16BImode) + || operands[5] != CONST0_RTX (VNx16BImode))" + { + operands[4] = CONST0_RTX (VNx16BImode); + operands[5] = CONST0_RTX (VNx16BImode); + } +) + +;; Same, but with only the flags result being interesting. +(define_insn_and_rewrite "*aarch64_brkn_ptest" + [(set (reg:CC_NZC CC_REGNUM) + (unspec:CC_NZC + [(match_operand:VNx16BI 4) + (match_operand:VNx16BI 5) + (const_int SVE_KNOWN_PTRUE) + (unspec:VNx16BI + [(match_operand:VNx16BI 1 "register_operand" "Upa") + (match_operand:VNx16BI 2 "register_operand" "Upa") + (match_operand:VNx16BI 3 "register_operand" "0")] + UNSPEC_BRKN)] + UNSPEC_PTEST)) + (clobber (match_scratch:VNx16BI 0 "=Upa"))] + "TARGET_SVE" + "brkns\t%0.b, %1/z, %2.b, %0.b" + "&& (operands[4] != CONST0_RTX (VNx16BImode) + || operands[5] != CONST0_RTX (VNx16BImode))" + { + operands[4] = CONST0_RTX (VNx16BImode); + operands[5] = CONST0_RTX (VNx16BImode); + } +) + +;; BRKPA and BRKPB, producing both a predicate and a flags result. (define_insn "*aarch64_brk<brk_op>_cc" [(set (reg:CC_NZC CC_REGNUM) (unspec:CC_NZC @@ -9687,17 +9737,17 @@ (unspec:VNx16BI [(match_dup 1) (match_operand:VNx16BI 2 "register_operand" "Upa") - (match_operand:VNx16BI 3 "register_operand" "<brk_reg_con>")] - SVE_BRK_BINARY)] + (match_operand:VNx16BI 3 "register_operand" "Upa")] + SVE_BRKP)] UNSPEC_PTEST)) (set (match_operand:VNx16BI 0 "register_operand" "=Upa") (unspec:VNx16BI [(match_dup 1) (match_dup 2) (match_dup 3)] - SVE_BRK_BINARY))] + SVE_BRKP))] "TARGET_SVE" - "brk<brk_op>s\t%0.b, %1/z, %2.b, %<brk_reg_opno>.b" + "brk<brk_op>s\t%0.b, %1/z, %2.b, %3.b" ) ;; Same, but with only the flags result being interesting. @@ -9710,12 +9760,12 @@ (unspec:VNx16BI [(match_dup 1) (match_operand:VNx16BI 2 "register_operand" "Upa") - (match_operand:VNx16BI 3 "register_operand" "<brk_reg_con>")] - SVE_BRK_BINARY)] + (match_operand:VNx16BI 3 "register_operand" "Upa")] + SVE_BRKP)] UNSPEC_PTEST)) (clobber (match_scratch:VNx16BI 0 "=Upa"))] "TARGET_SVE" - "brk<brk_op>s\t%0.b, %1/z, %2.b, %<brk_reg_opno>.b" + "brk<brk_op>s\t%0.b, %1/z, %2.b, %3.b" ) ;; ------------------------------------------------------------------------- diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 9354dbe..a8ad4e5 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -3138,6 +3138,8 @@ (define_int_iterator SVE_BRK_UNARY [UNSPEC_BRKA UNSPEC_BRKB]) +(define_int_iterator SVE_BRKP [UNSPEC_BRKPA UNSPEC_BRKPB]) + (define_int_iterator SVE_BRK_BINARY [UNSPEC_BRKN UNSPEC_BRKPA UNSPEC_BRKPB]) (define_int_iterator SVE_PITER [UNSPEC_PFIRST UNSPEC_PNEXT]) diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc index 8777255..a9ef5c3 100644 --- a/gcc/config/gcn/gcn.cc +++ b/gcc/config/gcn/gcn.cc @@ -2809,10 +2809,14 @@ gcn_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg) return (NUM_PARM_REGS - cum_num) * regsize; } -/* A normal function which takes a pointer argument (to a scalar) may be - passed a pointer to LDS space (via a high-bits-set aperture), and that only - works with FLAT addressing, not GLOBAL. Force FLAT addressing if the - function has an incoming pointer-to-scalar parameter. */ +/* A normal function which takes a pointer argument may be passed a pointer to + LDS space (via a high-bits-set aperture), and that only works with FLAT + addressing, not GLOBAL. Force FLAT addressing if the function has an + incoming pointer parameter. NOTE: This is a heuristic that works in the + offloading case, but in general, a function might read global pointer + variables, etc. that may refer to LDS space or other special memory areas + not supported by GLOBAL instructions, and then this argument check would not + suffice. */ static void gcn_detect_incoming_pointer_arg (tree fndecl) @@ -2822,8 +2826,7 @@ gcn_detect_incoming_pointer_arg (tree fndecl) for (tree arg = TYPE_ARG_TYPES (TREE_TYPE (fndecl)); arg; arg = TREE_CHAIN (arg)) - if (POINTER_TYPE_P (TREE_VALUE (arg)) - && !AGGREGATE_TYPE_P (TREE_TYPE (TREE_VALUE (arg)))) + if (POINTER_TYPE_P (TREE_VALUE (arg))) cfun->machine->use_flat_addressing = true; } diff --git a/gcc/config/i386/avx512ifmavlintrin.h b/gcc/config/i386/avx512ifmavlintrin.h index a7a50d8..506dce8 100644 --- a/gcc/config/i386/avx512ifmavlintrin.h +++ b/gcc/config/i386/avx512ifmavlintrin.h @@ -34,45 +34,26 @@ #define __DISABLE_AVX512IFMAVL__ #endif /* __AVX512IFMAVL__ */ -extern __inline __m128i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_madd52lo_epu64 (__m128i __X, __m128i __Y, __m128i __Z) -{ - return (__m128i) __builtin_ia32_vpmadd52luq128_mask ((__v2di) __X, - (__v2di) __Y, - (__v2di) __Z, - (__mmask8) -1); -} - -extern __inline __m128i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_madd52hi_epu64 (__m128i __X, __m128i __Y, __m128i __Z) -{ - return (__m128i) __builtin_ia32_vpmadd52huq128_mask ((__v2di) __X, - (__v2di) __Y, - (__v2di) __Z, - (__mmask8) -1); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_madd52lo_epu64 (__m256i __X, __m256i __Y, __m256i __Z) -{ - return (__m256i) __builtin_ia32_vpmadd52luq256_mask ((__v4di) __X, - (__v4di) __Y, - (__v4di) __Z, - (__mmask8) -1); -} - -extern __inline __m256i -__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_madd52hi_epu64 (__m256i __X, __m256i __Y, __m256i __Z) -{ - return (__m256i) __builtin_ia32_vpmadd52huq256_mask ((__v4di) __X, - (__v4di) __Y, - (__v4di) __Z, - (__mmask8) -1); -} +#define _mm_madd52lo_epu64(A, B, C) \ + ((__m128i) __builtin_ia32_vpmadd52luq128 ((__v2di) (A), \ + (__v2di) (B), \ + (__v2di) (C))) + +#define _mm_madd52hi_epu64(A, B, C) \ + ((__m128i) __builtin_ia32_vpmadd52huq128 ((__v2di) (A), \ + (__v2di) (B), \ + (__v2di) (C))) + +#define _mm256_madd52lo_epu64(A, B, C) \ + ((__m256i) __builtin_ia32_vpmadd52luq256 ((__v4di) (A), \ + (__v4di) (B), \ + (__v4di) (C))) + + +#define _mm256_madd52hi_epu64(A, B, C) \ + ((__m256i) __builtin_ia32_vpmadd52huq256 ((__v4di) (A), \ + (__v4di) (B), \ + (__v4di) (C))) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) diff --git a/gcc/config/i386/avxifmaintrin.h b/gcc/config/i386/avxifmaintrin.h new file mode 100644 index 0000000..3878d10 --- /dev/null +++ b/gcc/config/i386/avxifmaintrin.h @@ -0,0 +1,78 @@ +/* Copyright (C) 2020 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef _IMMINTRIN_H_INCLUDED +#error "Never use <avxifmaintrin.h> directly; include <immintrin.h> instead." +#endif + +#ifndef _AVXIFMAINTRIN_H_INCLUDED +#define _AVXIFMAINTRIN_H_INCLUDED + +#ifndef __AVXIFMA__ +#pragma GCC push_options +#pragma GCC target("avxifma") +#define __DISABLE_AVXIFMA__ +#endif /* __AVXIFMA__ */ + +extern __inline __m128i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_madd52lo_avx_epu64 (__m128i __X, __m128i __Y, __m128i __Z) +{ + return (__m128i) __builtin_ia32_vpmadd52luq128 ((__v2di) __X, + (__v2di) __Y, + (__v2di) __Z); +} + +extern __inline __m128i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_madd52hi_avx_epu64 (__m128i __X, __m128i __Y, __m128i __Z) +{ + return (__m128i) __builtin_ia32_vpmadd52huq128 ((__v2di) __X, + (__v2di) __Y, + (__v2di) __Z); +} + +extern __inline __m256i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_madd52lo_avx_epu64 (__m256i __X, __m256i __Y, __m256i __Z) +{ + return (__m256i) __builtin_ia32_vpmadd52luq256 ((__v4di) __X, + (__v4di) __Y, + (__v4di) __Z); +} + +extern __inline __m256i +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_madd52hi_avx_epu64 (__m256i __X, __m256i __Y, __m256i __Z) +{ + return (__m256i) __builtin_ia32_vpmadd52huq256 ((__v4di) __X, + (__v4di) __Y, + (__v4di) __Z); +} + +#ifdef __DISABLE_AVXIFMA__ +#undef __DISABLE_AVXIFMA__ +#pragma GCC pop_options +#endif /* __DISABLE_AVXIFMA__ */ + +#endif /* _AVXIFMAINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/avxvnniint8intrin.h b/gcc/config/i386/avxvnniint8intrin.h new file mode 100644 index 0000000..362e6f6 --- /dev/null +++ b/gcc/config/i386/avxvnniint8intrin.h @@ -0,0 +1,138 @@ +/* Copyright (C) 2020 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#if !defined _IMMINTRIN_H_INCLUDED +#error "Never use <avxvnniint8vlintrin.h> directly; include <immintrin.h> instead." +#endif + +#ifndef _AVXVNNIINT8INTRIN_H_INCLUDED +#define _AVXVNNIINT8INTRIN_H_INCLUDED + +#if !defined(__AVXVNNIINT8__) +#pragma GCC push_options +#pragma GCC target("avxvnniint8") +#define __DISABLE_AVXVNNIINT8__ +#endif /* __AVXVNNIINT8__ */ + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_dpbssd_epi32 (__m128i __W, __m128i __A, __m128i __B) +{ + return (__m128i) + __builtin_ia32_vpdpbssd128 ((__v4si) __W, (__v4si) __A, (__v4si) __B); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_dpbssds_epi32 (__m128i __W, __m128i __A, __m128i __B) +{ + return (__m128i) + __builtin_ia32_vpdpbssds128 ((__v4si) __W, (__v4si) __A, (__v4si) __B); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_dpbsud_epi32 (__m128i __W, __m128i __A, __m128i __B) +{ + return (__m128i) + __builtin_ia32_vpdpbsud128 ((__v4si) __W, (__v4si) __A, (__v4si) __B); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_dpbsuds_epi32 (__m128i __W, __m128i __A, __m128i __B) +{ + return (__m128i) + __builtin_ia32_vpdpbsuds128 ((__v4si) __W, (__v4si) __A, (__v4si) __B); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_dpbuud_epi32 (__m128i __W, __m128i __A, __m128i __B) +{ + return (__m128i) + __builtin_ia32_vpdpbuud128 ((__v4si) __W, (__v4si) __A, (__v4si) __B); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_dpbuuds_epi32 (__m128i __W, __m128i __A, __m128i __B) +{ + return (__m128i) + __builtin_ia32_vpdpbuuds128 ((__v4si) __W, (__v4si) __A, (__v4si) __B); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_dpbssd_epi32 (__m256i __W, __m256i __A, __m256i __B) +{ + return (__m256i) + __builtin_ia32_vpdpbssd256 ((__v8si) __W, (__v8si) __A, (__v8si) __B); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_dpbssds_epi32 (__m256i __W, __m256i __A, __m256i __B) +{ + return (__m256i) + __builtin_ia32_vpdpbssds256 ((__v8si) __W, (__v8si) __A, (__v8si) __B); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_dpbsud_epi32 (__m256i __W, __m256i __A, __m256i __B) +{ + return (__m256i) + __builtin_ia32_vpdpbsud256 ((__v8si) __W, (__v8si) __A, (__v8si) __B); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_dpbsuds_epi32 (__m256i __W, __m256i __A, __m256i __B) +{ + return (__m256i) + __builtin_ia32_vpdpbsuds256 ((__v8si) __W, (__v8si) __A, (__v8si) __B); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_dpbuud_epi32 (__m256i __W, __m256i __A, __m256i __B) +{ + return (__m256i) + __builtin_ia32_vpdpbuud256 ((__v8si) __W, (__v8si) __A, (__v8si) __B); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_dpbuuds_epi32 (__m256i __W, __m256i __A, __m256i __B) +{ + return (__m256i) + __builtin_ia32_vpdpbuuds256 ((__v8si) __W, (__v8si) __A, (__v8si) __B); +} + +#ifdef __DISABLE_AVXVNNIINT8__ +#undef __DISABLE_AVXVNNIINT8__ +#pragma GCC pop_options +#endif /* __DISABLE_AVXVNNIINT8__ */ + +#endif /* __AVXVNNIINT8INTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index a4c2fed..f5fad22 100644 --- a/gcc/config/i386/cpuid.h +++ b/gcc/config/i386/cpuid.h @@ -28,6 +28,7 @@ #define bit_AVXVNNI (1 << 4) #define bit_AVX512BF16 (1 << 5) #define bit_HRESET (1 << 22) +#define bit_AVXIFMA (1 << 23) /* %ecx */ #define bit_SSE3 (1 << 0) @@ -48,6 +49,7 @@ #define bit_RDRND (1 << 30) /* %edx */ +#define bit_AVXVNNIINT8 (1 << 4) #define bit_CMPXCHG8B (1 << 8) #define bit_CMOV (1 << 15) #define bit_MMX (1 << 23) diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc index ef56704..aa16895 100644 --- a/gcc/config/i386/driver-i386.cc +++ b/gcc/config/i386/driver-i386.cc @@ -465,6 +465,8 @@ const char *host_detect_local_cpu (int argc, const char **argv) processor = PROCESSOR_GEODE; else if (has_feature (FEATURE_MOVBE) && family == 22) processor = PROCESSOR_BTVER2; + else if (has_feature (FEATURE_AVX512F)) + processor = PROCESSOR_ZNVER4; else if (has_feature (FEATURE_VAES)) processor = PROCESSOR_ZNVER3; else if (has_feature (FEATURE_CLWB)) @@ -779,6 +781,9 @@ const char *host_detect_local_cpu (int argc, const char **argv) case PROCESSOR_ZNVER3: cpu = "znver3"; break; + case PROCESSOR_ZNVER4: + cpu = "znver4"; + break; case PROCESSOR_BTVER1: cpu = "btver1"; break; diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index dea52a2..e35306e 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -2486,18 +2486,22 @@ BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_avx512bw_ucmpv64qi3_mask, "__builti BDESC (OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_avx512bw_ucmpv32hi3_mask, "__builtin_ia32_ucmpw512_mask", IX86_BUILTIN_UCMPW512, UNKNOWN, (int) USI_FTYPE_V32HI_V32HI_INT_USI) /* AVX512IFMA */ -BDESC (OPTION_MASK_ISA_AVX512IFMA, 0, CODE_FOR_vpamdd52luqv8di_mask, "__builtin_ia32_vpmadd52luq512_mask", IX86_BUILTIN_VPMADD52LUQ512, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA, 0, CODE_FOR_vpamdd52luqv8di_maskz, "__builtin_ia32_vpmadd52luq512_maskz", IX86_BUILTIN_VPMADD52LUQ512_MASKZ, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA, 0, CODE_FOR_vpamdd52huqv8di_mask, "__builtin_ia32_vpmadd52huq512_mask", IX86_BUILTIN_VPMADD52HUQ512, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA, 0, CODE_FOR_vpamdd52huqv8di_maskz, "__builtin_ia32_vpmadd52huq512_maskz", IX86_BUILTIN_VPMADD52HUQ512_MASKZ, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpamdd52luqv4di_mask, "__builtin_ia32_vpmadd52luq256_mask", IX86_BUILTIN_VPMADD52LUQ256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpamdd52luqv4di_maskz, "__builtin_ia32_vpmadd52luq256_maskz", IX86_BUILTIN_VPMADD52LUQ256_MASKZ, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpamdd52huqv4di_mask, "__builtin_ia32_vpmadd52huq256_mask", IX86_BUILTIN_VPMADD52HUQ256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpamdd52huqv4di_maskz, "__builtin_ia32_vpmadd52huq256_maskz", IX86_BUILTIN_VPMADD52HUQ256_MASKZ, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpamdd52luqv2di_mask, "__builtin_ia32_vpmadd52luq128_mask", IX86_BUILTIN_VPMADD52LUQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpamdd52luqv2di_maskz, "__builtin_ia32_vpmadd52luq128_maskz", IX86_BUILTIN_VPMADD52LUQ128_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpamdd52huqv2di_mask, "__builtin_ia32_vpmadd52huq128_mask", IX86_BUILTIN_VPMADD52HUQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI) -BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpamdd52huqv2di_maskz, "__builtin_ia32_vpmadd52huq128_maskz", IX86_BUILTIN_VPMADD52HUQ128_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA, 0, CODE_FOR_vpmadd52luqv8di_mask, "__builtin_ia32_vpmadd52luq512_mask", IX86_BUILTIN_VPMADD52LUQ512, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA, 0, CODE_FOR_vpmadd52luqv8di_maskz, "__builtin_ia32_vpmadd52luq512_maskz", IX86_BUILTIN_VPMADD52LUQ512_MASKZ, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA, 0, CODE_FOR_vpmadd52huqv8di_mask, "__builtin_ia32_vpmadd52huq512_mask", IX86_BUILTIN_VPMADD52HUQ512, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA, 0, CODE_FOR_vpmadd52huqv8di_maskz, "__builtin_ia32_vpmadd52huq512_maskz", IX86_BUILTIN_VPMADD52HUQ512_MASKZ, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_V8DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpmadd52luqv4di_mask, "__builtin_ia32_vpmadd52luq256_mask", IX86_BUILTIN_VPMADD52LUQ256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpmadd52luqv4di_maskz, "__builtin_ia32_vpmadd52luq256_maskz", IX86_BUILTIN_VPMADD52LUQ256_MASKZ, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpmadd52huqv4di_mask, "__builtin_ia32_vpmadd52huq256_mask", IX86_BUILTIN_VPMADD52HUQ256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpmadd52huqv4di_maskz, "__builtin_ia32_vpmadd52huq256_maskz", IX86_BUILTIN_VPMADD52HUQ256_MASKZ, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpmadd52luqv2di_mask, "__builtin_ia32_vpmadd52luq128_mask", IX86_BUILTIN_VPMADD52LUQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpmadd52luqv2di_maskz, "__builtin_ia32_vpmadd52luq128_maskz", IX86_BUILTIN_VPMADD52LUQ128_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpmadd52huqv2di_mask, "__builtin_ia32_vpmadd52huq128_mask", IX86_BUILTIN_VPMADD52HUQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpmadd52huqv2di_maskz, "__builtin_ia32_vpmadd52huq128_maskz", IX86_BUILTIN_VPMADD52HUQ128_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVXIFMA, CODE_FOR_vpmadd52luqv4di, "__builtin_ia32_vpmadd52luq256", IX86_BUINTIN_VPMADD52LUQ256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVXIFMA, CODE_FOR_vpmadd52huqv4di, "__builtin_ia32_vpmadd52huq256", IX86_BUINTIN_VPMADD52HUQ256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_V4DI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVXIFMA, CODE_FOR_vpmadd52luqv2di, "__builtin_ia32_vpmadd52luq128", IX86_BUINTIN_VPMADD52LUQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI) +BDESC (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVXIFMA, CODE_FOR_vpmadd52huqv2di, "__builtin_ia32_vpmadd52huq128", IX86_BUINTIN_VPMADD52HUQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI) /* AVX512VBMI */ BDESC (OPTION_MASK_ISA_AVX512VBMI, 0, CODE_FOR_vpmultishiftqbv64qi_mask, "__builtin_ia32_vpmultishiftqb512_mask", IX86_BUILTIN_VPMULTISHIFTQB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_V64QI_UDI) @@ -2690,6 +2694,20 @@ BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_A BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v4si_mask, "__builtin_ia32_vpdpwssds_v4si_mask", IX86_BUILTIN_VPDPWSSDSV4SI_MASK, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI) BDESC (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpdpwssds_v4si_maskz, "__builtin_ia32_vpdpwssds_v4si_maskz", IX86_BUILTIN_VPDPWSSDSV4SI_MASKZ, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI_UQI) +/* AVXVNNIINT8 */ +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbssd_v8si, "__builtin_ia32_vpdpbssd256", IX86_BUILTIN_VPDPBSSDV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbssds_v8si, "__builtin_ia32_vpdpbssds256", IX86_BUILTIN_VPDPBSSDSV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbsud_v8si, "__builtin_ia32_vpdpbsud256", IX86_BUILTIN_VPDPBSUDV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbsuds_v8si, "__builtin_ia32_vpdpbsuds256", IX86_BUILTIN_VPDPBSUDSV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbuud_v8si, "__builtin_ia32_vpdpbuud256", IX86_BUILTIN_VPDPBUUDV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbuuds_v8si, "__builtin_ia32_vpdpbuuds256", IX86_BUILTIN_VPDPBUUDSV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI_V8SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbssd_v4si, "__builtin_ia32_vpdpbssd128", IX86_BUILTIN_VPDPBSSDV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbssds_v4si, "__builtin_ia32_vpdpbssds128", IX86_BUILTIN_VPDPBSSDSV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbsud_v4si, "__builtin_ia32_vpdpbsud128", IX86_BUILTIN_VPDPBSUDV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbsuds_v4si, "__builtin_ia32_vpdpbsuds128", IX86_BUILTIN_VPDPBSUDSV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbuud_v4si, "__builtin_ia32_vpdpbuud128", IX86_BUILTIN_VPDPBUUDV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI) +BDESC (0, OPTION_MASK_ISA2_AVXVNNIINT8, CODE_FOR_vpdpbuuds_v4si, "__builtin_ia32_vpdpbuuds128", IX86_BUILTIN_VPDPBUUDSV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI_V4SI) + /* VPCLMULQDQ */ BDESC (OPTION_MASK_ISA_VPCLMULQDQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpclmulqdq_v2di, "__builtin_ia32_vpclmulqdq_v2di", IX86_BUILTIN_VPCLMULQDQ2, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT) BDESC (OPTION_MASK_ISA_VPCLMULQDQ | OPTION_MASK_ISA_AVX, 0, CODE_FOR_vpclmulqdq_v4di, "__builtin_ia32_vpclmulqdq_v4di", IX86_BUILTIN_VPCLMULQDQ4, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_INT) diff --git a/gcc/config/i386/i386-builtins.cc b/gcc/config/i386/i386-builtins.cc index 76668cc..9412cf1 100644 --- a/gcc/config/i386/i386-builtins.cc +++ b/gcc/config/i386/i386-builtins.cc @@ -279,10 +279,12 @@ def_builtin (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, if (((mask2 == 0 || (mask2 & ix86_isa_flags2) != 0) && (mask == 0 || (mask & ix86_isa_flags) != 0)) || ((mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE) - /* "Unified" builtin used by either AVXVNNI intrinsics or AVX512VNNIVL - non-mask intrinsics should be defined whenever avxvnni - or avx512vnni && avx512vl exist. */ + /* "Unified" builtin used by either AVXVNNI/AVXIFMA intrinsics + or AVX512VNNIVL/AVX512IFMAVL non-mask intrinsics should be + defined whenever avxvnni/avxifma or avx512vnni/avxifma && + avx512vl exist. */ || (mask2 == OPTION_MASK_ISA2_AVXVNNI) + || (mask2 == OPTION_MASK_ISA2_AVXIFMA) || (lang_hooks.builtin_function == lang_hooks.builtin_function_ext_scope)) { diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc index eb0e3b3..f70f891 100644 --- a/gcc/config/i386/i386-c.cc +++ b/gcc/config/i386/i386-c.cc @@ -132,6 +132,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__znver3"); def_or_undef (parse_in, "__znver3__"); break; + case PROCESSOR_ZNVER4: + def_or_undef (parse_in, "__znver4"); + def_or_undef (parse_in, "__znver4__"); + break; case PROCESSOR_BTVER1: def_or_undef (parse_in, "__btver1"); def_or_undef (parse_in, "__btver1__"); @@ -330,6 +334,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, case PROCESSOR_ZNVER3: def_or_undef (parse_in, "__tune_znver3__"); break; + case PROCESSOR_ZNVER4: + def_or_undef (parse_in, "__tune_znver4__"); + break; case PROCESSOR_BTVER1: def_or_undef (parse_in, "__tune_btver1__"); break; @@ -633,6 +640,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__WIDEKL__"); if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNI) def_or_undef (parse_in, "__AVXVNNI__"); + if (isa_flag2 & OPTION_MASK_ISA2_AVXIFMA) + def_or_undef (parse_in, "__AVXIFMA__"); + if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT8) + def_or_undef (parse_in, "__AVXVNNIINT8__"); if (TARGET_IAMCU) { def_or_undef (parse_in, "__iamcu"); diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 70fd82b..0e8ba14 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -12367,6 +12367,8 @@ ix86_check_builtin_isa_match (unsigned int fcode, OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4 (OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL) or OPTION_MASK_ISA2_AVXVNNI + (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512IFMA) or + OPTION_MASK_ISA2_AVXIFMA where for each such pair it is sufficient if either of the ISAs is enabled, plus if it is ored with other options also those others. OPTION_MASK_ISA_MMX in bisa is satisfied also if TARGET_MMX_WITH_SSE. */ @@ -12396,6 +12398,17 @@ ix86_check_builtin_isa_match (unsigned int fcode, isa2 |= OPTION_MASK_ISA2_AVXVNNI; } + if ((((bisa & (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL)) + == (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL)) + || (bisa2 & OPTION_MASK_ISA2_AVXIFMA) != 0) + && (((isa & (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL)) + == (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL)) + || (isa2 & OPTION_MASK_ISA2_AVXIFMA) != 0)) + { + isa |= OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL; + isa2 |= OPTION_MASK_ISA2_AVXIFMA; + } + if ((bisa & OPTION_MASK_ISA_MMX) && !TARGET_MMX && TARGET_MMX_WITH_SSE /* __builtin_ia32_maskmovq requires MMX registers. */ && fcode != IX86_BUILTIN_MASKMOVQ) diff --git a/gcc/config/i386/i386-isa.def b/gcc/config/i386/i386-isa.def index 83659d0..c95b917 100644 --- a/gcc/config/i386/i386-isa.def +++ b/gcc/config/i386/i386-isa.def @@ -109,3 +109,5 @@ DEF_PTA(KL) DEF_PTA(WIDEKL) DEF_PTA(AVXVNNI) DEF_PTA(AVX512FP16) +DEF_PTA(AVXIFMA) +DEF_PTA(AVXVNNIINT8) diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc index acb2291..1f14d69 100644 --- a/gcc/config/i386/i386-options.cc +++ b/gcc/config/i386/i386-options.cc @@ -154,11 +154,12 @@ along with GCC; see the file COPYING3. If not see #define m_ZNVER1 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER1) #define m_ZNVER2 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER2) #define m_ZNVER3 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER3) +#define m_ZNVER4 (HOST_WIDE_INT_1U<<PROCESSOR_ZNVER4) #define m_BTVER1 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER1) #define m_BTVER2 (HOST_WIDE_INT_1U<<PROCESSOR_BTVER2) #define m_BDVER (m_BDVER1 | m_BDVER2 | m_BDVER3 | m_BDVER4) #define m_BTVER (m_BTVER1 | m_BTVER2) -#define m_ZNVER (m_ZNVER1 | m_ZNVER2 | m_ZNVER3) +#define m_ZNVER (m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4) #define m_AMD_MULTIPLE (m_ATHLON_K8 | m_AMDFAM10 | m_BDVER | m_BTVER \ | m_ZNVER) @@ -226,7 +227,9 @@ static struct ix86_target_opts isa2_opts[] = { "-mkl", OPTION_MASK_ISA2_KL }, { "-mwidekl", OPTION_MASK_ISA2_WIDEKL }, { "-mavxvnni", OPTION_MASK_ISA2_AVXVNNI }, - { "-mavx512fp16", OPTION_MASK_ISA2_AVX512FP16 } + { "-mavx512fp16", OPTION_MASK_ISA2_AVX512FP16 }, + { "-mavxifma", OPTION_MASK_ISA2_AVXIFMA }, + { "-mavxvnniint8", OPTION_MASK_ISA2_AVXVNNIINT8 } }; static struct ix86_target_opts isa_opts[] = { @@ -771,7 +774,8 @@ static const struct processor_costs *processor_cost_table[] = &btver2_cost, &znver1_cost, &znver2_cost, - &znver3_cost + &znver3_cost, + &znver4_cost }; /* Guarantee that the array is aligned with enum processor_type. */ @@ -1072,6 +1076,8 @@ ix86_valid_target_attribute_inner_p (tree fndecl, tree args, char *p_strings[], IX86_ATTR_ISA ("hreset", OPT_mhreset), IX86_ATTR_ISA ("avxvnni", OPT_mavxvnni), IX86_ATTR_ISA ("avx512fp16", OPT_mavx512fp16), + IX86_ATTR_ISA ("avxifma", OPT_mavxifma), + IX86_ATTR_ISA ("avxvnniint8", OPT_mavxvnniint8), /* enum options */ IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_), diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 480db35..aeea26e 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -23079,7 +23079,7 @@ ix86_reassociation_width (unsigned int op, machine_mode mode) /* Integer vector instructions execute in FP unit and can execute 3 additions and one multiplication per cycle. */ if ((ix86_tune == PROCESSOR_ZNVER1 || ix86_tune == PROCESSOR_ZNVER2 - || ix86_tune == PROCESSOR_ZNVER3) + || ix86_tune == PROCESSOR_ZNVER3 || ix86_tune == PROCESSOR_ZNVER4) && INTEGRAL_MODE_P (mode) && op != PLUS && op != MINUS) return 1; diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 372a2cf..fd7c9df 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2255,6 +2255,7 @@ enum processor_type PROCESSOR_ZNVER1, PROCESSOR_ZNVER2, PROCESSOR_ZNVER3, + PROCESSOR_ZNVER4, PROCESSOR_max }; @@ -2347,6 +2348,21 @@ constexpr wide_int_bitmask PTA_ALDERLAKE = PTA_TREMONT | PTA_ADX | PTA_AVX | PTA_HRESET | PTA_KL | PTA_WIDEKL | PTA_AVXVNNI; constexpr wide_int_bitmask PTA_KNM = PTA_KNL | PTA_AVX5124VNNIW | PTA_AVX5124FMAPS | PTA_AVX512VPOPCNTDQ; +constexpr wide_int_bitmask PTA_ZNVER1 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 + | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 + | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2 | PTA_BMI | PTA_BMI2 + | PTA_F16C | PTA_FMA | PTA_PRFCHW | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT + | PTA_FSGSBASE | PTA_RDRND | PTA_MOVBE | PTA_MWAITX | PTA_ADX | PTA_RDSEED + | PTA_CLZERO | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES | PTA_SHA | PTA_LZCNT + | PTA_POPCNT; +constexpr wide_int_bitmask PTA_ZNVER2 = PTA_ZNVER1 | PTA_CLWB | PTA_RDPID + | PTA_WBNOINVD; +constexpr wide_int_bitmask PTA_ZNVER3 = PTA_ZNVER2 | PTA_VAES | PTA_VPCLMULQDQ + | PTA_PKU; +constexpr wide_int_bitmask PTA_ZNVER4 = PTA_ZNVER3 | PTA_AVX512F | PTA_AVX512DQ + | PTA_AVX512IFMA | PTA_AVX512CD | PTA_AVX512BW | PTA_AVX512VL + | PTA_AVX512BF16 | PTA_AVX512VBMI | PTA_AVX512VBMI2 | PTA_GFNI + | PTA_AVX512VNNI | PTA_AVX512BITALG | PTA_AVX512VPOPCNTDQ; #ifndef GENERATOR_FILE diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 6688d92..baf1f1f 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -474,7 +474,7 @@ ;; Processor type. (define_attr "cpu" "none,pentium,pentiumpro,geode,k6,athlon,k8,core2,nehalem, atom,slm,glm,haswell,generic,lujiazui,amdfam10,bdver1, - bdver2,bdver3,bdver4,btver2,znver1,znver2,znver3" + bdver2,bdver3,bdver4,btver2,znver1,znver2,znver3,znver4" (const (symbol_ref "ix86_schedule"))) ;; A basic instruction type. Refinements due to arguments to be @@ -835,7 +835,8 @@ sse_noavx,sse2,sse2_noavx,sse3,sse3_noavx,sse4,sse4_noavx, avx,noavx,avx2,noavx2,bmi,bmi2,fma4,fma,avx512f,noavx512f, avx512bw,noavx512bw,avx512dq,noavx512dq,fma_or_avx512vl, - avx512vl,noavx512vl,avxvnni,avx512vnnivl,avx512fp16" + avx512vl,noavx512vl,avxvnni,avx512vnnivl,avx512fp16,avxifma, + avx512ifmavl" (const_string "base")) ;; Define instruction set of MMX instructions @@ -891,6 +892,9 @@ (symbol_ref "TARGET_AVX512VNNI && TARGET_AVX512VL") (eq_attr "isa" "avx512fp16") (symbol_ref "TARGET_AVX512FP16") + (eq_attr "isa" "avxifma") (symbol_ref "TARGET_AVXIFMA") + (eq_attr "isa" "avx512ifmavl") + (symbol_ref "TARGET_AVX512IFMA && TARGET_AVX512VL") (eq_attr "mmx_isa" "native") (symbol_ref "!TARGET_MMX_WITH_SSE") @@ -1305,7 +1309,7 @@ (include "bdver1.md") (include "bdver3.md") (include "btver2.md") -(include "znver1.md") +(include "znver.md") (include "geode.md") (include "atom.md") (include "slm.md") diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 0dbaacb..53d534f 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -1214,3 +1214,13 @@ Do not use GOT to access external symbols. -param=x86-stlf-window-ninsns= Target Joined UInteger Var(x86_stlf_window_ninsns) Init(64) Param Instructions number above which STFL stall penalty can be compensated. + +mavxifma +Target Mask(ISA2_AVXIFMA) Var(ix86_isa_flags2) Save +Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and +AVXIFMA built-in functions and code generation. + +mavxvnniint8 +Target Mask(ISA2_AVXVNNIINT8) Var(ix86_isa_flags2) Save +Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and +AVXVNNIINT8 built-in functions and code generation. diff --git a/gcc/config/i386/immintrin.h b/gcc/config/i386/immintrin.h index 6afd78c..ddea249 100644 --- a/gcc/config/i386/immintrin.h +++ b/gcc/config/i386/immintrin.h @@ -44,6 +44,10 @@ #include <avxvnniintrin.h> +#include <avxifmaintrin.h> + +#include <avxvnniint8intrin.h> + #include <avx2intrin.h> #include <avx512fintrin.h> diff --git a/gcc/config/i386/mingw-mcfgthread.h b/gcc/config/i386/mingw-mcfgthread.h new file mode 100644 index 0000000..7d4eda3 --- /dev/null +++ b/gcc/config/i386/mingw-mcfgthread.h @@ -0,0 +1 @@ +#define TARGET_USING_MCFGTHREAD 1 diff --git a/gcc/config/i386/mingw32.h b/gcc/config/i386/mingw32.h index d3ca0cd..b5f31c3 100644 --- a/gcc/config/i386/mingw32.h +++ b/gcc/config/i386/mingw32.h @@ -32,6 +32,10 @@ along with GCC; see the file COPYING3. If not see | MASK_STACK_PROBE | MASK_ALIGN_DOUBLE \ | MASK_MS_BITFIELD_LAYOUT) +#ifndef TARGET_USING_MCFGTHREAD +#define TARGET_USING_MCFGTHREAD 0 +#endif + /* See i386/crtdll.h for an alternative definition. _INTEGRAL_MAX_BITS is for compatibility with native compiler. */ #define EXTRA_OS_CPP_BUILTINS() \ @@ -50,6 +54,8 @@ along with GCC; see the file COPYING3. If not see builtin_define_std ("WIN64"); \ builtin_define ("_WIN64"); \ } \ + if (TARGET_USING_MCFGTHREAD) \ + builtin_define ("__USING_MCFGTHREAD__"); \ } \ while (0) @@ -181,11 +187,16 @@ along with GCC; see the file COPYING3. If not see #else #define SHARED_LIBGCC_SPEC " -lgcc " #endif +#if TARGET_USING_MCFGTHREAD +#define MCFGTHREAD_SPEC " -lmcfgthread -lkernel32 -lntdll " +#else +#define MCFGTHREAD_SPEC "" +#endif #undef REAL_LIBGCC_SPEC #define REAL_LIBGCC_SPEC \ "%{mthreads:-lmingwthrd} -lmingw32 \ " SHARED_LIBGCC_SPEC " \ - -lmoldname -lmingwex -lmsvcrt -lkernel32" + -lmoldname -lmingwex -lmsvcrt -lkernel32 " MCFGTHREAD_SPEC #undef STARTFILE_SPEC #define STARTFILE_SPEC "%{shared|mdll:dllcrt2%O%s} \ diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 076064f..f4b5506 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -166,10 +166,10 @@ UNSPEC_VPSHLDV ;; For AVX512VNNI support - UNSPEC_VPMADDUBSWACCD - UNSPEC_VPMADDUBSWACCSSD - UNSPEC_VPMADDWDACCD - UNSPEC_VPMADDWDACCSSD + UNSPEC_VPDPBUSD + UNSPEC_VPDPBUSDS + UNSPEC_VPDPWSSD + UNSPEC_VPDPWSSDS ;; For VAES support UNSPEC_VAESDEC @@ -200,6 +200,13 @@ UNSPEC_COMPLEX_FCMUL UNSPEC_COMPLEX_MASK + ;; For AVX-VNNI-INT8 support + UNSPEC_VPDPBSSD + UNSPEC_VPDPBSSDS + UNSPEC_VPDPBSUD + UNSPEC_VPDPBSUDS + UNSPEC_VPDPBUUD + UNSPEC_VPDPBUUDS ]) (define_c_enum "unspecv" [ @@ -1028,6 +1035,13 @@ (V16HI "v16hi") (V8HI "v8hi") (V32QI "v32qi") (V16QI "v16qi")]) +;; Mapping of vector modes to an V*SImode of the same size +(define_mode_attr ssedvecmode + [(V64QI "V16SI") (V32QI "V8SI") (V16QI "V4SI")]) + +(define_mode_attr ssedvecmodelower + [(V64QI "v16si") (V32QI "v8si") (V16QI "v4si")]) + ;; Mapping of vector modes to a vector mode of double size (define_mode_attr ssedoublevecmode [(V64QI "V128QI") (V32HI "V64HI") (V16SI "V32SI") (V8DI "V16DI") @@ -27867,7 +27881,7 @@ (define_int_attr vpmadd52type [(UNSPEC_VPMADD52LUQ "luq") (UNSPEC_VPMADD52HUQ "huq")]) -(define_expand "vpamdd52huq<mode>_maskz" +(define_expand "vpmadd52huq<mode>_maskz" [(match_operand:VI8_AVX512VL 0 "register_operand") (match_operand:VI8_AVX512VL 1 "register_operand") (match_operand:VI8_AVX512VL 2 "register_operand") @@ -27875,13 +27889,13 @@ (match_operand:<avx512fmaskmode> 4 "register_operand")] "TARGET_AVX512IFMA" { - emit_insn (gen_vpamdd52huq<mode>_maskz_1 ( + emit_insn (gen_vpmadd52huq<mode>_maskz_1 ( operands[0], operands[1], operands[2], operands[3], CONST0_RTX (<MODE>mode), operands[4])); DONE; }) -(define_expand "vpamdd52luq<mode>_maskz" +(define_expand "vpmadd52luq<mode>_maskz" [(match_operand:VI8_AVX512VL 0 "register_operand") (match_operand:VI8_AVX512VL 1 "register_operand") (match_operand:VI8_AVX512VL 2 "register_operand") @@ -27889,26 +27903,58 @@ (match_operand:<avx512fmaskmode> 4 "register_operand")] "TARGET_AVX512IFMA" { - emit_insn (gen_vpamdd52luq<mode>_maskz_1 ( + emit_insn (gen_vpmadd52luq<mode>_maskz_1 ( operands[0], operands[1], operands[2], operands[3], CONST0_RTX (<MODE>mode), operands[4])); DONE; }) -(define_insn "vpamdd52<vpmadd52type><mode><sd_maskz_name>" - [(set (match_operand:VI8_AVX512VL 0 "register_operand" "=v") - (unspec:VI8_AVX512VL - [(match_operand:VI8_AVX512VL 1 "register_operand" "0") - (match_operand:VI8_AVX512VL 2 "register_operand" "v") - (match_operand:VI8_AVX512VL 3 "nonimmediate_operand" "vm")] +(define_insn "vpmadd52<vpmadd52type>v8di" + [(set (match_operand:V8DI 0 "register_operand" "=v") + (unspec:V8DI + [(match_operand:V8DI 1 "register_operand" "0") + (match_operand:V8DI 2 "register_operand" "v") + (match_operand:V8DI 3 "nonimmediate_operand" "vm")] VPMADD52))] "TARGET_AVX512IFMA" - "vpmadd52<vpmadd52type>\t{%3, %2, %0<sd_mask_op4>|%0<sd_mask_op4>, %2, %3}" + "vpmadd52<vpmadd52type>\t{%3, %2, %0|%0, %2, %3}" [(set_attr "type" "ssemuladd") (set_attr "prefix" "evex") + (set_attr "mode" "XI")]) + +(define_insn "vpmadd52<vpmadd52type><mode>" + [(set (match_operand:VI8_AVX2 0 "register_operand" "=x,v") + (unspec:VI8_AVX2 + [(match_operand:VI8_AVX2 1 "register_operand" "0,0") + (match_operand:VI8_AVX2 2 "register_operand" "x,v") + (match_operand:VI8_AVX2 3 "nonimmediate_operand" "xm,vm")] + VPMADD52))] + "TARGET_AVXIFMA || (TARGET_AVX512IFMA && TARGET_AVX512VL)" + "@ + %{vex%} vpmadd52<vpmadd52type>\t{%3, %2, %0|%0, %2, %3} + vpmadd52<vpmadd52type>\t{%3, %2, %0|%0, %2, %3}" + [(set_attr "isa" "avxifma,avx512ifmavl") + (set_attr "type" "ssemuladd") + (set_attr "prefix" "vex,evex") (set_attr "mode" "<sseinsnmode>")]) -(define_insn "vpamdd52<vpmadd52type><mode>_mask" +(define_insn "vpmadd52<vpmadd52type><mode>_maskz_1" + [(set (match_operand:VI8_AVX512VL 0 "register_operand" "=v") + (vec_merge:VI8_AVX512VL + (unspec:VI8_AVX512VL + [(match_operand:VI8_AVX512VL 1 "register_operand" "0") + (match_operand:VI8_AVX512VL 2 "register_operand" "v") + (match_operand:VI8_AVX512VL 3 "nonimmediate_operand" "vm")] + VPMADD52) + (match_operand:VI8_AVX512VL 4 "const0_operand" "C") + (match_operand:<avx512fmaskmode> 5 "register_operand" "Yk")))] + "TARGET_AVX512IFMA" + "vpmadd52<vpmadd52type>\t{%3, %2, %0%{%5%}%{z%}|%0%{%5%}%{z%}, %2, %3}" + [(set_attr "type" "ssemuladd") + (set_attr "prefix" "evex") + (set_attr "mode" "<sseinsnmode>")]) + +(define_insn "vpmadd52<vpmadd52type><mode>_mask" [(set (match_operand:VI8_AVX512VL 0 "register_operand" "=v") (vec_merge:VI8_AVX512VL (unspec:VI8_AVX512VL @@ -28470,29 +28516,23 @@ [(set_attr ("prefix") ("evex")) (set_attr "mode" "<sseinsnmode>")]) -(define_mode_attr VI1SI - [(V64QI "V16SI") (V32QI "V8SI") (V16QI "V4SI")]) - -(define_mode_attr vi1si - [(V64QI "v16si") (V32QI "v8si") (V16QI "v4si")]) - (define_expand "usdot_prod<mode>" - [(match_operand:<VI1SI> 0 "register_operand") + [(match_operand:<ssedvecmode> 0 "register_operand") (match_operand:VI1_AVX512VNNI 1 "register_operand") (match_operand:VI1_AVX512VNNI 2 "register_operand") - (match_operand:<VI1SI> 3 "register_operand")] + (match_operand:<ssedvecmode> 3 "register_operand")] "(<MODE_SIZE> == 64 ||((TARGET_AVX512VNNI && TARGET_AVX512VL) || TARGET_AVXVNNI))" { - operands[1] = lowpart_subreg (<VI1SI>mode, + operands[1] = lowpart_subreg (<ssedvecmode>mode, force_reg (<MODE>mode, operands[1]), <MODE>mode); - operands[2] = lowpart_subreg (<VI1SI>mode, + operands[2] = lowpart_subreg (<ssedvecmode>mode, force_reg (<MODE>mode, operands[2]), <MODE>mode); emit_insn (gen_rtx_SET (operands[0], operands[3])); - emit_insn (gen_vpdpbusd_<vi1si> (operands[0], operands[3], + emit_insn (gen_vpdpbusd_<ssedvecmodelower> (operands[0], operands[3], operands[1], operands[2])); DONE; }) @@ -28503,7 +28543,7 @@ [(match_operand:V16SI 1 "register_operand" "0") (match_operand:V16SI 2 "register_operand" "v") (match_operand:V16SI 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDUBSWACCD))] + UNSPEC_VPDPBUSD))] "TARGET_AVX512VNNI" "vpdpbusd\t{%3, %2, %0|%0, %2, %3}" [(set_attr ("prefix") ("evex"))]) @@ -28514,7 +28554,7 @@ [(match_operand:VI4_AVX2 1 "register_operand" "0,0") (match_operand:VI4_AVX2 2 "register_operand" "x,v") (match_operand:VI4_AVX2 3 "nonimmediate_operand" "xm,vm")] - UNSPEC_VPMADDUBSWACCD))] + UNSPEC_VPDPBUSD))] "TARGET_AVXVNNI || (TARGET_AVX512VNNI && TARGET_AVX512VL)" "@ %{vex%} vpdpbusd\t{%3, %2, %0|%0, %2, %3} @@ -28529,7 +28569,7 @@ [(match_operand:VI4_AVX512VL 1 "register_operand" "0") (match_operand:VI4_AVX512VL 2 "register_operand" "v") (match_operand:VI4_AVX512VL 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDUBSWACCD) + UNSPEC_VPDPBUSD) (match_dup 1) (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512VNNI" @@ -28558,7 +28598,7 @@ [(match_operand:VI4_AVX512VL 1 "register_operand" "0") (match_operand:VI4_AVX512VL 2 "register_operand" "v") (match_operand:VI4_AVX512VL 3 "nonimmediate_operand" "vm") - ] UNSPEC_VPMADDUBSWACCD) + ] UNSPEC_VPDPBUSD) (match_operand:VI4_AVX512VL 4 "const0_operand") (match_operand:<avx512fmaskmode> 5 "register_operand" "Yk")))] "TARGET_AVX512VNNI" @@ -28571,7 +28611,7 @@ [(match_operand:V16SI 1 "register_operand" "0") (match_operand:V16SI 2 "register_operand" "v") (match_operand:V16SI 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDUBSWACCSSD))] + UNSPEC_VPDPBUSDS))] "TARGET_AVX512VNNI" "vpdpbusds\t{%3, %2, %0|%0, %2, %3}" [(set_attr ("prefix") ("evex"))]) @@ -28582,7 +28622,7 @@ [(match_operand:VI4_AVX2 1 "register_operand" "0,0") (match_operand:VI4_AVX2 2 "register_operand" "x,v") (match_operand:VI4_AVX2 3 "nonimmediate_operand" "xm,vm")] - UNSPEC_VPMADDUBSWACCSSD))] + UNSPEC_VPDPBUSDS))] "TARGET_AVXVNNI || (TARGET_AVX512VNNI && TARGET_AVX512VL)" "@ %{vex%} vpdpbusds\t{%3, %2, %0|%0, %2, %3} @@ -28597,7 +28637,7 @@ [(match_operand:VI4_AVX512VL 1 "register_operand" "0") (match_operand:VI4_AVX512VL 2 "register_operand" "v") (match_operand:VI4_AVX512VL 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDUBSWACCSSD) + UNSPEC_VPDPBUSDS) (match_dup 1) (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512VNNI" @@ -28626,7 +28666,7 @@ [(match_operand:VI4_AVX512VL 1 "register_operand" "0") (match_operand:VI4_AVX512VL 2 "register_operand" "v") (match_operand:VI4_AVX512VL 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDUBSWACCSSD) + UNSPEC_VPDPBUSDS) (match_operand:VI4_AVX512VL 4 "const0_operand") (match_operand:<avx512fmaskmode> 5 "register_operand" "Yk")))] "TARGET_AVX512VNNI" @@ -28639,7 +28679,7 @@ [(match_operand:V16SI 1 "register_operand" "0") (match_operand:V16SI 2 "register_operand" "v") (match_operand:V16SI 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDWDACCD))] + UNSPEC_VPDPWSSD))] "TARGET_AVX512VNNI" "vpdpwssd\t{%3, %2, %0|%0, %2, %3}" [(set_attr ("prefix") ("evex"))]) @@ -28650,7 +28690,7 @@ [(match_operand:VI4_AVX2 1 "register_operand" "0,0") (match_operand:VI4_AVX2 2 "register_operand" "x,v") (match_operand:VI4_AVX2 3 "nonimmediate_operand" "xm,vm")] - UNSPEC_VPMADDWDACCD))] + UNSPEC_VPDPWSSD))] "TARGET_AVXVNNI || (TARGET_AVX512VNNI && TARGET_AVX512VL)" "@ %{vex%} vpdpwssd\t{%3, %2, %0|%0, %2, %3} @@ -28665,7 +28705,7 @@ [(match_operand:VI4_AVX512VL 1 "register_operand" "0") (match_operand:VI4_AVX512VL 2 "register_operand" "v") (match_operand:VI4_AVX512VL 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDWDACCD) + UNSPEC_VPDPWSSD) (match_dup 1) (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512VNNI" @@ -28694,7 +28734,7 @@ [(match_operand:VI4_AVX512VL 1 "register_operand" "0") (match_operand:VI4_AVX512VL 2 "register_operand" "v") (match_operand:VI4_AVX512VL 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDWDACCD) + UNSPEC_VPDPWSSD) (match_operand:VI4_AVX512VL 4 "const0_operand") (match_operand:<avx512fmaskmode> 5 "register_operand" "Yk")))] "TARGET_AVX512VNNI" @@ -28707,7 +28747,7 @@ [(match_operand:V16SI 1 "register_operand" "0") (match_operand:V16SI 2 "register_operand" "v") (match_operand:V16SI 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDWDACCSSD))] + UNSPEC_VPDPWSSDS))] "TARGET_AVX512VNNI" "vpdpwssds\t{%3, %2, %0|%0, %2, %3}" [(set_attr ("prefix") ("evex"))]) @@ -28718,7 +28758,7 @@ [(match_operand:VI4_AVX2 1 "register_operand" "0,0") (match_operand:VI4_AVX2 2 "register_operand" "x,v") (match_operand:VI4_AVX2 3 "nonimmediate_operand" "xm,vm")] - UNSPEC_VPMADDWDACCSSD))] + UNSPEC_VPDPWSSDS))] "TARGET_AVXVNNI || (TARGET_AVX512VNNI && TARGET_AVX512VL)" "@ %{vex%} vpdpwssds\t{%3, %2, %0|%0, %2, %3} @@ -28733,7 +28773,7 @@ [(match_operand:VI4_AVX512VL 1 "register_operand" "0") (match_operand:VI4_AVX512VL 2 "register_operand" "v") (match_operand:VI4_AVX512VL 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDWDACCSSD) + UNSPEC_VPDPWSSDS) (match_dup 1) (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512VNNI" @@ -28762,7 +28802,7 @@ [(match_operand:VI4_AVX512VL 1 "register_operand" "0") (match_operand:VI4_AVX512VL 2 "register_operand" "v") (match_operand:VI4_AVX512VL 3 "nonimmediate_operand" "vm")] - UNSPEC_VPMADDWDACCSSD) + UNSPEC_VPDPWSSDS) (match_operand:VI4_AVX512VL 4 "const0_operand") (match_operand:<avx512fmaskmode> 5 "register_operand" "Yk")))] "TARGET_AVX512VNNI" @@ -29203,3 +29243,65 @@ gcc_unreachable (); DONE; }) + +(define_int_iterator VPDOTPROD + [UNSPEC_VPDPBSSD + UNSPEC_VPDPBSSDS + UNSPEC_VPDPBSUD + UNSPEC_VPDPBSUDS + UNSPEC_VPDPBUUD + UNSPEC_VPDPBUUDS]) + +(define_int_attr vpdotprodtype + [(UNSPEC_VPDPBSSD "bssd") (UNSPEC_VPDPBSSDS "bssds") + (UNSPEC_VPDPBSUD "bsud") (UNSPEC_VPDPBSUDS "bsuds") + (UNSPEC_VPDPBUUD "buud") (UNSPEC_VPDPBUUDS "buuds")]) + +(define_expand "sdot_prod<mode>" + [(match_operand:<ssedvecmode> 0 "register_operand") + (match_operand:VI1 1 "register_operand") + (match_operand:VI1 2 "register_operand") + (match_operand:<ssedvecmode> 3 "register_operand")] + "TARGET_AVXVNNIINT8" +{ + operands[1] = lowpart_subreg (<ssedvecmode>mode, + force_reg (<MODE>mode, operands[1]), + <MODE>mode); + operands[2] = lowpart_subreg (<ssedvecmode>mode, + force_reg (<MODE>mode, operands[2]), + <MODE>mode); + emit_insn (gen_rtx_SET (operands[0], operands[3])); + emit_insn (gen_vpdpbssd_<ssedvecmodelower> (operands[0], operands[3], + operands[1], operands[2])); + DONE; +}) + +(define_expand "udot_prod<mode>" + [(match_operand:<ssedvecmode> 0 "register_operand") + (match_operand:VI1 1 "register_operand") + (match_operand:VI1 2 "register_operand") + (match_operand:<ssedvecmode> 3 "register_operand")] + "TARGET_AVXVNNIINT8" +{ + operands[1] = lowpart_subreg (<ssedvecmode>mode, + force_reg (<MODE>mode, operands[1]), + <MODE>mode); + operands[2] = lowpart_subreg (<ssedvecmode>mode, + force_reg (<MODE>mode, operands[2]), + <MODE>mode); + emit_insn (gen_rtx_SET (operands[0], operands[3])); + emit_insn (gen_vpdpbuud_<ssedvecmodelower> (operands[0], operands[3], + operands[1], operands[2])); + DONE; +}) + +(define_insn "vpdp<vpdotprodtype>_<mode>" + [(set (match_operand:VI4_AVX 0 "register_operand" "=x") + (unspec:VI4_AVX + [(match_operand:VI4_AVX 1 "register_operand" "0") + (match_operand:VI4_AVX 2 "register_operand" "x") + (match_operand:VI4_AVX 3 "nonimmediate_operand" "xm")] + VPDOTPROD))] + "TARGET_AVXVNNIINT8" + "vpdp<vpdotprodtype>\t{%3, %2, %0|%0, %2, %3}" + [(set_attr "prefix" "vex")]) diff --git a/gcc/config/i386/x86-tune-costs.h b/gcc/config/i386/x86-tune-costs.h index 6c9066c..aeaa7eb0 100644 --- a/gcc/config/i386/x86-tune-costs.h +++ b/gcc/config/i386/x86-tune-costs.h @@ -1820,6 +1820,139 @@ struct processor_costs znver3_cost = { "16", /* Func alignment. */ }; +/* This table currently replicates znver3_cost table. */ +struct processor_costs znver4_cost = { + { + /* Start of register allocator costs. integer->integer move cost is 2. */ + + /* reg-reg moves are done by renaming and thus they are even cheaper than + 1 cycle. Because reg-reg move cost is 2 and following tables correspond + to doubles of latencies, we do not model this correctly. It does not + seem to make practical difference to bump prices up even more. */ + 6, /* cost for loading QImode using + movzbl. */ + {6, 6, 6}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {8, 8, 8}, /* cost of storing integer + registers. */ + 2, /* cost of reg,reg fld/fst. */ + {6, 6, 16}, /* cost of loading fp registers + in SFmode, DFmode and XFmode. */ + {8, 8, 16}, /* cost of storing fp registers + in SFmode, DFmode and XFmode. */ + 2, /* cost of moving MMX register. */ + {6, 6}, /* cost of loading MMX registers + in SImode and DImode. */ + {8, 8}, /* cost of storing MMX registers + in SImode and DImode. */ + 2, 2, 3, /* cost of moving XMM,YMM,ZMM + register. */ + {6, 6, 6, 6, 12}, /* cost of loading SSE registers + in 32,64,128,256 and 512-bit. */ + {8, 8, 8, 8, 16}, /* cost of storing SSE registers + in 32,64,128,256 and 512-bit. */ + 6, 6, /* SSE->integer and integer->SSE + moves. */ + 8, 8, /* mask->integer and integer->mask moves */ + {6, 6, 6}, /* cost of loading mask register + in QImode, HImode, SImode. */ + {8, 8, 8}, /* cost if storing mask register + in QImode, HImode, SImode. */ + 2, /* cost of moving mask register. */ + /* End of register allocator costs. */ + }, + + COSTS_N_INSNS (1), /* cost of an add instruction. */ + COSTS_N_INSNS (1), /* cost of a lea instruction. */ + COSTS_N_INSNS (1), /* variable shift costs. */ + COSTS_N_INSNS (1), /* constant shift costs. */ + {COSTS_N_INSNS (3), /* cost of starting multiply for QI. */ + COSTS_N_INSNS (3), /* HI. */ + COSTS_N_INSNS (3), /* SI. */ + COSTS_N_INSNS (3), /* DI. */ + COSTS_N_INSNS (3)}, /* other. */ + 0, /* cost of multiply per each bit + set. */ + {COSTS_N_INSNS (9), /* cost of a divide/mod for QI. */ + COSTS_N_INSNS (10), /* HI. */ + COSTS_N_INSNS (12), /* SI. */ + COSTS_N_INSNS (17), /* DI. */ + COSTS_N_INSNS (17)}, /* other. */ + COSTS_N_INSNS (1), /* cost of movsx. */ + COSTS_N_INSNS (1), /* cost of movzx. */ + 8, /* "large" insn. */ + 9, /* MOVE_RATIO. */ + 6, /* CLEAR_RATIO */ + {6, 6, 6}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {8, 8, 8}, /* cost of storing integer + registers. */ + {6, 6, 6, 6, 12}, /* cost of loading SSE registers + in 32bit, 64bit, 128bit, 256bit and 512bit */ + {8, 8, 8, 8, 16}, /* cost of storing SSE register + in 32bit, 64bit, 128bit, 256bit and 512bit */ + {6, 6, 6, 6, 12}, /* cost of unaligned loads. */ + {8, 8, 8, 8, 16}, /* cost of unaligned stores. */ + 2, 2, 3, /* cost of moving XMM,YMM,ZMM + register. */ + 6, /* cost of moving SSE register to integer. */ + /* VGATHERDPD is 15 uops and throughput is 4, VGATHERDPS is 23 uops, + throughput 9. Approx 7 uops do not depend on vector size and every load + is 4 uops. */ + 14, 8, /* Gather load static, per_elt. */ + 14, 10, /* Gather store static, per_elt. */ + 32, /* size of l1 cache. */ + 512, /* size of l2 cache. */ + 64, /* size of prefetch block. */ + /* New AMD processors never drop prefetches; if they cannot be performed + immediately, they are queued. We set number of simultaneous prefetches + to a large constant to reflect this (it probably is not a good idea not + to limit number of prefetches at all, as their execution also takes some + time). */ + 100, /* number of parallel prefetches. */ + 3, /* Branch cost. */ + COSTS_N_INSNS (5), /* cost of FADD and FSUB insns. */ + COSTS_N_INSNS (5), /* cost of FMUL instruction. */ + /* Latency of fdiv is 8-15. */ + COSTS_N_INSNS (15), /* cost of FDIV instruction. */ + COSTS_N_INSNS (1), /* cost of FABS instruction. */ + COSTS_N_INSNS (1), /* cost of FCHS instruction. */ + /* Latency of fsqrt is 4-10. */ + COSTS_N_INSNS (10), /* cost of FSQRT instruction. */ + + COSTS_N_INSNS (1), /* cost of cheap SSE instruction. */ + COSTS_N_INSNS (3), /* cost of ADDSS/SD SUBSS/SD insns. */ + COSTS_N_INSNS (3), /* cost of MULSS instruction. */ + COSTS_N_INSNS (3), /* cost of MULSD instruction. */ + COSTS_N_INSNS (5), /* cost of FMA SS instruction. */ + COSTS_N_INSNS (5), /* cost of FMA SD instruction. */ + COSTS_N_INSNS (10), /* cost of DIVSS instruction. */ + /* 9-13. */ + COSTS_N_INSNS (13), /* cost of DIVSD instruction. */ + COSTS_N_INSNS (10), /* cost of SQRTSS instruction. */ + COSTS_N_INSNS (15), /* cost of SQRTSD instruction. */ + /* Zen can execute 4 integer operations per cycle. FP operations + take 3 cycles and it can execute 2 integer additions and 2 + multiplications thus reassociation may make sense up to with of 6. + SPEC2k6 bencharks suggests + that 4 works better than 6 probably due to register pressure. + + Integer vector operations are taken by FP unit and execute 3 vector + plus/minus operations per cycle but only one multiply. This is adjusted + in ix86_reassociation_width. */ + 4, 4, 3, 6, /* reassoc int, fp, vec_int, vec_fp. */ + znver2_memcpy, + znver2_memset, + COSTS_N_INSNS (4), /* cond_taken_branch_cost. */ + COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */ + "16", /* Loop alignment. */ + "16", /* Jump alignment. */ + "0:0:8", /* Label alignment. */ + "16", /* Func alignment. */ +}; + /* skylake_cost should produce code tuned for Skylake familly of CPUs. */ static stringop_algs skylake_memcpy[2] = { {libcall, diff --git a/gcc/config/i386/x86-tune-sched.cc b/gcc/config/i386/x86-tune-sched.cc index e2765f8..96eb06a 100644 --- a/gcc/config/i386/x86-tune-sched.cc +++ b/gcc/config/i386/x86-tune-sched.cc @@ -68,6 +68,7 @@ ix86_issue_rate (void) case PROCESSOR_ZNVER1: case PROCESSOR_ZNVER2: case PROCESSOR_ZNVER3: + case PROCESSOR_ZNVER4: case PROCESSOR_CORE2: case PROCESSOR_NEHALEM: case PROCESSOR_SANDYBRIDGE: @@ -415,6 +416,7 @@ ix86_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost, case PROCESSOR_ZNVER1: case PROCESSOR_ZNVER2: case PROCESSOR_ZNVER3: + case PROCESSOR_ZNVER4: /* Stack engine allows to execute push&pop instructions in parall. */ if ((insn_type == TYPE_PUSH || insn_type == TYPE_POP) && (dep_insn_type == TYPE_PUSH || dep_insn_type == TYPE_POP)) diff --git a/gcc/config/i386/znver1.md b/gcc/config/i386/znver.md index 9c25b4e..376a145 100644 --- a/gcc/config/i386/znver1.md +++ b/gcc/config/i386/znver.md @@ -23,8 +23,8 @@ ;; AMD znver1, znver2 and znver3 Scheduling ;; Modeling automatons for zen decoders, integer execution pipes, -;; AGU pipes and floating point execution units. -(define_automaton "znver1, znver1_ieu, znver1_fp, znver1_agu") +;; AGU pipes, floating point execution, branch and store units. +(define_automaton "znver1, znver1_ieu, znver1_fp, znver1_agu, znver4_bru, znver4_fp_store") ;; Decoders unit has 4 decoders and all of them can decode fast path ;; and vector type instructions. @@ -63,6 +63,8 @@ ;; Load is 4 cycles. We do not model reservation of load unit. ;;(define_reservation "znver1-load" "znver1-agu-reserve, nothing, nothing, nothing") (define_reservation "znver1-load" "znver1-agu-reserve") +;; According to Manual, all AGU are used for loads and stores in znver4. +(define_reservation "znver4-load" "znver2-store-agu-reserve") ;; Store operations differs between znver1, znver2 and znver3 because extra AGU ;; was added. (define_reservation "znver1-store" "znver1-agu-reserve") @@ -93,6 +95,11 @@ +znver1-fp2+znver1-fp3 +znver1-agu0+znver1-agu1+znver2-agu2") +;; znver4 has one branch unit in znver1-ieu0 and a separate branch unit. +(define_cpu_unit "znver4-bru0" "znver4_bru") +;; znver4 also has dedicated fp-store unit. +(define_cpu_unit "znver4-fp-store0" "znver4_fp_store") + ;; Call instruction (define_insn_reservation "znver1_call" 1 (and (eq_attr "cpu" "znver1") @@ -104,6 +111,11 @@ (eq_attr "type" "call,callv")) "znver1-double,znver2-store,znver1-ieu0|znver1-ieu3") +(define_insn_reservation "znver4_call" 1 + (and (eq_attr "cpu" "znver4") + (eq_attr "type" "call,callv")) + "znver1-double,znver1-ieu0|znver4-bru0,znver2-store") + ;; General instructions (define_insn_reservation "znver1_push" 1 (and (eq_attr "cpu" "znver1") @@ -111,7 +123,7 @@ (eq_attr "memory" "store"))) "znver1-direct,znver1-store") (define_insn_reservation "znver2_push" 1 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "type" "push") (eq_attr "memory" "store"))) "znver1-direct,znver2-store") @@ -126,12 +138,22 @@ (and (eq_attr "type" "push") (eq_attr "memory" "both"))) "znver1-direct,znver1-load,znver2-store") +(define_insn_reservation "znver4_push_load" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "push") + (eq_attr "memory" "both"))) + "znver1-direct,znver4-load,znver2-store") (define_insn_reservation "znver1_pop" 4 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "pop") (eq_attr "memory" "load"))) "znver1-direct,znver1-load") +(define_insn_reservation "znver4_pop" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "pop") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load") (define_insn_reservation "znver1_pop_mem" 4 (and (eq_attr "cpu" "znver1") @@ -143,6 +165,11 @@ (and (eq_attr "type" "pop") (eq_attr "memory" "both"))) "znver1-direct,znver1-load,znver2-store") +(define_insn_reservation "znver4_pop_mem" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "pop") + (eq_attr "memory" "both"))) + "znver1-direct,znver4-load,znver2-store") ;; Leave (define_insn_reservation "znver1_leave" 1 @@ -150,7 +177,7 @@ (eq_attr "type" "leave")) "znver1-double,znver1-ieu, znver1-store") (define_insn_reservation "znver2_leave" 1 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (eq_attr "type" "leave")) "znver1-double,znver1-ieu, znver2-store") @@ -162,12 +189,29 @@ (and (eq_attr "type" "imul") (eq_attr "memory" "none"))) "znver1-direct,znver1-ieu1") +(define_insn_reservation "znver4_imul" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "imul") + (and (eq_attr "mode" "SI,HI,QI") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-ieu1") +(define_insn_reservation "znver4_imul_DI" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "imul") + (and (eq_attr "mode" "DI") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-ieu1") (define_insn_reservation "znver1_imul_mem" 7 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "imul") (eq_attr "memory" "!none"))) "znver1-direct,znver1-load, znver1-ieu1") +(define_insn_reservation "znver4_imul_mem" 7 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "imul") + (eq_attr "memory" "!none"))) + "znver1-direct,znver4-load, znver1-ieu1") ;; Divisions ;; Reg operands @@ -261,14 +305,14 @@ (and (eq_attr "type" "idiv") (and (eq_attr "mode" "DI") (eq_attr "memory" "load")))) - "znver1-double,znver1-load,znver1-ieu2*22") + "znver1-double,znver1-load,znver1-ieu2*18") (define_insn_reservation "znver3_idiv_mem_SI" 16 (and (eq_attr "cpu" "znver3") (and (eq_attr "type" "idiv") (and (eq_attr "mode" "SI") (eq_attr "memory" "load")))) - "znver1-double,znver1-load,znver1-ieu2*16") + "znver1-double,znver1-load,znver1-ieu2*12") (define_insn_reservation "znver3_idiv_mem_HI" 14 (and (eq_attr "cpu" "znver3") @@ -284,6 +328,62 @@ (eq_attr "memory" "load")))) "znver1-direct,znver1-load,znver1-ieu2*9") +(define_insn_reservation "znver4_idiv_DI" 18 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "DI") + (eq_attr "memory" "none")))) + "znver1-double,znver1-ieu0*18") + +(define_insn_reservation "znver4_idiv_SI" 12 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "SI") + (eq_attr "memory" "none")))) + "znver1-double,znver1-ieu0*12") + +(define_insn_reservation "znver4_idiv_HI" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "HI") + (eq_attr "memory" "none")))) + "znver1-double,znver1-ieu0*10") + +(define_insn_reservation "znver4_idiv_QI" 9 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "QI") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-ieu0*9") + +(define_insn_reservation "znver4_idiv_mem_DI" 22 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "DI") + (eq_attr "memory" "load")))) + "znver1-double,znver4-load,znver1-ieu0*18") + +(define_insn_reservation "znver4_idiv_mem_SI" 16 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "SI") + (eq_attr "memory" "load")))) + "znver1-double,znver4-load,znver1-ieu0*12") + +(define_insn_reservation "znver4_idiv_mem_HI" 14 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "HI") + (eq_attr "memory" "load")))) + "znver1-double,znver4-load,znver1-ieu0*10") + +(define_insn_reservation "znver4_idiv_mem_QI" 13 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "idiv") + (and (eq_attr "mode" "QI") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-ieu0*9") + ;; STR ISHIFT which are micro coded. ;; Fix me: Latency need to be rechecked. (define_insn_reservation "znver1_str_ishift" 6 @@ -293,15 +393,15 @@ "znver1-vector,znver1-ivector") (define_insn_reservation "znver2_str_ishift" 3 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "type" "ishift") (eq_attr "memory" "both,store"))) - "znver1-vector,znver1-ivector") + "znver1-vector,znver2-ivector") (define_insn_reservation "znver2_str_istr" 19 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "type" "str") (eq_attr "memory" "both,store"))) - "znver1-vector,znver1-ivector") + "znver1-vector,znver2-ivector") ;; MOV - integer moves (define_insn_reservation "znver1_load_imov_double" 2 @@ -318,8 +418,15 @@ (eq_attr "memory" "none")))) "znver1-double,znver1-ieu|znver1-ieu") +(define_insn_reservation "znver4_load_imov_double" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "imovx") + (eq_attr "memory" "none")))) + "znver1-double,znver1-ieu0|znver1-ieu3") + (define_insn_reservation "znver1_load_imov_direct" 1 - (and (eq_attr "cpu" "znver1,znver2,znver3") + (and (eq_attr "cpu" "znver1,znver2,znver3,znver4") (and (eq_attr "type" "imov,imovx") (eq_attr "memory" "none"))) "znver1-direct,znver1-ieu") @@ -332,7 +439,7 @@ "znver1-double,znver1-ieu|znver1-ieu,znver1-store") (define_insn_reservation "znver2_load_imov_double_store" 1 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "znver1_decode" "double") (and (eq_attr "type" "imovx") (eq_attr "memory" "store")))) @@ -345,7 +452,7 @@ "znver1-direct,znver1-ieu,znver1-store") (define_insn_reservation "znver2_load_imov_direct_store" 1 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "type" "imov,imovx") (eq_attr "memory" "store"))) "znver1-direct,znver1-ieu,znver2-store") @@ -364,6 +471,13 @@ (eq_attr "memory" "load")))) "znver1-double,znver1-load,znver1-ieu|znver1-ieu") +(define_insn_reservation "znver4_load_imov_double_load" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "imovx") + (eq_attr "memory" "load")))) + "znver1-double,znver4-load,znver1-ieu") + (define_insn_reservation "znver1_load_imov_direct_load" 4 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "imov,imovx") @@ -378,12 +492,48 @@ (eq_attr "memory" "none,unknown"))) "znver1-direct,znver1-ieu") +(define_insn_reservation "znver4_insn_1" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "alu,icmp,negnot,test,incdec") + (eq_attr "memory" "none,unknown"))) + "znver1-direct,znver1-ieu") + +(define_insn_reservation "znver4_insn_2" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "rotate,rotate1,ishift,ishift1") + (eq_attr "memory" "none,unknown"))) + "znver1-direct,znver1-ieu1|znver1-ieu2") + +(define_insn_reservation "znver4_insn_3" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "setcc,icmov") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-ieu0|znver1-ieu3") + (define_insn_reservation "znver1_insn_load" 5 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "alu,icmp,negnot,rotate,rotate1,ishift,ishift1,test,setcc,incdec,icmov") (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-ieu") +(define_insn_reservation "znver4_insn_1_load" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "alu,icmp,negnot,test,incdec") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-ieu") + +(define_insn_reservation "znver4_insn_2_load" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "rotate,rotate1,ishift,ishift1") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-ieu1|znver1-ieu2") + +(define_insn_reservation "znver4_insn_3_load" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "setcc,icmov") + (eq_attr "memory" "load"))) + "znver1-double,znver4-load,znver1-ieu0|znver1-ieu3") + (define_insn_reservation "znver1_insn_store" 1 (and (eq_attr "cpu" "znver1") (and (eq_attr "type" "alu,icmp,negnot,rotate,rotate1,ishift1,test,setcc,incdec") @@ -396,6 +546,24 @@ (eq_attr "memory" "store"))) "znver1-direct,znver1-ieu,znver2-store") +(define_insn_reservation "znver4_insn_1_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "alu,icmp,negnot,test,incdec") + (eq_attr "memory" "store"))) + "znver1-direct,znver1-ieu,znver2-store") + +(define_insn_reservation "znver4_insn_2_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "rotate,rotate1,ishift,ishift1") + (eq_attr "memory" "store"))) + "znver1-direct,znver1-ieu1|znver1-ieu2,znver2-store") + +(define_insn_reservation "znver4_insn_3_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "setcc,icmov") + (eq_attr "memory" "store"))) + "znver1-double,znver1-ieu0|znver1-ieu3,znver2-store") + (define_insn_reservation "znver1_insn_both" 5 (and (eq_attr "cpu" "znver1") (and (eq_attr "type" "alu,icmp,negnot,rotate,rotate1,ishift1,test,setcc,incdec") @@ -408,6 +576,24 @@ (eq_attr "memory" "both"))) "znver1-direct,znver1-load,znver1-ieu,znver2-store") +(define_insn_reservation "znver4_insn_1_both" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "alu,icmp,negnot,test,incdec") + (eq_attr "memory" "both"))) + "znver1-direct,znver4-load,znver1-ieu,znver2-store") + +(define_insn_reservation "znver4_insn_2_both" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "rotate,rotate1,ishift,ishift1") + (eq_attr "memory" "both"))) + "znver1-direct,znver4-load,znver1-ieu1|znver1-ieu2,znver2-store") + +(define_insn_reservation "znver4_insn_3_both" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "setcc,icmov") + (eq_attr "memory" "both"))) + "znver1-double,znver4-load,znver1-ieu0|znver1-ieu3,znver2-store") + ;; Fix me: Other vector type insns keeping latency 6 as of now. (define_insn_reservation "znver1_ieu_vector" 6 (and (eq_attr "cpu" "znver1") @@ -415,7 +601,7 @@ "znver1-vector,znver1-ivector") (define_insn_reservation "znver2_ieu_vector" 5 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (eq_attr "type" "other,str,multi")) "znver1-vector,znver2-ivector") @@ -428,21 +614,21 @@ "znver1-vector,znver1-ivector") (define_insn_reservation "znver2_alu1_vector" 3 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "znver1_decode" "vector") (and (eq_attr "type" "alu1") (eq_attr "memory" "none,unknown")))) "znver1-vector,znver2-ivector") (define_insn_reservation "znver1_alu1_double" 2 - (and (eq_attr "cpu" "znver1,znver2,znver3") + (and (eq_attr "cpu" "znver1,znver2,znver3,znver4") (and (eq_attr "znver1_decode" "double") (and (eq_attr "type" "alu1") (eq_attr "memory" "none,unknown")))) "znver1-double,znver1-ieu") (define_insn_reservation "znver1_alu1_direct" 1 - (and (eq_attr "cpu" "znver1,znver2,znver3") + (and (eq_attr "cpu" "znver1,znver2,znver3,znver4") (and (eq_attr "znver1_decode" "direct") (and (eq_attr "type" "alu1") (eq_attr "memory" "none,unknown")))) @@ -454,6 +640,11 @@ (and (eq_attr "type" "ibr") (eq_attr "memory" "none"))) "znver1-direct") +(define_insn_reservation "znver4_branch" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ibr") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-ieu0|znver4-bru0") ;; Indirect branches check latencies. (define_insn_reservation "znver1_indirect_branch_mem" 6 @@ -468,25 +659,36 @@ (eq_attr "memory" "load"))) "znver1-vector,znver2-ivector") +(define_insn_reservation "znver4_indirect_branch_mem" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ibr") + (eq_attr "memory" "load"))) + "znver1-vector,znver2-ivector+znver4-bru0") + ;; LEA executes in ALU units with 1 cycle latency. (define_insn_reservation "znver1_lea" 1 - (and (eq_attr "cpu" "znver1,znver2,znver3") + (and (eq_attr "cpu" "znver1,znver2,znver3,znver4") (eq_attr "type" "lea")) "znver1-direct,znver1-ieu") -;; Other integer instrucions +;; Other integer instructions (define_insn_reservation "znver1_idirect" 1 - (and (eq_attr "cpu" "znver1,znver2,znver3") + (and (eq_attr "cpu" "znver1,znver2,znver3,znver4") (and (eq_attr "unit" "integer,unknown") (eq_attr "memory" "none,unknown"))) "znver1-direct,znver1-ieu") ;; Floating point (define_insn_reservation "znver1_fp_cmov" 6 - (and (eq_attr "cpu" "znver1,znver2,znver3") + (and (eq_attr "cpu" "znver1") (eq_attr "type" "fcmov")) "znver1-vector,znver1-fvector") +(define_insn_reservation "znver2_fp_cmov" 6 + (and (eq_attr "cpu" "znver2,znver3,znver4") + (eq_attr "type" "fcmov")) + "znver1-vector,znver2-fvector") + (define_insn_reservation "znver1_fp_mov_direct_load" 8 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "znver1_decode" "direct") @@ -494,6 +696,13 @@ (eq_attr "memory" "load")))) "znver1-direct,znver1-load,znver1-fp3|znver1-fp1") +(define_insn_reservation "znver4_fp_mov_direct_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "direct") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-fp2|znver1-fp3") + (define_insn_reservation "znver1_fp_mov_direct_store" 5 (and (eq_attr "cpu" "znver1") (and (eq_attr "znver1_decode" "direct") @@ -501,7 +710,7 @@ (eq_attr "memory" "store")))) "znver1-direct,znver1-fp2|znver1-fp3,znver1-store") (define_insn_reservation "znver2_fp_mov_direct_store" 5 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "znver1_decode" "direct") (and (eq_attr "type" "fmov") (eq_attr "memory" "store")))) @@ -514,6 +723,13 @@ (eq_attr "memory" "none")))) "znver1-double,znver1-fp3") +(define_insn_reservation "znver4_fp_mov_double" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "none")))) + "znver1-double,znver1-fp1") + (define_insn_reservation "znver1_fp_mov_double_load" 12 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "znver1_decode" "double") @@ -521,11 +737,23 @@ (eq_attr "memory" "load")))) "znver1-double,znver1-load,znver1-fp3") +(define_insn_reservation "znver4_fp_mov_double_load" 11 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "znver1_decode" "double") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "load")))) + "znver1-double,znver4-load,znver1-fp1") + (define_insn_reservation "znver1_fp_mov_direct" 1 (and (eq_attr "cpu" "znver1,znver2,znver3") (eq_attr "type" "fmov")) "znver1-direct,znver1-fp3") +(define_insn_reservation "znver4_fp_mov_direct" 1 + (and (eq_attr "cpu" "znver4") + (eq_attr "type" "fmov")) + "znver1-direct,znver1-fp1") + ;; TODO: AGU? (define_insn_reservation "znver1_fp_spc_direct" 5 (and (eq_attr "cpu" "znver1,znver2,znver3") @@ -533,13 +761,25 @@ (eq_attr "memory" "store"))) "znver1-direct,znver1-fp3,znver1-fp2") +(define_insn_reservation "znver4_fp_spc_direct" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fpspc") + (eq_attr "memory" "store"))) + "znver1-direct,znver1-fp1,znver4-fp-store0") + +(define_insn_reservation "znver4_fp_sqrt_direct" 22 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fpspc") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-fp1") + (define_insn_reservation "znver1_fp_insn_vector" 6 (and (eq_attr "cpu" "znver1") (and (eq_attr "znver1_decode" "vector") (eq_attr "type" "fpspc,mmxcvt,sselog1,ssemul,ssemov"))) "znver1-vector,znver1-fvector") (define_insn_reservation "znver2_fp_insn_vector" 6 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "znver1_decode" "vector") (eq_attr "type" "fpspc,mmxcvt,sselog1,ssemul,ssemov"))) "znver1-vector,znver2-fvector") @@ -550,6 +790,11 @@ (eq_attr "type" "fsgn")) "znver1-direct,znver1-fp3") +(define_insn_reservation "znver4_fp_fsgn" 1 + (and (eq_attr "cpu" "znver4") + (eq_attr "type" "fsgn")) + "znver1-direct,znver1-fp0|znver1-fp1") + (define_insn_reservation "znver1_fp_fcmp" 2 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "memory" "none") @@ -557,13 +802,39 @@ (eq_attr "type" "fcmp")))) "znver1-double,znver1-fp0,znver1-fp2") +(define_insn_reservation "znver4_fp_fcmp_double" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "memory" "none") + (and (eq_attr "znver1_decode" "double") + (eq_attr "type" "fcmp")))) + "znver1-double,znver1-fp0,znver4-fp-store0") + +(define_insn_reservation "znver4_fp_fcmp" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fcmp") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-fp0") + (define_insn_reservation "znver1_fp_fcmp_load" 9 (and (eq_attr "cpu" "znver1,znver2,znver3") - (and (eq_attr "memory" "none") + (and (eq_attr "memory" "load") (and (eq_attr "znver1_decode" "double") (eq_attr "type" "fcmp")))) "znver1-double,znver1-load, znver1-fp0,znver1-fp2") +(define_insn_reservation "znver4_fp_fcmp_double_load" 11 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "memory" "load") + (and (eq_attr "znver1_decode" "double") + (eq_attr "type" "fcmp")))) + "znver1-double,znver4-load,znver1-fp0,znver4-fp-store0") + +(define_insn_reservation "znver4_fp_fcmp_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fcmp") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fp0") + ;;FADD FSUB FMUL (define_insn_reservation "znver1_fp_op_mul" 5 (and (eq_attr "cpu" "znver1,znver2,znver3") @@ -571,12 +842,31 @@ (eq_attr "memory" "none"))) "znver1-direct,znver1-fp0*5") +(define_insn_reservation "znver4_fp_op_mul" 6 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fop,fmul") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-fp0*6") + (define_insn_reservation "znver1_fp_op_mul_load" 12 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "fop,fmul") (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp0*5") +(define_insn_reservation "znver4_fp_op_mul_load" 13 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fop,fmul") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fp0*6") + +(define_insn_reservation "znver4_fp_op_imul" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fop,fmul") + (and (eq_attr "fp_int_src" "true") + (eq_attr "memory" "none")))) + "znver1-double,znver1-fp1,znver1-fp0") + (define_insn_reservation "znver1_fp_op_imul_load" 16 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "fop,fmul") @@ -584,8 +874,15 @@ (eq_attr "memory" "load")))) "znver1-double,znver1-load,znver1-fp3,znver1-fp0") +(define_insn_reservation "znver4_fp_op_imul_load" 17 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fop,fmul") + (and (eq_attr "fp_int_src" "true") + (eq_attr "memory" "load")))) + "znver1-double,znver4-load,znver1-fp1,znver1-fp0") + (define_insn_reservation "znver1_fp_op_div" 15 - (and (eq_attr "cpu" "znver1,znver2,znver3") + (and (eq_attr "cpu" "znver1,znver2,znver3,znver4") (and (eq_attr "type" "fdiv") (eq_attr "memory" "none"))) "znver1-direct,znver1-fp3*15") @@ -596,6 +893,12 @@ (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp3*15") +(define_insn_reservation "znver4_fp_op_div_load" 22 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fdiv") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fp3*15") + (define_insn_reservation "znver1_fp_op_idiv_load" 27 (and (eq_attr "cpu" "znver1") (and (eq_attr "type" "fdiv") @@ -610,6 +913,19 @@ (eq_attr "memory" "load")))) "znver1-double,znver1-load,znver1-fp3*19") +(define_insn_reservation "znver4_fp_op_idiv" 19 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fdiv") + (and (eq_attr "fp_int_src" "true") + (eq_attr "memory" "none")))) + "znver1-double,znver1-fp1,znver1-fp1") + +(define_insn_reservation "znver4_fp_op_idiv_load" 26 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "fdiv") + (and (eq_attr "fp_int_src" "true") + (eq_attr "memory" "none")))) + "znver1-double,znver4-load,znver1-fp1,znver1-fp1") ;; MMX, SSE, SSEn.n, AVX, AVX2 instructions (define_insn_reservation "znver1_fp_insn" 1 @@ -623,26 +939,49 @@ (eq_attr "memory" "none"))) "znver1-direct,znver1-fp0|znver1-fp1|znver1-fp3") +(define_insn_reservation "znver4_fp_insn" 1 + (and (eq_attr "cpu" "znver4") + (eq_attr "type" "mmx,mmxadd")) + "znver1-direct,znver1-fpu") + (define_insn_reservation "znver1_mmx_add_load" 8 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "mmxadd") (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp0|znver1-fp1|znver1-fp3") +(define_insn_reservation "znver4_mmx_add_load" 8 + (and (eq_attr "cpu" "znver1,znver2,znver3") + (and (eq_attr "type" "mmxadd") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fpu") + (define_insn_reservation "znver1_mmx_cmp" 1 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "mmxcmp") (eq_attr "memory" "none"))) "znver1-direct,znver1-fp0|znver1-fp3") +(define_insn_reservation "znver4_mmx_cmp" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxcmp") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-fpu") + (define_insn_reservation "znver1_mmx_cmp_load" 8 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "mmxcmp") (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp0|znver1-fp3") +(define_insn_reservation "znver4_mmx_cmp_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxcmp") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fpu") + (define_insn_reservation "znver1_mmx_cvt_pck_shuf" 1 - (and (eq_attr "cpu" "znver1,znver2,znver3") + (and (eq_attr "cpu" "znver1,znver2,znver3,znver4") (and (eq_attr "type" "mmxcvt,sseshuf,sseshuf1") (eq_attr "memory" "none"))) "znver1-direct,znver1-fp1|znver1-fp2") @@ -653,18 +992,48 @@ (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp1|znver1-fp2") +(define_insn_reservation "znver4_mmx_cvt_pck_shuf_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxcvt,sseshuf,sseshuf1") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fp1|znver1-fp2") + (define_insn_reservation "znver1_mmx_shift_move" 1 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "mmxshft,mmxmov") (eq_attr "memory" "none"))) "znver1-direct,znver1-fp2") +(define_insn_reservation "znver4_mmx_shift" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxshft") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-fp1|znver1-fp2") + +(define_insn_reservation "znver4_mmx_move" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxmov") + (eq_attr "memory" "none"))) + "znver1-direct,znver4-fp-store0") + (define_insn_reservation "znver1_mmx_shift_move_load" 8 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "mmxshft,mmxmov") (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp2") +(define_insn_reservation "znver4_mmx_shift_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxshft") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fp1|znver1-fp2") + +(define_insn_reservation "znver4_mmx_move_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxmov") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver4-fp-store0") + (define_insn_reservation "znver1_mmx_move_store" 1 (and (eq_attr "cpu" "znver1") (and (eq_attr "type" "mmxshft,mmxmov") @@ -676,18 +1045,42 @@ (eq_attr "memory" "store,both"))) "znver1-direct,znver1-fp2,znver2-store") +(define_insn_reservation "znver4_mmx_shift_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxshft") + (eq_attr "memory" "store,both"))) + "znver1-direct,znver1-fp1|znver1-fp2,znver2-store") + +(define_insn_reservation "znver4_mmx_move_store" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxmov") + (eq_attr "memory" "store,both"))) + "znver1-direct,znver4-fp-store0") + (define_insn_reservation "znver1_mmx_mul" 3 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "mmxmul") (eq_attr "memory" "none"))) "znver1-direct,znver1-fp0*3") +(define_insn_reservation "znver4_mmx_mul" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxmul") + (eq_attr "memory" "none"))) + "znver1-direct,(znver1-fp0|znver1-fp3)*3") + (define_insn_reservation "znver1_mmx_load" 10 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "mmxmul") (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp0*3") +(define_insn_reservation "znver4_mmx_mul_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "mmxmul") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,(znver1-fp0|znver1-fp3)*3") + ;; TODO (define_insn_reservation "znver1_avx256_log" 1 (and (eq_attr "cpu" "znver1") @@ -709,6 +1102,62 @@ (eq_attr "memory" "none"))) "znver1-direct,znver1-fpu") +(define_insn_reservation "znver4_sse_log" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog,sselog1") + (and (eq_attr "mode" "V4SF,V8SF,V2DF,V4DF") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-fpu") + +(define_insn_reservation "znver4_sse_log_evex" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog,sselog1") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-fp0+znver1-fp1|znver1-fp2+znver1-fp3") + +(define_insn_reservation "znver4_sse_log_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog,sselog1") + (and (eq_attr "mode" "V4SF,V8SF,V2DF,V4DF") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-fpu") + +(define_insn_reservation "znver4_sse_log_evex_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog,sselog1") + (and (eq_attr "mode" "V16SF,V8DF") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-fp0+znver1-fp1|znver1-fp2+znver1-fp3") + +(define_insn_reservation "znver4_sse_ilog" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog,sselog1") + (and (eq_attr "mode" "OI") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-fp0+znver1-fp1|znver1-fp2+znver1-fp3") + +(define_insn_reservation "znver4_sse_ilog_evex" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog,sselog1") + (and (eq_attr "mode" "TI") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-fp0+znver1-fp1+znver1-fp2+znver1-fp3") + +(define_insn_reservation "znver4_sse_ilog_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog,sselog1") + (and (eq_attr "mode" "OI") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-fp0+znver1-fp1|znver1-fp2+znver1-fp3") + +(define_insn_reservation "znver4_sse_ilog_evex_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sselog,sselog1") + (and (eq_attr "mode" "TI") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-fp0+znver1-fp1+znver1-fp2+znver1-fp3") + (define_insn_reservation "znver1_sse_log_load" 8 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "sselog") @@ -771,6 +1220,18 @@ (eq_attr "memory" "none"))))) "znver1-double,znver1-fp0|znver1-fp1") +(define_insn_reservation "znver4_sse_comi" 1 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "none"))) + "znver1-double,znver1-fp2|znver1-fp3,znver4-fp-store0") + +(define_insn_reservation "znver4_sse_comi_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "load"))) + "znver1-double,znver4-load,znver1-fp2|znver1-fp3,znver4-fp-store0") + (define_insn_reservation "znver1_sse_comi_double_load" 10 (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "V4SF,V2DF,TI")) @@ -786,7 +1247,7 @@ (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "SF,DF,V4SF,V2DF,TI")) (ior (eq_attr "cpu" "znver2") - (eq_attr "cpu" "znver3"))) + (eq_attr "cpu" "znver3,znver4"))) (and (eq_attr "prefix_extra" "1") (and (eq_attr "type" "ssecomi") (eq_attr "memory" "none")))) @@ -802,6 +1263,13 @@ (eq_attr "memory" "load")))) "znver1-direct,znver1-load,znver1-fp1|znver1-fp2") +(define_insn_reservation "znver4_sse_test_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "prefix_extra" "1") + (and (eq_attr "type" "ssecomi") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-fp1|znver1-fp2") + ;; SSE moves ;; Fix me: Need to revist this again some of the moves may be restricted ;; to some fpu pipes. @@ -814,7 +1282,7 @@ "znver1-direct,znver1-ieu0") (define_insn_reservation "znver2_sse_mov" 1 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "mode" "SI") (and (eq_attr "isa" "avx") (and (eq_attr "type" "ssemov") @@ -831,7 +1299,7 @@ "znver1-direct,znver1-ieu2") (define_insn_reservation "znver2_avx_mov" 1 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "mode" "TI") (and (eq_attr "isa" "avx") (and (eq_attr "type" "ssemov") @@ -843,7 +1311,8 @@ (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "SF,DF,V4SF,V2DF,TI")) (ior (eq_attr "cpu" "znver2") - (eq_attr "cpu" "znver3"))) + (ior (eq_attr "cpu" "znver3") + (eq_attr "cpu" "znver4")))) (and (eq_attr "type" "ssemov") (eq_attr "memory" "none"))) "znver1-direct,znver1-fpu") @@ -855,7 +1324,7 @@ (eq_attr "memory" "store")))) "znver1-direct,znver1-fpu,znver1-store") (define_insn_reservation "znver2_sseavx_mov_store" 1 - (and (eq_attr "cpu" "znver2,znver3") + (and (eq_attr "cpu" "znver2,znver3,znver4") (and (eq_attr "type" "ssemov") (eq_attr "memory" "store"))) "znver1-direct,znver1-fpu,znver2-store") @@ -869,6 +1338,12 @@ (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fpu") +(define_insn_reservation "znver4_sseavx_mov_load" 8 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemov") + (eq_attr "memory" "load"))) + "znver1-double,znver4-load,znver1-fpu") + (define_insn_reservation "znver1_avx256_mov" 1 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "V8SF,V4DF,OI") @@ -895,7 +1370,8 @@ (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "SF,DF,V4SF,V2DF,TI")) (ior (eq_attr "cpu" "znver2") - (eq_attr "cpu" "znver3"))) + (ior (eq_attr "cpu" "znver3") + (eq_attr "cpu" "znver4")))) (and (eq_attr "type" "sseadd") (eq_attr "memory" "none"))) "znver1-direct,znver1-fp2|znver1-fp3") @@ -909,6 +1385,12 @@ (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp2|znver1-fp3") +(define_insn_reservation "znver4_sseavx_add_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "sseadd") + (eq_attr "memory" "load"))) + "znver1-double,znver4-load,znver1-fp2|znver1-fp3") + (define_insn_reservation "znver1_avx256_add" 3 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "V8SF,V4DF,OI") @@ -960,6 +1442,20 @@ (eq_attr "memory" "none"))) "znver1-direct,znver1-fp0|znver1-fp1") +(define_insn_reservation "znver4_sseavx_fma" 4 + (and (and (eq_attr "cpu" "znver4") + (eq_attr "mode" "SF,DF,V4SF,V2DF,V8SF,V4DF")) + (and (eq_attr "type" "ssemuladd") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sseavx_fma_evex" 4 + (and (and (eq_attr "cpu" "znver4") + (eq_attr "mode" "V16SF,V8DF")) + (and (eq_attr "type" "ssemuladd") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-fp0+znver1-fp1") + (define_insn_reservation "znver3_sseavx_fma_load" 11 (and (and (eq_attr "cpu" "znver3") (eq_attr "mode" "SF,DF,V4SF,V2DF")) @@ -967,6 +1463,20 @@ (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp0|znver1-fp1") +(define_insn_reservation "znver4_sseavx_fma_load" 11 + (and (and (eq_attr "cpu" "znver4") + (eq_attr "mode" "SF,DF,V4SF,V2DF,V8SF,V4DF")) + (and (eq_attr "type" "ssemuladd") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sseavx_fma_evex_load" 11 + (and (and (eq_attr "cpu" "znver4") + (eq_attr "mode" "V16SF,V8DF")) + (and (eq_attr "type" "ssemuladd") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fp0+znver1-fp1") + (define_insn_reservation "znver3_avx256_fma" 4 (and (eq_attr "cpu" "znver3") (and (eq_attr "mode" "V8SF,V4DF") @@ -990,6 +1500,20 @@ (eq_attr "memory" "none"))) "znver1-direct,znver1-fp0|znver1-fp1|znver1-fp3") +(define_insn_reservation "znver4_sseavx_iadd" 1 + (and (and (eq_attr "cpu" "znver4") + (eq_attr "mode" "QI,HI,SI,DI,TI,OI,XI")) + (and (eq_attr "type" "sseiadd") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-fpu") + +(define_insn_reservation "znver4_sseavx_iadd_load" 8 + (and (and (eq_attr "cpu" "znver4") + (eq_attr "mode" "QI,HI,SI,DI,TI,OI,XI")) + (and (eq_attr "type" "sseiadd") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fpu") + (define_insn_reservation "znver1_sseavx_iadd_load" 8 (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "DI,TI")) @@ -1053,6 +1577,33 @@ (eq_attr "memory" "load"))))) "znver1-double,znver1-load,znver1-fp3,znver1-ieu0") +(define_insn_reservation "znver4_ssecvtsfdf_si" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "SI") + (and (eq_attr "type" "sseicvt") + (eq_attr "memory" "none")))) + "znver1-double,znver1-fp2|znver1-fp3,znver4-fp-store0") + +(define_insn_reservation "znver4_ssecvtsfdf_si_load" 11 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "SI") + (and (eq_attr "type" "sseicvt") + (eq_attr "memory" "load")))) + "znver1-double,znver4-load,znver1-fp2|znver1-fp3,znver4-fp-store0") + +(define_insn_reservation "znver4_ssecvtsfdf_di" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "DI") + (and (eq_attr "type" "sseicvt") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-fp2|znver1-fp3") + +(define_insn_reservation "znver4_ssecvtsfdf_di_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "DI") + (and (eq_attr "type" "sseicvt") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-fp2|znver1-fp3") ;; All other used ssecvt fp3 pipes ;; Check: Need to revisit this again. @@ -1069,12 +1620,24 @@ (eq_attr "memory" "none"))) "znver1-direct,znver1-fp3") +(define_insn_reservation "znver4_ssecvt" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (eq_attr "memory" "none"))) + "znver1-direct,znver1-fp2|znver1-fp3") + (define_insn_reservation "znver1_ssecvt_load" 11 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "type" "ssecvt") (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp3") +(define_insn_reservation "znver4_ssecvt_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (eq_attr "memory" "load"))) + "znver1-direct,znver4-load,znver1-fp2|znver1-fp3") + ;; SSE div (define_insn_reservation "znver1_ssediv_ss_ps" 10 (and (ior (and (eq_attr "cpu" "znver1") @@ -1087,6 +1650,21 @@ (eq_attr "memory" "none"))) "znver1-direct,znver1-fp3*10") +(define_insn_reservation "znver4_ssediv_ss_ps" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V16SF,V8SF,V4SF,SF") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-fp3*10") + +(define_insn_reservation "znver4_ssediv_ss_ps_evex" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V16SF,V8SF,V4SF,SF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver1-direct,znver1-fp1*10") + (define_insn_reservation "znver1_ssediv_ss_ps_load" 17 (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "V4SF,SF")) @@ -1098,6 +1676,21 @@ (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp3*10") +(define_insn_reservation "znver4_ssediv_ss_ps_load" 17 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V16SF,V8SF,V4SF,SF") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-fp3*10") + +(define_insn_reservation "znver4_ssediv_ss_ps_evex_load" 17 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V16SF,V8SF,V4SF,SF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver1-direct,znver4-load,znver1-fp1*10") + (define_insn_reservation "znver1_ssediv_sd_pd" 13 (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "V2DF,DF")) @@ -1109,6 +1702,21 @@ (eq_attr "memory" "none"))) "znver1-direct,znver1-fp3*13") +(define_insn_reservation "znver4_ssediv_sd_pd" 13 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V8DF,V4DF,V2DF,DF") + (eq_attr "memory" "none")))) + "znver1-direct,znver1-fp3*13") + +(define_insn_reservation "znver4_ssediv_sd_pd_evex" 13 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V8DF,V4DF,V2DF,DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver1-direct,znver1-fp1*13") + (define_insn_reservation "znver1_ssediv_sd_pd_load" 20 (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "V2DF,DF")) @@ -1120,6 +1728,21 @@ (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp3*13") +(define_insn_reservation "znver4_ssediv_sd_pd_load" 20 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V8DF,V4DF,V2DF,DF") + (eq_attr "memory" "load")))) + "znver1-direct,znver4-load,znver1-fp3*13") + +(define_insn_reservation "znver4_ssediv_sd_pd_evex_load" 20 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "V8DF,V4DF,V2DF,DF") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver1-direct,znver4-load,znver1-fp1*13") + (define_insn_reservation "znver1_ssediv_avx256_ps" 12 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "V8SF") @@ -1153,12 +1776,19 @@ (eq_attr "mode" "V4SF,SF")) (and (eq_attr "cpu" "znver2") (eq_attr "mode" "V8SF,V4SF,SF,V4DF,V2DF,DF")) - (and (eq_attr "cpu" "znver3") + (and (eq_attr "cpu" "znver3,znver4") (eq_attr "mode" "V8SF,V4SF,SF,V4DF,V2DF,DF"))) (and (eq_attr "type" "ssemul") (eq_attr "memory" "none"))) "znver1-direct,(znver1-fp0|znver1-fp1)*3") +(define_insn_reservation "znver4_ssemul_ss_ps_evex" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "V8DF,V16SF") + (eq_attr "memory" "none")))) + "znver1-direct,(znver1-fp0+znver1-fp1)*3") + (define_insn_reservation "znver1_ssemul_ss_ps_load" 10 (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "V4SF,SF")) @@ -1170,6 +1800,13 @@ (eq_attr "memory" "load"))) "znver1-direct,znver1-load,(znver1-fp0|znver1-fp1)*3") +(define_insn_reservation "znver4_ssemul_ss_ps_evex_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "V8DF,V16SF") + (eq_attr "memory" "none")))) + "znver1-direct,znver4-load,(znver1-fp0+znver1-fp1)*3") + (define_insn_reservation "znver1_ssemul_avx256_ps" 3 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "V8SF") @@ -1231,12 +1868,44 @@ (eq_attr "mode" "TI")) (and (eq_attr "cpu" "znver2") (eq_attr "mode" "TI,OI")) - (and (eq_attr "cpu" "znver3") + (and (eq_attr "cpu" "znver3,znver4") (eq_attr "mode" "TI,OI"))) (and (eq_attr "type" "sseimul") (eq_attr "memory" "none"))) "znver1-direct,znver1-fp0*3") +(define_insn_reservation "znver4_sseimul" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "TI,OI") + (and (eq_attr "type" "sseimul") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver1-direct,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sseimul_evex" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "XI") + (and (eq_attr "type" "sseimul") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "none"))))) + "znver1-direct,znver1-fp0+znver1-fp1") + +(define_insn_reservation "znver4_sseimul_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "TI,OI") + (and (eq_attr "type" "sseimul") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver1-direct,znver4-load,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sseimul_evex_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "XI") + (and (eq_attr "type" "sseimul") + (and (eq_attr "prefix" "evex") + (eq_attr "memory" "load"))))) + "znver1-direct,znver4-load,znver1-fp0+znver1-fp1") + (define_insn_reservation "znver1_sseimul_avx256" 4 (and (eq_attr "cpu" "znver1,znver2,znver3") (and (eq_attr "mode" "OI") @@ -1282,12 +1951,66 @@ (eq_attr "mode" "SF,DF,V4SF,V2DF")) (and (eq_attr "cpu" "znver2") (eq_attr "mode" "SF,DF,V4SF,V2DF,V8SF,V4DF")) - (and (eq_attr "cpu" "znver3") + (and (eq_attr "cpu" "znver3,znver4") (eq_attr "mode" "SF,DF,V4SF,V2DF,V8SF,V4DF"))) (and (eq_attr "type" "ssecmp") (eq_attr "memory" "none"))) "znver1-direct,znver1-fp0|znver1-fp1") +(define_insn_reservation "znver4_sse_cmp" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "SF,DF,V4SF,V2DF") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "none")))))) + "znver1-direct,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sse_cmp_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "SF,DF,V4SF,V2DF") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "load")))))) + "znver1-double,znver4-load,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sse_cmp_vex" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "V8SF,V4DF") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "none")))))) + "znver1-direct,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sse_cmp_vex_load" 11 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "V8SF,V4DF") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "load")))))) + "znver1-double,znver4-load,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sse_cmp_evex" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "V16SF,V8DF") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "none")))))) + "znver1-direct,znver1-fp0+znver1-fp1") + +(define_insn_reservation "znver4_sse_cmp_evex_load" 12 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "V16SF,V8DF") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "load")))))) + "znver1-double,znver4-load,znver1-fp0+znver1-fp1") + (define_insn_reservation "znver1_sse_cmp_load" 8 (and (ior (and (eq_attr "cpu" "znver1") (eq_attr "mode" "SF,DF,V4SF,V2DF")) @@ -1318,7 +2041,7 @@ (eq_attr "mode" "QI,HI,SI,DI,TI")) (and (eq_attr "cpu" "znver2") (eq_attr "mode" "QI,HI,SI,DI,TI,OI")) - (and (eq_attr "cpu" "znver3") + (and (eq_attr "cpu" "znver3,znver4") (eq_attr "mode" "QI,HI,SI,DI,TI,OI"))) (and (eq_attr "type" "ssecmp") (eq_attr "memory" "none"))) @@ -1335,6 +2058,60 @@ (eq_attr "memory" "load"))) "znver1-direct,znver1-load,znver1-fp0|znver1-fp3") +(define_insn_reservation "znver4_sse_icmp" 3 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "QI,HI,SI,DI,TI") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "none")))))) + "znver1-direct,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sse_icmp_load" 10 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "QI,HI,SI,DI,TI") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "load")))))) + "znver1-double,znver4-load,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sse_icmp_vex" 4 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "OI") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "none")))))) + "znver1-direct,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sse_cmp_ivex_load" 11 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "OI") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "load")))))) + "znver1-double,znver4-load,znver1-fp0|znver1-fp1") + +(define_insn_reservation "znver4_sse_icmp_evex" 5 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "XI") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "none")))))) + "znver1-direct,znver1-fp0+znver1-fp1") + +(define_insn_reservation "znver4_sse_icmp_evex_load" 12 + (and (eq_attr "cpu" "znver4") + (and (eq_attr "mode" "XI") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "prefix" "evex") + (and (eq_attr "length_immediate" "1") + (eq_attr "memory" "load")))))) + "znver1-double,znver4-load,znver1-fp0+znver1-fp1") + (define_insn_reservation "znver1_sse_icmp_avx256" 1 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "OI") diff --git a/gcc/config/riscv/riscv-builtins.cc b/gcc/config/riscv/riscv-builtins.cc index 14865d7..9fa4d6c 100644 --- a/gcc/config/riscv/riscv-builtins.cc +++ b/gcc/config/riscv/riscv-builtins.cc @@ -223,7 +223,10 @@ riscv_init_builtins (void) { tree type = riscv_build_function_type (d->prototype); riscv_builtin_decls[i] - = add_builtin_function (d->name, type, i, BUILT_IN_MD, NULL, NULL); + = add_builtin_function (d->name, type, + (i << RISCV_BUILTIN_SHIFT) + + RISCV_BUILTIN_GENERAL, + BUILT_IN_MD, NULL, NULL); riscv_builtin_decl_index[d->icode] = i; } } @@ -234,9 +237,18 @@ riscv_init_builtins (void) tree riscv_builtin_decl (unsigned int code, bool initialize_p ATTRIBUTE_UNUSED) { - if (code >= ARRAY_SIZE (riscv_builtins)) - return error_mark_node; - return riscv_builtin_decls[code]; + unsigned int subcode = code >> RISCV_BUILTIN_SHIFT; + switch (code & RISCV_BUILTIN_CLASS) + { + case RISCV_BUILTIN_GENERAL: + if (subcode >= ARRAY_SIZE (riscv_builtins)) + return error_mark_node; + return riscv_builtin_decls[subcode]; + + case RISCV_BUILTIN_VECTOR: + return riscv_vector::builtin_decl (subcode, initialize_p); + } + return error_mark_node; } /* Take argument ARGNO from EXP's argument list and convert it into @@ -303,15 +315,23 @@ riscv_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl); - const struct riscv_builtin_description *d = &riscv_builtins[fcode]; - - switch (d->builtin_type) + unsigned int subcode = fcode >> RISCV_BUILTIN_SHIFT; + switch (fcode & RISCV_BUILTIN_CLASS) { - case RISCV_BUILTIN_DIRECT: - return riscv_expand_builtin_direct (d->icode, target, exp, true); - - case RISCV_BUILTIN_DIRECT_NO_TARGET: - return riscv_expand_builtin_direct (d->icode, target, exp, false); + case RISCV_BUILTIN_VECTOR: + return riscv_vector::expand_builtin (subcode, exp, target); + case RISCV_BUILTIN_GENERAL: { + const struct riscv_builtin_description *d = &riscv_builtins[subcode]; + + switch (d->builtin_type) + { + case RISCV_BUILTIN_DIRECT: + return riscv_expand_builtin_direct (d->icode, target, exp, true); + + case RISCV_BUILTIN_DIRECT_NO_TARGET: + return riscv_expand_builtin_direct (d->icode, target, exp, false); + } + } } gcc_unreachable (); diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index a44b34d..f8c9932 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -124,6 +124,23 @@ extern const char *mangle_builtin_type (const_tree); extern bool verify_type_context (location_t, type_context_kind, const_tree, bool); #endif extern void handle_pragma_vector (void); +extern tree builtin_decl (unsigned, bool); +extern rtx expand_builtin (unsigned int, tree, rtx); } +/* We classify builtin types into two classes: + 1. General builtin class which is defined in riscv_builtins. + 2. Vector builtin class which is a special builtin architecture + that implement intrinsic short into "pragma". */ +enum riscv_builtin_class +{ + RISCV_BUILTIN_GENERAL, + RISCV_BUILTIN_VECTOR +}; + +const unsigned int RISCV_BUILTIN_SHIFT = 1; + +/* Mask that selects the riscv_builtin_class part of a function code. */ +const unsigned int RISCV_BUILTIN_CLASS = (1 << RISCV_BUILTIN_SHIFT) - 1; + #endif /* ! GCC_RISCV_PROTOS_H */ diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc new file mode 100644 index 0000000..8582c0c --- /dev/null +++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc @@ -0,0 +1,104 @@ +/* function_base implementation for RISC-V 'V' Extension for GNU compiler. + Copyright (C) 2022-2022 Free Software Foundation, Inc. + Contributed by Ju-Zhe Zhong (juzhe.zhong@rivai.ai), RiVAI Technologies Ltd. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + <http://www.gnu.org/licenses/>. */ + +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "tm.h" +#include "tree.h" +#include "rtl.h" +#include "tm_p.h" +#include "memmodel.h" +#include "insn-codes.h" +#include "optabs.h" +#include "recog.h" +#include "expr.h" +#include "basic-block.h" +#include "function.h" +#include "fold-const.h" +#include "gimple.h" +#include "gimple-iterator.h" +#include "gimplify.h" +#include "explow.h" +#include "emit-rtl.h" +#include "tree-vector-builder.h" +#include "rtx-vector-builder.h" +#include "riscv-vector-builtins.h" +#include "riscv-vector-builtins-shapes.h" +#include "riscv-vector-builtins-bases.h" + +using namespace riscv_vector; + +namespace riscv_vector { + +/* Implements vsetvl<mode> && vsetvlmax<mode>. */ +template<bool VLMAX_P> +class vsetvl : public function_base +{ +public: + unsigned int call_properties (const function_instance &) const + { + return CP_READ_CSR | CP_WRITE_CSR; + } + + rtx expand (function_expander &e) const override + { + if (VLMAX_P) + e.add_input_operand (Pmode, gen_rtx_REG (Pmode, 0)); + else + e.add_input_operand (0); + + tree type = builtin_types[e.type.index].vector; + machine_mode mode = TYPE_MODE (type); + machine_mode inner_mode = GET_MODE_INNER (mode); + /* SEW. */ + e.add_input_operand (Pmode, + gen_int_mode (GET_MODE_BITSIZE (inner_mode), Pmode)); + + /* LMUL. Define the bitmap rule as follows: + | 4 | 3 2 1 0 | + | fractional_p | factor | + */ + bool fractional_p = known_lt (GET_MODE_SIZE (mode), BYTES_PER_RISCV_VECTOR); + unsigned int factor + = fractional_p ? exact_div (BYTES_PER_RISCV_VECTOR, GET_MODE_SIZE (mode)) + .to_constant () + : exact_div (GET_MODE_SIZE (mode), BYTES_PER_RISCV_VECTOR) + .to_constant (); + e.add_input_operand (Pmode, + gen_int_mode ((fractional_p << 4) | factor, Pmode)); + + /* TA. */ + e.add_input_operand (Pmode, gen_int_mode (1, Pmode)); + + /* MU. */ + e.add_input_operand (Pmode, gen_int_mode (0, Pmode)); + return e.generate_insn (code_for_vsetvl (Pmode)); + } +}; + +static CONSTEXPR const vsetvl<false> vsetvl_obj; +static CONSTEXPR const vsetvl<true> vsetvlmax_obj; +namespace bases { +const function_base *const vsetvl = &vsetvl_obj; +const function_base *const vsetvlmax = &vsetvlmax_obj; +} + +} // end namespace riscv_vector diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.h b/gcc/config/riscv/riscv-vector-builtins-bases.h new file mode 100644 index 0000000..a0ae18e --- /dev/null +++ b/gcc/config/riscv/riscv-vector-builtins-bases.h @@ -0,0 +1,33 @@ +/* function_base declaration for RISC-V 'V' Extension for GNU compiler. + Copyright (C) 2022-2022 Free Software Foundation, Inc. + Contributed by Ju-Zhe Zhong (juzhe.zhong@rivai.ai), RiVAI Technologies Ltd. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + <http://www.gnu.org/licenses/>. */ + +#ifndef GCC_RISCV_VECTOR_BUILTINS_BASES_H +#define GCC_RISCV_VECTOR_BUILTINS_BASES_H + +namespace riscv_vector { + +namespace bases { +extern const function_base *const vsetvl; +extern const function_base *const vsetvlmax; +} + +} // end namespace riscv_vector + +#endif diff --git a/gcc/config/riscv/riscv-vector-builtins-functions.def b/gcc/config/riscv/riscv-vector-builtins-functions.def new file mode 100644 index 0000000..dc41537 --- /dev/null +++ b/gcc/config/riscv/riscv-vector-builtins-functions.def @@ -0,0 +1,43 @@ +/* Intrinsic define macros for RISC-V 'V' Extension for GNU compiler. + Copyright (C) 2022-2022 Free Software Foundation, Inc. + Contributed by Juzhe Zhong (juzhe.zhong@rivai.ai), RiVAI Technologies Ltd. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +<http://www.gnu.org/licenses/>. */ + +/* Use "DEF_RVV_FUNCTION" macro to define RVV intrinsic functions. + + - NAME not only describes the base_name of the functions + but also point to the name of the function_base class. + + - SHAPE point to the function_shape class. + + - PREDS describes the predication types that are supported in the + functions. + + - OPS_INFO describes all information of return type and each + argument type. + +*/ +#ifndef DEF_RVV_FUNCTION +#define DEF_RVV_FUNCTION(NAME, SHAPE, PREDS, OPS_INFO) +#endif + +/* 6. Configuration-Setting Instructions. */ +DEF_RVV_FUNCTION (vsetvl, vsetvl, none_preds, i_none_size_size_ops) +DEF_RVV_FUNCTION (vsetvlmax, vsetvlmax, none_preds, i_none_size_void_ops) + +#undef DEF_RVV_FUNCTION diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc b/gcc/config/riscv/riscv-vector-builtins-shapes.cc new file mode 100644 index 0000000..24fc1c0 --- /dev/null +++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc @@ -0,0 +1,104 @@ +/* function_shape implementation for RISC-V 'V' Extension for GNU compiler. + Copyright (C) 2022-2022 Free Software Foundation, Inc. + Contributed by Ju-Zhe Zhong (juzhe.zhong@rivai.ai), RiVAI Technologies Ltd. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + <http://www.gnu.org/licenses/>. */ + +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "tm.h" +#include "tree.h" +#include "rtl.h" +#include "tm_p.h" +#include "memmodel.h" +#include "insn-codes.h" +#include "optabs.h" +#include "riscv-vector-builtins.h" +#include "riscv-vector-builtins-shapes.h" + +namespace riscv_vector { + +/* Add one function instance for GROUP, using operand suffix at index OI, + mode suffix at index PAIR && bi and predication suffix at index pred_idx. */ +static void +build_one (function_builder &b, const function_group_info &group, + unsigned int pred_idx, unsigned int vec_type_idx) +{ + /* Byte forms of non-tuple vlxusegei take 21 arguments. */ + auto_vec<tree, 21> argument_types; + function_instance function_instance (group.base_name, *group.base, + *group.shape, + group.ops_infos.types[vec_type_idx], + group.preds[pred_idx], &group.ops_infos); + tree return_type = group.ops_infos.ret.get_tree_type ( + group.ops_infos.types[vec_type_idx].index); + b.allocate_argument_types (function_instance, argument_types); + b.add_unique_function (function_instance, (*group.shape), return_type, + argument_types); +} + +/* Add a function instance for every operand && predicate && args + combination in GROUP. Take the function base name from GROUP && operand + suffix from operand_suffixes && mode suffix from type_suffixes && predication + suffix from predication_suffixes. Use apply_predication to add in + the predicate. */ +static void +build_all (function_builder &b, const function_group_info &group) +{ + for (unsigned int pred_idx = 0; group.preds[pred_idx] != NUM_PRED_TYPES; + ++pred_idx) + for (unsigned int vec_type_idx = 0; + group.ops_infos.types[vec_type_idx].index != NUM_VECTOR_TYPES; + ++vec_type_idx) + build_one (b, group, pred_idx, vec_type_idx); +} + +/* Declare the function shape NAME, pointing it to an instance + of class <NAME>_def. */ +#define SHAPE(DEF, VAR) \ + static CONSTEXPR const DEF##_def VAR##_obj; \ + namespace shapes { const function_shape *const VAR = &VAR##_obj; } + +/* Base class for for build. */ +struct build_base : public function_shape +{ + void build (function_builder &b, + const function_group_info &group) const override + { + build_all (b, group); + } +}; + +/* vsetvl_def class. */ +struct vsetvl_def : public build_base +{ + char *get_name (function_builder &b, const function_instance &instance, + bool overloaded_p) const override + { + /* vsetvl* instruction doesn't have C++ overloaded functions. */ + if (overloaded_p) + return nullptr; + b.append_name (instance.base_name); + b.append_name (type_suffixes[instance.type.index].vsetvl); + return b.finish_name (); + } +}; +SHAPE(vsetvl, vsetvl) +SHAPE(vsetvl, vsetvlmax) + +} // end namespace riscv_vector diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.h b/gcc/config/riscv/riscv-vector-builtins-shapes.h new file mode 100644 index 0000000..f2d876f --- /dev/null +++ b/gcc/config/riscv/riscv-vector-builtins-shapes.h @@ -0,0 +1,33 @@ +/* function_shape declaration for RISC-V 'V' Extension for GNU compiler. + Copyright (C) 2022-2022 Free Software Foundation, Inc. + Contributed by Ju-Zhe Zhong (juzhe.zhong@rivai.ai), RiVAI Technologies Ltd. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + <http://www.gnu.org/licenses/>. */ + +#ifndef GCC_RISCV_VECTOR_BUILTINS_SHAPES_H +#define GCC_RISCV_VECTOR_BUILTINS_SHAPES_H + +namespace riscv_vector { + +namespace shapes { +extern const function_shape *const vsetvl; +extern const function_shape *const vsetvlmax; +} + +} // end namespace riscv_vector + +#endif diff --git a/gcc/config/riscv/riscv-vector-builtins-types.def b/gcc/config/riscv/riscv-vector-builtins-types.def new file mode 100644 index 0000000..f282a5e --- /dev/null +++ b/gcc/config/riscv/riscv-vector-builtins-types.def @@ -0,0 +1,50 @@ +/* Intrinsic type iterators for RISC-V 'V' Extension for GNU compiler. + Copyright (C) 2022-2022 Free Software Foundation, Inc. + Contributed by Juzhe Zhong (juzhe.zhong@rivai.ai), RiVAI Technologies Ltd. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +<http://www.gnu.org/licenses/>. */ + +/* Use "DEF_ALL_SIGNED_INTEGER" macro include all signed integer which will be + iterated and registered as intrinsic functions. */ +#ifndef DEF_RVV_I_OPS +#define DEF_RVV_I_OPS(TYPE, REQUIRE) +#endif + +DEF_RVV_I_OPS (vint8mf8_t, RVV_REQUIRE_ZVE64) +DEF_RVV_I_OPS (vint8mf4_t, 0) +DEF_RVV_I_OPS (vint8mf2_t, 0) +DEF_RVV_I_OPS (vint8m1_t, 0) +DEF_RVV_I_OPS (vint8m2_t, 0) +DEF_RVV_I_OPS (vint8m4_t, 0) +DEF_RVV_I_OPS (vint8m8_t, 0) +DEF_RVV_I_OPS (vint16mf4_t, RVV_REQUIRE_ZVE64) +DEF_RVV_I_OPS (vint16mf2_t, 0) +DEF_RVV_I_OPS (vint16m1_t, 0) +DEF_RVV_I_OPS (vint16m2_t, 0) +DEF_RVV_I_OPS (vint16m4_t, 0) +DEF_RVV_I_OPS (vint16m8_t, 0) +DEF_RVV_I_OPS (vint32mf2_t, RVV_REQUIRE_ZVE64) +DEF_RVV_I_OPS (vint32m1_t, 0) +DEF_RVV_I_OPS (vint32m2_t, 0) +DEF_RVV_I_OPS (vint32m4_t, 0) +DEF_RVV_I_OPS (vint32m8_t, 0) +DEF_RVV_I_OPS (vint64m1_t, RVV_REQUIRE_ZVE64) +DEF_RVV_I_OPS (vint64m2_t, RVV_REQUIRE_ZVE64) +DEF_RVV_I_OPS (vint64m4_t, RVV_REQUIRE_ZVE64) +DEF_RVV_I_OPS (vint64m8_t, RVV_REQUIRE_ZVE64) + +#undef DEF_RVV_I_OPS diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc index 55d4565..dc41078 100644 --- a/gcc/config/riscv/riscv-vector-builtins.cc +++ b/gcc/config/riscv/riscv-vector-builtins.cc @@ -45,6 +45,8 @@ #include "targhooks.h" #include "regs.h" #include "riscv-vector-builtins.h" +#include "riscv-vector-builtins-shapes.h" +#include "riscv-vector-builtins-bases.h" using namespace riscv_vector; @@ -66,13 +68,98 @@ struct vector_type_info const char *mangled_name; }; -/* Information about each RVV type. */ +/* Describes a function decl. */ +class GTY (()) registered_function +{ +public: + function_instance GTY ((skip)) instance; + + /* The decl itself. */ + tree GTY ((skip)) decl; +}; + +/* Hash traits for registered_function. */ +struct registered_function_hasher : nofree_ptr_hash<registered_function> +{ + typedef function_instance compare_type; + + static hashval_t hash (value_type); + static bool equal (value_type, const compare_type &); +}; + +/* Static information about each RVV type. */ static CONSTEXPR const vector_type_info vector_types[] = { #define DEF_RVV_TYPE(NAME, NCHARS, ABI_NAME, ARGS...) \ {#NAME, #ABI_NAME, "u" #NCHARS #ABI_NAME}, #include "riscv-vector-builtins.def" }; +/* Static information about operand suffix for each RVV type. */ +const char *const operand_suffixes[NUM_OP_TYPES] = { + "", /* OP_TYPE_none. */ +#define DEF_RVV_OP_TYPE(NAME) "_" # NAME, +#include "riscv-vector-builtins.def" +}; + +/* Static information about type suffix for each RVV type. */ +const rvv_builtin_suffixes type_suffixes[NUM_VECTOR_TYPES + 1] = { +#define DEF_RVV_TYPE(NAME, NCHARS, ABI_NAME, SCALAR_TYPE, VECTOR_MODE, \ + VECTOR_MODE_MIN_VLEN_32, VECTOR_SUFFIX, SCALAR_SUFFIX, \ + VSETVL_SUFFIX) \ + {#VECTOR_SUFFIX, #SCALAR_SUFFIX, #VSETVL_SUFFIX}, +#include "riscv-vector-builtins.def" +}; + +/* Static information about predication suffix for each RVV type. */ +const char *const predication_suffixes[NUM_PRED_TYPES] = { + "", /* PRED_TYPE_none. */ +#define DEF_RVV_PRED_TYPE(NAME) "_" # NAME, +#include "riscv-vector-builtins.def" +}; + +/* A list of all signed integer will be registered for intrinsic functions. */ +static const rvv_type_info i_ops[] = { +#define DEF_RVV_I_OPS(TYPE, REQUIRE) {VECTOR_TYPE_##TYPE, REQUIRE}, +#include "riscv-vector-builtins-types.def" + {NUM_VECTOR_TYPES, 0}}; + +static CONSTEXPR const rvv_arg_type_info rvv_arg_type_info_end + = rvv_arg_type_info (NUM_BASE_TYPES); + +/* A list of args for size_t func (void) function. */ +static CONSTEXPR const rvv_arg_type_info void_args[] + = {rvv_arg_type_info (RVV_BASE_void), rvv_arg_type_info_end}; + +/* A list of args for size_t func (size_t) function. */ +static CONSTEXPR const rvv_arg_type_info size_args[] + = {rvv_arg_type_info (RVV_BASE_size), rvv_arg_type_info_end}; + +/* A list of none preds that will be registered for intrinsic functions. */ +static CONSTEXPR const predication_type_index none_preds[] + = {PRED_TYPE_none, NUM_PRED_TYPES}; + +/* A static operand information for size_t func (void) function registration. */ +static CONSTEXPR const rvv_op_info i_none_size_void_ops + = {i_ops, /* Types */ + OP_TYPE_none, /* Suffix */ + rvv_arg_type_info (RVV_BASE_size), /* Return type */ + void_args /* Args */}; + +/* A static operand information for size_t func (size_t) function registration. + */ +static CONSTEXPR const rvv_op_info i_none_size_size_ops + = {i_ops, /* Types */ + OP_TYPE_none, /* Suffix */ + rvv_arg_type_info (RVV_BASE_size), /* Return type */ + size_args /* Args */}; + +/* A list of all RVV intrinsic functions. */ +static function_group_info function_groups[] = { +#define DEF_RVV_FUNCTION(NAME, SHAPE, PREDS, OPS_INFO) \ + {#NAME, &bases::NAME, &shapes::SHAPE, PREDS, OPS_INFO}, +#include "riscv-vector-builtins-functions.def" +}; + /* The RVV types, with their built-in "__rvv..._t" name. Allow an index of NUM_VECTOR_TYPES, which always yields a null tree. */ @@ -82,6 +169,14 @@ static GTY (()) tree abi_vector_types[NUM_VECTOR_TYPES + 1]; extern GTY (()) rvv_builtin_types_t builtin_types[NUM_VECTOR_TYPES + 1]; rvv_builtin_types_t builtin_types[NUM_VECTOR_TYPES + 1]; +/* The list of all registered function decls, indexed by code. */ +static GTY (()) vec<registered_function *, va_gc> *registered_functions; + +/* All registered function decls, hashed on the function_instance + that they implement. This is used for looking up implementations of + overloaded functions. */ +static hash_table<registered_function_hasher> *function_table; + /* RAII class for enabling enough RVV features to define the built-in types and implement the riscv_vector.h pragma. @@ -118,6 +213,13 @@ rvv_switcher::~rvv_switcher () sizeof (have_regs_of_mode)); } +/* Add attribute NAME to ATTRS. */ +static tree +add_attribute (const char *name, tree attrs) +{ + return tree_cons (get_identifier (name), NULL_TREE, attrs); +} + /* Add type attributes to builtin type tree, currently only the mangled name. */ static void add_vector_type_attribute (tree type, const char *mangled_name) @@ -215,6 +317,7 @@ static void register_vector_type (vector_type_index type) { tree vectype = abi_vector_types[type]; + /* When vectype is NULL, the corresponding builtin type is disabled according to '-march'. */ if (!vectype) @@ -237,6 +340,386 @@ register_vector_type (vector_type_index type) builtin_types[type].vector_ptr = build_pointer_type (vectype); } +/* Check whether all the RVV_REQUIRE_* values in REQUIRED_EXTENSIONS are + enabled. */ +static bool +check_required_extensions (uint64_t required_extensions) +{ + uint64_t riscv_isa_flags = 0; + + if (TARGET_VECTOR_ELEN_FP_32) + riscv_isa_flags |= RVV_REQUIRE_ELEN_FP_32; + if (TARGET_VECTOR_ELEN_FP_64) + riscv_isa_flags |= RVV_REQUIRE_ELEN_FP_64; + if (TARGET_MIN_VLEN > 32) + riscv_isa_flags |= RVV_REQUIRE_ZVE64; + if (TARGET_64BIT) + riscv_isa_flags |= RVV_REQUIRE_RV64BIT; + + uint64_t missing_extensions = required_extensions & ~riscv_isa_flags; + if (missing_extensions != 0) + return false; + return true; +} + +tree +rvv_arg_type_info::get_tree_type (vector_type_index type_idx) const +{ + switch (base_type) + { + case RVV_BASE_vector: + return builtin_types[type_idx].vector; + case RVV_BASE_scalar: + return builtin_types[type_idx].scalar; + case RVV_BASE_vector_ptr: + return builtin_types[type_idx].vector_ptr; + case RVV_BASE_scalar_ptr: + return builtin_types[type_idx].scalar_ptr; + case RVV_BASE_scalar_const_ptr: + return builtin_types[type_idx].scalar_const_ptr; + case RVV_BASE_void: + return void_type_node; + case RVV_BASE_size: + return size_type_node; + case RVV_BASE_ptrdiff: + return ptrdiff_type_node; + case RVV_BASE_unsigned_long: + return long_unsigned_type_node; + case RVV_BASE_long: + return long_integer_type_node; + default: + gcc_unreachable (); + } +} + +function_instance::function_instance (const char *base_name_in, + const function_base *base_in, + const function_shape *shape_in, + rvv_type_info type_in, + predication_type_index pred_in, + const rvv_op_info *op_info_in) + : base_name (base_name_in), base (base_in), shape (shape_in), type (type_in), + pred (pred_in), op_info (op_info_in) +{ +} + +bool +function_instance::operator== (const function_instance &other) const +{ + for (unsigned int i = 0; op_info->args[i].base_type != NUM_BASE_TYPES; ++i) + if (op_info->args[i].base_type != other.op_info->args[i].base_type) + return false; + return (base == other.base && shape == other.shape + && type.index == other.type.index && op_info->op == other.op_info->op + && pred == other.pred + && op_info->ret.base_type == other.op_info->ret.base_type); +} + +bool +function_instance::any_type_float_p () const +{ + if (FLOAT_MODE_P (TYPE_MODE (get_return_type ()))) + return true; + + for (int i = 0; op_info->args[i].base_type != NUM_BASE_TYPES; ++i) + if (FLOAT_MODE_P (TYPE_MODE (get_arg_type (i)))) + return true; + + return false; +} + +tree +function_instance::get_return_type () const +{ + return op_info->ret.get_tree_type (type.index); +} + +tree +function_instance::get_arg_type (unsigned opno) const +{ + return op_info->args[opno].get_tree_type (type.index); +} + +/* Return a hash code for a function_instance. */ +hashval_t +function_instance::hash () const +{ + inchash::hash h; + /* BASE uniquely determines BASE_NAME, so we don't need to hash both. */ + h.add_ptr (base); + h.add_ptr (shape); + h.add_int (type.index); + h.add_int (op_info->op); + h.add_int (pred); + h.add_int (op_info->ret.base_type); + for (unsigned int i = 0; op_info->args[i].base_type != NUM_BASE_TYPES; ++i) + h.add_int (op_info->args[i].base_type); + return h.end (); +} + +/* Return a set of CP_* flags that describe what the function could do, + taking the command-line flags into account. */ +unsigned int +function_instance::call_properties () const +{ + unsigned int flags = base->call_properties (*this); + + /* -fno-trapping-math means that we can assume any FP exceptions + are not user-visible. */ + if (!flag_trapping_math) + flags &= ~CP_RAISE_FP_EXCEPTIONS; + + return flags; +} + +/* Return true if calls to the function could read some form of + global state. */ +bool +function_instance::reads_global_state_p () const +{ + unsigned int flags = call_properties (); + + /* Preserve any dependence on rounding mode, flush to zero mode, etc. + There is currently no way of turning this off; in particular, + -fno-rounding-math (which is the default) means that we should make + the usual assumptions about rounding mode, which for intrinsics means + acting as the instructions do. */ + if (flags & CP_READ_FPCR) + return true; + + /* Handle direct reads of global state. */ + return flags & (CP_READ_MEMORY | CP_READ_CSR); +} + +/* Return true if calls to the function could modify some form of + global state. */ +bool +function_instance::modifies_global_state_p () const +{ + unsigned int flags = call_properties (); + + /* Preserve any exception state written back to the FPCR, + unless -fno-trapping-math says this is unnecessary. */ + if (flags & CP_RAISE_FP_EXCEPTIONS) + return true; + + /* Handle direct modifications of global state. */ + return flags & (CP_WRITE_MEMORY | CP_WRITE_CSR); +} + +/* Return true if calls to the function could raise a signal. */ +bool +function_instance::could_trap_p () const +{ + unsigned int flags = call_properties (); + + /* Handle functions that could raise SIGFPE. */ + if (flags & CP_RAISE_FP_EXCEPTIONS) + return true; + + /* Handle functions that could raise SIGBUS or SIGSEGV. */ + if (flags & (CP_READ_MEMORY | CP_WRITE_MEMORY)) + return true; + + return false; +} + +function_builder::function_builder () +{ + m_direct_overloads = lang_GNU_CXX (); + gcc_obstack_init (&m_string_obstack); +} + +function_builder::~function_builder () +{ + obstack_free (&m_string_obstack, NULL); +} + +/* Allocate arguments of the function. */ +void +function_builder::allocate_argument_types (const function_instance &instance, + vec<tree> &argument_types) const +{ + for (unsigned int i = 0; + instance.op_info->args[i].base_type != NUM_BASE_TYPES; ++i) + argument_types.quick_push ( + instance.op_info->args[i].get_tree_type (instance.type.index)); +} + +/* Register all the functions in GROUP. */ +void +function_builder::register_function_group (const function_group_info &group) +{ + (*group.shape)->build (*this, group); +} + +/* Add NAME to the end of the function name being built. */ +void +function_builder::append_name (const char *name) +{ + obstack_grow (&m_string_obstack, name, strlen (name)); +} + +/* Zero-terminate and complete the function name being built. */ +char * +function_builder::finish_name () +{ + obstack_1grow (&m_string_obstack, 0); + return (char *) obstack_finish (&m_string_obstack); +} + +/* Return the appropriate function attributes for INSTANCE. */ +tree +function_builder::get_attributes (const function_instance &instance) +{ + tree attrs = NULL_TREE; + + if (!instance.modifies_global_state_p ()) + { + if (instance.reads_global_state_p ()) + attrs = add_attribute ("pure", attrs); + else + attrs = add_attribute ("const", attrs); + } + + if (!flag_non_call_exceptions || !instance.could_trap_p ()) + attrs = add_attribute ("nothrow", attrs); + + return add_attribute ("leaf", attrs); +} + +/* Add a function called NAME with type FNTYPE and attributes ATTRS. + INSTANCE describes what the function does. */ +registered_function & +function_builder::add_function (const function_instance &instance, + const char *name, tree fntype, tree attrs, + bool placeholder_p) +{ + unsigned int code = vec_safe_length (registered_functions); + code = (code << RISCV_BUILTIN_SHIFT) + RISCV_BUILTIN_VECTOR; + + /* We need to be able to generate placeholders to enusre that we have a + consistent numbering scheme for function codes between the C and C++ + frontends, so that everything ties up in LTO. + + Currently, tree-streamer-in.c:unpack_ts_function_decl_value_fields + validates that tree nodes returned by TARGET_BUILTIN_DECL are non-NULL and + some node other than error_mark_node. This is a holdover from when builtin + decls were streamed by code rather than by value. + + Ultimately, we should be able to remove this validation of BUILT_IN_MD + nodes and remove the target hook. For now, however, we need to appease the + validation and return a non-NULL, non-error_mark_node node, so we + arbitrarily choose integer_zero_node. */ + tree decl = placeholder_p + ? integer_zero_node + : simulate_builtin_function_decl (input_location, name, fntype, + code, NULL, attrs); + + registered_function &rfn = *ggc_alloc<registered_function> (); + rfn.instance = instance; + rfn.decl = decl; + vec_safe_push (registered_functions, &rfn); + + return rfn; +} + +/* Add a built-in function for INSTANCE, with the argument types given + by ARGUMENT_TYPES and the return type given by RETURN_TYPE. NAME is + the "full" name for C function. OVERLOAD_NAME is the "short" name for + C++ overloaded function. OVERLOAD_NAME can be nullptr because some + instance doesn't have C++ overloaded function. */ +void +function_builder::add_unique_function (const function_instance &instance, + const function_shape *shape, + tree return_type, + vec<tree> &argument_types) +{ + /* Do not add this function if it is invalid. */ + if (!check_required_extensions (instance.type.required_extensions)) + return; + + /* Add the function under its full (unique) name. */ + char *name = shape->get_name (*this, instance, false); + tree fntype + = build_function_type_array (return_type, argument_types.length (), + argument_types.address ()); + tree attrs = get_attributes (instance); + registered_function &rfn + = add_function (instance, name, fntype, attrs, false); + + /* Enter the function into the hash table. */ + hashval_t hash = instance.hash (); + registered_function **rfn_slot + = function_table->find_slot_with_hash (instance, hash, INSERT); + gcc_assert (!*rfn_slot); + *rfn_slot = &rfn; + + /* Also add the function under its overloaded alias, if we want + a separate decl for each instance of an overloaded function. */ + char *overload_name = shape->get_name (*this, instance, true); + if (overload_name) + { + /* Attribute lists shouldn't be shared. */ + tree attrs = get_attributes (instance); + bool placeholder_p = !m_direct_overloads; + add_function (instance, overload_name, fntype, attrs, placeholder_p); + } + obstack_free (&m_string_obstack, name); +} + +function_call_info::function_call_info (location_t location_in, + const function_instance &instance_in, + tree fndecl_in) + : function_instance (instance_in), location (location_in), fndecl (fndecl_in) +{} + +function_expander::function_expander (const function_instance &instance, + tree fndecl_in, tree exp_in, + rtx target_in) + : function_call_info (EXPR_LOCATION (exp_in), instance, fndecl_in), + exp (exp_in), target (target_in), opno (0) +{ + if (!function_returns_void_p ()) + create_output_operand (&m_ops[opno++], target, TYPE_MODE (TREE_TYPE (exp))); +} + +/* Take argument ARGNO from EXP's argument list and convert it into + an expand operand. Store the operand in *M_OPS. */ +void +function_expander::add_input_operand (unsigned argno) +{ + tree arg = CALL_EXPR_ARG (exp, argno); + rtx x = expand_normal (arg); + add_input_operand (TYPE_MODE (TREE_TYPE (arg)), x); +} + +/* Generate instruction ICODE, given that its operands have already + been added to M_OPS. Return the value of the first operand. */ +rtx +function_expander::generate_insn (insn_code icode) +{ + gcc_assert (opno == insn_data[icode].n_generator_args); + if (!maybe_expand_insn (icode, opno, m_ops)) + { + error ("invalid argument to built-in function"); + return NULL_RTX; + } + return function_returns_void_p () ? const0_rtx : m_ops[0].value; +} + +inline hashval_t +registered_function_hasher::hash (value_type value) +{ + return value->instance.hash (); +} + +inline bool +registered_function_hasher::equal (value_type value, const compare_type &key) +{ + return value->instance == key; +} + /* If TYPE is a built-in type defined by the RVV ABI, return the mangled name, otherwise return NULL. */ const char * @@ -349,11 +832,57 @@ verify_type_context (location_t loc, type_context_kind context, const_tree type, void handle_pragma_vector () { + if (function_table) + { + error ("duplicate definition of %qs", "riscv_vector.h"); + return; + } rvv_switcher rvv; /* Define the vector and tuple types. */ for (unsigned int type_i = 0; type_i < NUM_VECTOR_TYPES; ++type_i) register_vector_type ((enum vector_type_index) type_i); + + /* Define the functions. */ + function_table = new hash_table<registered_function_hasher> (1023); + function_builder builder; + for (unsigned int i = 0; i < ARRAY_SIZE (function_groups); ++i) + builder.register_function_group (function_groups[i]); +} + +/* Return the function decl with RVV function subcode CODE, or error_mark_node + if no such function exists. */ +tree +builtin_decl (unsigned int code, bool) +{ + if (code >= vec_safe_length (registered_functions)) + return error_mark_node; + + return (*registered_functions)[code]->decl; +} + +/* Expand a call to the RVV function with subcode CODE. EXP is the call + expression and TARGET is the preferred location for the result. + Return the value of the lhs. */ +rtx +expand_builtin (unsigned int code, tree exp, rtx target) +{ + registered_function &rfn = *(*registered_functions)[code]; + return function_expander (rfn.instance, rfn.decl, exp, target).expand (); } } // end namespace riscv_vector + +inline void +gt_ggc_mx (function_instance *) +{} + +inline void +gt_pch_nx (function_instance *) +{} + +inline void +gt_pch_nx (function_instance *, gt_pointer_operator, void *) +{} + +#include "gt-riscv-vector-builtins.h" diff --git a/gcc/config/riscv/riscv-vector-builtins.def b/gcc/config/riscv/riscv-vector-builtins.def index 83603fe..b7a633e 100644 --- a/gcc/config/riscv/riscv-vector-builtins.def +++ b/gcc/config/riscv/riscv-vector-builtins.def @@ -19,181 +19,290 @@ along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ /* Use "DEF_RVV_TYPE" macro to define RVV datatype builtins. - 1.The 1 argument is the name exposed to users. + 1.The 'NAME' argument is the name exposed to users. For example, "vint32m1_t". - 2.The 2 argument is the length of ABI-name. + 2.The 'NCHARS' argument is the length of ABI-name. For example, length of "__rvv_int32m1_t" is 15. - 3.The 3 argument is the ABI-name. For example, "__rvv_int32m1_t". - 4.The 4 argument is associated scalar type which is used in + 3.The 'ABI_NAME' argument is the ABI-name. For example, "__rvv_int32m1_t". + 4.The 'SCALAR_TYPE' argument is associated scalar type which is used in "build_vector_type_for_mode". For "vint32m1_t", we use "intSI_type_node" in RV64. Otherwise, we use "long_integer_type_node". - 5.The 5 and 6 argument are the machine modes of corresponding RVV type used - in "build_vector_type_for_mode". For "vint32m1_t", we use VNx2SImode when - TARGET_MIN_VLEN > 32. Otherwise the machine mode is VNx1SImode. */ + 5.The 'VECTOR_MODE' is the machine modes of corresponding RVV type used + in "build_vector_type_for_mode" when TARGET_MIN_VLEN > 32. + For example: VECTOR_MODE = VNx2SI for "vint32m1_t". + 6.The 'VECTOR_MODE_MIN_VLEN_32' is the machine modes of corresponding RVV + type used in "build_vector_type_for_mode" when TARGET_MIN_VLEN = 32. For + example: VECTOR_MODE_MIN_VLEN_32 = VNx1SI for "vint32m1_t". + 7.The 'VECTOR_SUFFIX' define mode suffix for vector type. + For example: type_suffixes[VECTOR_TYPE_vin32m1_t].vector = i32m1. + 8.The 'SCALAR_SUFFIX' define mode suffix for scalar type. + For example: type_suffixes[VECTOR_TYPE_vin32m1_t].scalar = i32. + 9.The 'VSETVL_SUFFIX' define mode suffix for vsetvli instruction. + For example: type_suffixes[VECTOR_TYPE_vin32m1_t].vsetvl = e32m1. +*/ #ifndef DEF_RVV_TYPE #define DEF_RVV_TYPE(NAME, NCHARS, ABI_NAME, SCALAR_TYPE, VECTOR_MODE, \ - VECTOR_MODE_MIN_VLEN_32) + VECTOR_MODE_MIN_VLEN_32, VECTOR_SUFFIX, SCALAR_SUFFIX, \ + VSETVL_SUFFIX) +#endif + +/* Use "DEF_RVV_OP_TYPE" macro to define RVV operand types. + The 'NAME' will be concatenated into intrinsic function name. */ +#ifndef DEF_RVV_OP_TYPE +#define DEF_RVV_OP_TYPE(NAME) +#endif + +/* Use "DEF_RVV_PRED_TYPE" macro to define RVV predication types. + The 'NAME' will be concatenated into intrinsic function name. */ +#ifndef DEF_RVV_PRED_TYPE +#define DEF_RVV_PRED_TYPE(NAME) #endif /* SEW/LMUL = 64: Only enable when TARGET_MIN_VLEN > 32 and machine mode = VNx1BImode. */ -DEF_RVV_TYPE (vbool64_t, 14, __rvv_bool64_t, boolean, VNx1BI, VOID) +DEF_RVV_TYPE (vbool64_t, 14, __rvv_bool64_t, boolean, VNx1BI, VOID, _b64, , ) /* SEW/LMUL = 32: Machine mode = VNx2BImode when TARGET_MIN_VLEN > 32. Machine mode = VNx1BImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vbool32_t, 14, __rvv_bool32_t, boolean, VNx2BI, VNx1BI) +DEF_RVV_TYPE (vbool32_t, 14, __rvv_bool32_t, boolean, VNx2BI, VNx1BI, _b32, , ) /* SEW/LMUL = 16: Machine mode = VNx2BImode when TARGET_MIN_VLEN = 32. Machine mode = VNx4BImode when TARGET_MIN_VLEN > 32. */ -DEF_RVV_TYPE (vbool16_t, 14, __rvv_bool16_t, boolean, VNx4BI, VNx2BI) +DEF_RVV_TYPE (vbool16_t, 14, __rvv_bool16_t, boolean, VNx4BI, VNx2BI, _b16, , ) /* SEW/LMUL = 8: Machine mode = VNx8BImode when TARGET_MIN_VLEN > 32. Machine mode = VNx4BImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vbool8_t, 13, __rvv_bool8_t, boolean, VNx8BI, VNx4BI) +DEF_RVV_TYPE (vbool8_t, 13, __rvv_bool8_t, boolean, VNx8BI, VNx4BI, _b8, , ) /* SEW/LMUL = 4: Machine mode = VNx16BImode when TARGET_MIN_VLEN > 32. Machine mode = VNx8BImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vbool4_t, 13, __rvv_bool4_t, boolean, VNx16BI, VNx8BI) +DEF_RVV_TYPE (vbool4_t, 13, __rvv_bool4_t, boolean, VNx16BI, VNx8BI, _b4, , ) /* SEW/LMUL = 2: Machine mode = VNx32BImode when TARGET_MIN_VLEN > 32. Machine mode = VNx16BImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vbool2_t, 13, __rvv_bool2_t, boolean, VNx32BI, VNx16BI) +DEF_RVV_TYPE (vbool2_t, 13, __rvv_bool2_t, boolean, VNx32BI, VNx16BI, _b2, , ) /* SEW/LMUL = 1: Machine mode = VNx64BImode when TARGET_MIN_VLEN > 32. Machine mode = VNx32BImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vbool1_t, 13, __rvv_bool1_t, boolean, VNx64BI, VNx32BI) +DEF_RVV_TYPE (vbool1_t, 13, __rvv_bool1_t, boolean, VNx64BI, VNx32BI, _b1, , ) /* LMUL = 1/8: Only enble when TARGET_MIN_VLEN > 32 and machine mode = VNx1QImode. */ -DEF_RVV_TYPE (vint8mf8_t, 15, __rvv_int8mf8_t, intQI, VNx1QI, VOID) -DEF_RVV_TYPE (vuint8mf8_t, 16, __rvv_uint8mf8_t, unsigned_intQI, VNx1QI, VOID) +DEF_RVV_TYPE (vint8mf8_t, 15, __rvv_int8mf8_t, intQI, VNx1QI, VOID, _i8mf8, _i8, + _e8mf8) +DEF_RVV_TYPE (vuint8mf8_t, 16, __rvv_uint8mf8_t, unsigned_intQI, VNx1QI, VOID, + _u8mf8, _u8, _e8mf8) /* LMUL = 1/4: Machine mode = VNx2QImode when TARGET_MIN_VLEN > 32. Machine mode = VNx1QImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint8mf4_t, 15, __rvv_int8mf4_t, intQI, VNx2QI, VNx1QI) -DEF_RVV_TYPE (vuint8mf4_t, 16, __rvv_uint8mf4_t, unsigned_intQI, VNx2QI, VNx1QI) +DEF_RVV_TYPE (vint8mf4_t, 15, __rvv_int8mf4_t, intQI, VNx2QI, VNx1QI, _i8mf4, + _i8, _e8mf4) +DEF_RVV_TYPE (vuint8mf4_t, 16, __rvv_uint8mf4_t, unsigned_intQI, VNx2QI, VNx1QI, + _u8mf4, _u8, _e8mf4) /* LMUL = 1/2: Machine mode = VNx4QImode when TARGET_MIN_VLEN > 32. Machine mode = VNx2QImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint8mf2_t, 15, __rvv_int8mf2_t, intQI, VNx4QI, VNx2QI) -DEF_RVV_TYPE (vuint8mf2_t, 16, __rvv_uint8mf2_t, unsigned_intQI, VNx4QI, VNx2QI) +DEF_RVV_TYPE (vint8mf2_t, 15, __rvv_int8mf2_t, intQI, VNx4QI, VNx2QI, _i8mf2, + _i8, _e8mf2) +DEF_RVV_TYPE (vuint8mf2_t, 16, __rvv_uint8mf2_t, unsigned_intQI, VNx4QI, VNx2QI, + _u8mf2, _u8, _e8mf2) /* LMUL = 1: Machine mode = VNx8QImode when TARGET_MIN_VLEN > 32. Machine mode = VNx4QImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint8m1_t, 14, __rvv_int8m1_t, intQI, VNx8QI, VNx4QI) -DEF_RVV_TYPE (vuint8m1_t, 15, __rvv_uint8m1_t, unsigned_intQI, VNx8QI, VNx4QI) +DEF_RVV_TYPE (vint8m1_t, 14, __rvv_int8m1_t, intQI, VNx8QI, VNx4QI, _i8m1, _i8, + _e8m1) +DEF_RVV_TYPE (vuint8m1_t, 15, __rvv_uint8m1_t, unsigned_intQI, VNx8QI, VNx4QI, + _u8m1, _u8, _e8m1) /* LMUL = 2: Machine mode = VNx16QImode when TARGET_MIN_VLEN > 32. Machine mode = VNx8QImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint8m2_t, 14, __rvv_int8m2_t, intQI, VNx16QI, VNx8QI) -DEF_RVV_TYPE (vuint8m2_t, 15, __rvv_uint8m2_t, unsigned_intQI, VNx16QI, VNx8QI) +DEF_RVV_TYPE (vint8m2_t, 14, __rvv_int8m2_t, intQI, VNx16QI, VNx8QI, _i8m2, _i8, + _e8m2) +DEF_RVV_TYPE (vuint8m2_t, 15, __rvv_uint8m2_t, unsigned_intQI, VNx16QI, VNx8QI, + _u8m2, _u8, _e8m2) /* LMUL = 4: Machine mode = VNx32QImode when TARGET_MIN_VLEN > 32. Machine mode = VNx16QImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint8m4_t, 14, __rvv_int8m4_t, intQI, VNx32QI, VNx16QI) -DEF_RVV_TYPE (vuint8m4_t, 15, __rvv_uint8m4_t, unsigned_intQI, VNx32QI, VNx16QI) +DEF_RVV_TYPE (vint8m4_t, 14, __rvv_int8m4_t, intQI, VNx32QI, VNx16QI, _i8m4, + _i8, _e8m4) +DEF_RVV_TYPE (vuint8m4_t, 15, __rvv_uint8m4_t, unsigned_intQI, VNx32QI, VNx16QI, + _u8m4, _u8, _e8m4) /* LMUL = 8: Machine mode = VNx64QImode when TARGET_MIN_VLEN > 32. Machine mode = VNx32QImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint8m8_t, 14, __rvv_int8m8_t, intQI, VNx64QI, VNx32QI) -DEF_RVV_TYPE (vuint8m8_t, 15, __rvv_uint8m8_t, unsigned_intQI, VNx64QI, VNx32QI) +DEF_RVV_TYPE (vint8m8_t, 14, __rvv_int8m8_t, intQI, VNx64QI, VNx32QI, _i8m8, + _i8, _e8m8) +DEF_RVV_TYPE (vuint8m8_t, 15, __rvv_uint8m8_t, unsigned_intQI, VNx64QI, VNx32QI, + _u8m8, _u8, _e8m8) /* LMUL = 1/4: Only enble when TARGET_MIN_VLEN > 32 and machine mode = VNx1HImode. */ -DEF_RVV_TYPE (vint16mf4_t, 16, __rvv_int16mf4_t, intHI, VNx1HI, VOID) -DEF_RVV_TYPE (vuint16mf4_t, 17, __rvv_uint16mf4_t, unsigned_intHI, VNx1HI, VOID) +DEF_RVV_TYPE (vint16mf4_t, 16, __rvv_int16mf4_t, intHI, VNx1HI, VOID, _i16mf4, + _i16, _e16mf4) +DEF_RVV_TYPE (vuint16mf4_t, 17, __rvv_uint16mf4_t, unsigned_intHI, VNx1HI, VOID, + _u16mf4, _u16, _e16mf4) /* LMUL = 1/2: Machine mode = VNx2HImode when TARGET_MIN_VLEN > 32. Machine mode = VNx1HImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint16mf2_t, 16, __rvv_int16mf2_t, intHI, VNx2HI, VNx1HI) +DEF_RVV_TYPE (vint16mf2_t, 16, __rvv_int16mf2_t, intHI, VNx2HI, VNx1HI, _i16mf2, + _i16, _e16mf2) DEF_RVV_TYPE (vuint16mf2_t, 17, __rvv_uint16mf2_t, unsigned_intHI, VNx2HI, - VNx1HI) + VNx1HI, _u16mf2, _u16, _e16mf2) /* LMUL = 1: Machine mode = VNx4HImode when TARGET_MIN_VLEN > 32. Machine mode = VNx2HImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint16m1_t, 15, __rvv_int16m1_t, intHI, VNx4HI, VNx2HI) -DEF_RVV_TYPE (vuint16m1_t, 16, __rvv_uint16m1_t, unsigned_intHI, VNx4HI, VNx2HI) +DEF_RVV_TYPE (vint16m1_t, 15, __rvv_int16m1_t, intHI, VNx4HI, VNx2HI, _i16m1, + _i16, _e16m1) +DEF_RVV_TYPE (vuint16m1_t, 16, __rvv_uint16m1_t, unsigned_intHI, VNx4HI, VNx2HI, + _u16m1, _u16, _e16m1) /* LMUL = 2: Machine mode = VNx8HImode when TARGET_MIN_VLEN > 32. Machine mode = VNx4HImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint16m2_t, 15, __rvv_int16m2_t, intHI, VNx8HI, VNx4HI) -DEF_RVV_TYPE (vuint16m2_t, 16, __rvv_uint16m2_t, unsigned_intHI, VNx8HI, VNx4HI) +DEF_RVV_TYPE (vint16m2_t, 15, __rvv_int16m2_t, intHI, VNx8HI, VNx4HI, _i16m2, + _i16, _e16m2) +DEF_RVV_TYPE (vuint16m2_t, 16, __rvv_uint16m2_t, unsigned_intHI, VNx8HI, VNx4HI, + _u16m2, _u16, _e16m2) /* LMUL = 4: Machine mode = VNx16HImode when TARGET_MIN_VLEN > 32. Machine mode = VNx8HImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint16m4_t, 15, __rvv_int16m4_t, intHI, VNx16HI, VNx8HI) +DEF_RVV_TYPE (vint16m4_t, 15, __rvv_int16m4_t, intHI, VNx16HI, VNx8HI, _i16m4, + _i16, _e16m4) DEF_RVV_TYPE (vuint16m4_t, 16, __rvv_uint16m4_t, unsigned_intHI, VNx16HI, - VNx8HI) + VNx8HI, _u16m4, _u16, _e16m4) /* LMUL = 8: Machine mode = VNx32HImode when TARGET_MIN_VLEN > 32. Machine mode = VNx16HImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint16m8_t, 15, __rvv_int16m8_t, intHI, VNx32HI, VNx16HI) +DEF_RVV_TYPE (vint16m8_t, 15, __rvv_int16m8_t, intHI, VNx32HI, VNx16HI, _i16m8, + _i16, _e16m8) DEF_RVV_TYPE (vuint16m8_t, 16, __rvv_uint16m8_t, unsigned_intHI, VNx32HI, - VNx16HI) + VNx16HI, _u16m8, _u16, _e16m8) /* LMUL = 1/2: Only enble when TARGET_MIN_VLEN > 32 and machine mode = VNx1SImode. */ -DEF_RVV_TYPE (vint32mf2_t, 16, __rvv_int32mf2_t, int32, VNx1SI, VOID) -DEF_RVV_TYPE (vuint32mf2_t, 17, __rvv_uint32mf2_t, unsigned_int32, VNx1SI, VOID) +DEF_RVV_TYPE (vint32mf2_t, 16, __rvv_int32mf2_t, int32, VNx1SI, VOID, _i32mf2, + _i32, _e32mf2) +DEF_RVV_TYPE (vuint32mf2_t, 17, __rvv_uint32mf2_t, unsigned_int32, VNx1SI, VOID, + _u32mf2, _u32, _e32mf2) /* LMUL = 1: Machine mode = VNx2SImode when TARGET_MIN_VLEN > 32. Machine mode = VNx1SImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint32m1_t, 15, __rvv_int32m1_t, int32, VNx2SI, VNx1SI) -DEF_RVV_TYPE (vuint32m1_t, 16, __rvv_uint32m1_t, unsigned_int32, VNx2SI, VNx1SI) +DEF_RVV_TYPE (vint32m1_t, 15, __rvv_int32m1_t, int32, VNx2SI, VNx1SI, _i32m1, + _i32, _e32m1) +DEF_RVV_TYPE (vuint32m1_t, 16, __rvv_uint32m1_t, unsigned_int32, VNx2SI, VNx1SI, + _u32m1, _u32, _e32m1) /* LMUL = 2: Machine mode = VNx4SImode when TARGET_MIN_VLEN > 32. Machine mode = VNx2SImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint32m2_t, 15, __rvv_int32m2_t, int32, VNx4SI, VNx2SI) -DEF_RVV_TYPE (vuint32m2_t, 16, __rvv_uint32m2_t, unsigned_int32, VNx4SI, VNx2SI) +DEF_RVV_TYPE (vint32m2_t, 15, __rvv_int32m2_t, int32, VNx4SI, VNx2SI, _i32m2, + _i32, _e32m2) +DEF_RVV_TYPE (vuint32m2_t, 16, __rvv_uint32m2_t, unsigned_int32, VNx4SI, VNx2SI, + _u32m2, _u32, _e32m2) /* LMUL = 4: Machine mode = VNx8SImode when TARGET_MIN_VLEN > 32. Machine mode = VNx4SImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint32m4_t, 15, __rvv_int32m4_t, int32, VNx8SI, VNx4SI) -DEF_RVV_TYPE (vuint32m4_t, 16, __rvv_uint32m4_t, unsigned_int32, VNx8SI, VNx4SI) +DEF_RVV_TYPE (vint32m4_t, 15, __rvv_int32m4_t, int32, VNx8SI, VNx4SI, _i32m4, + _i32, _e32m4) +DEF_RVV_TYPE (vuint32m4_t, 16, __rvv_uint32m4_t, unsigned_int32, VNx8SI, VNx4SI, + _u32m4, _u32, _e32m4) /* LMUL = 8: Machine mode = VNx16SImode when TARGET_MIN_VLEN > 32. Machine mode = VNx8SImode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vint32m8_t, 15, __rvv_int32m8_t, int32, VNx16SI, VNx8SI) +DEF_RVV_TYPE (vint32m8_t, 15, __rvv_int32m8_t, int32, VNx16SI, VNx8SI, _i32m8, + _i32, _e32m8) DEF_RVV_TYPE (vuint32m8_t, 16, __rvv_uint32m8_t, unsigned_int32, VNx16SI, - VNx8SI) + VNx8SI, _u32m8, _u32, _e32m8) /* SEW = 64: Disable when TARGET_MIN_VLEN > 32. */ -DEF_RVV_TYPE (vint64m1_t, 15, __rvv_int64m1_t, intDI, VNx1DI, VOID) -DEF_RVV_TYPE (vuint64m1_t, 16, __rvv_uint64m1_t, unsigned_intDI, VNx1DI, VOID) -DEF_RVV_TYPE (vint64m2_t, 15, __rvv_int64m2_t, intDI, VNx2DI, VOID) -DEF_RVV_TYPE (vuint64m2_t, 16, __rvv_uint64m2_t, unsigned_intDI, VNx2DI, VOID) -DEF_RVV_TYPE (vint64m4_t, 15, __rvv_int64m4_t, intDI, VNx4DI, VOID) -DEF_RVV_TYPE (vuint64m4_t, 16, __rvv_uint64m4_t, unsigned_intDI, VNx4DI, VOID) -DEF_RVV_TYPE (vint64m8_t, 15, __rvv_int64m8_t, intDI, VNx8DI, VOID) -DEF_RVV_TYPE (vuint64m8_t, 16, __rvv_uint64m8_t, unsigned_intDI, VNx8DI, VOID) +DEF_RVV_TYPE (vint64m1_t, 15, __rvv_int64m1_t, intDI, VNx1DI, VOID, _i64m1, + _i64, _e64m1) +DEF_RVV_TYPE (vuint64m1_t, 16, __rvv_uint64m1_t, unsigned_intDI, VNx1DI, VOID, + _u64m1, _u64, _e64m1) +DEF_RVV_TYPE (vint64m2_t, 15, __rvv_int64m2_t, intDI, VNx2DI, VOID, _i64m2, + _i64, _e64m2) +DEF_RVV_TYPE (vuint64m2_t, 16, __rvv_uint64m2_t, unsigned_intDI, VNx2DI, VOID, + _u64m2, _u64, _e64m2) +DEF_RVV_TYPE (vint64m4_t, 15, __rvv_int64m4_t, intDI, VNx4DI, VOID, _i64m4, + _i64, _e64m4) +DEF_RVV_TYPE (vuint64m4_t, 16, __rvv_uint64m4_t, unsigned_intDI, VNx4DI, VOID, + _u64m4, _u64, _e64m4) +DEF_RVV_TYPE (vint64m8_t, 15, __rvv_int64m8_t, intDI, VNx8DI, VOID, _i64m8, + _i64, _e64m8) +DEF_RVV_TYPE (vuint64m8_t, 16, __rvv_uint64m8_t, unsigned_intDI, VNx8DI, VOID, + _u64m8, _u64, _e64m8) /* LMUL = 1/2: Only enble when TARGET_MIN_VLEN > 32 and machine mode = VNx1SFmode. */ -DEF_RVV_TYPE (vfloat32mf2_t, 18, __rvv_float32mf2_t, float, VNx1SF, VOID) +DEF_RVV_TYPE (vfloat32mf2_t, 18, __rvv_float32mf2_t, float, VNx1SF, VOID, + _f32mf2, _f32, _e32mf2) /* LMUL = 1: Machine mode = VNx2SFmode when TARGET_MIN_VLEN > 32. Machine mode = VNx1SFmode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vfloat32m1_t, 17, __rvv_float32m1_t, float, VNx2SF, VNx1SF) +DEF_RVV_TYPE (vfloat32m1_t, 17, __rvv_float32m1_t, float, VNx2SF, VNx1SF, + _f32m1, _f32, _e32m1) /* LMUL = 2: Machine mode = VNx4SFmode when TARGET_MIN_VLEN > 32. Machine mode = VNx2SFmode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vfloat32m2_t, 17, __rvv_float32m2_t, float, VNx4SF, VNx2SF) +DEF_RVV_TYPE (vfloat32m2_t, 17, __rvv_float32m2_t, float, VNx4SF, VNx2SF, + _f32m2, _f32, _e32m2) /* LMUL = 4: Machine mode = VNx8SFmode when TARGET_MIN_VLEN > 32. Machine mode = VNx4SFmode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vfloat32m4_t, 17, __rvv_float32m4_t, float, VNx8SF, VNx4SF) +DEF_RVV_TYPE (vfloat32m4_t, 17, __rvv_float32m4_t, float, VNx8SF, VNx4SF, + _f32m4, _f32, _e32m4) /* LMUL = 8: Machine mode = VNx16SFmode when TARGET_MIN_VLEN > 32. Machine mode = VNx8SFmode when TARGET_MIN_VLEN = 32. */ -DEF_RVV_TYPE (vfloat32m8_t, 17, __rvv_float32m8_t, float, VNx16SF, VNx8SF) +DEF_RVV_TYPE (vfloat32m8_t, 17, __rvv_float32m8_t, float, VNx16SF, VNx8SF, + _f32m8, _f32, _e32m8) /* SEW = 64: Disable when TARGET_VECTOR_FP64. */ -DEF_RVV_TYPE (vfloat64m1_t, 17, __rvv_float64m1_t, double, VNx1DF, VOID) -DEF_RVV_TYPE (vfloat64m2_t, 17, __rvv_float64m2_t, double, VNx2DF, VOID) -DEF_RVV_TYPE (vfloat64m4_t, 17, __rvv_float64m4_t, double, VNx4DF, VOID) -DEF_RVV_TYPE (vfloat64m8_t, 17, __rvv_float64m8_t, double, VNx8DF, VOID) +DEF_RVV_TYPE (vfloat64m1_t, 17, __rvv_float64m1_t, double, VNx1DF, VOID, _f64m1, + _f64, _e64m1) +DEF_RVV_TYPE (vfloat64m2_t, 17, __rvv_float64m2_t, double, VNx2DF, VOID, _f64m2, + _f64, _e64m2) +DEF_RVV_TYPE (vfloat64m4_t, 17, __rvv_float64m4_t, double, VNx4DF, VOID, _f64m4, + _f64, _e64m4) +DEF_RVV_TYPE (vfloat64m8_t, 17, __rvv_float64m8_t, double, VNx8DF, VOID, _f64m8, + _f64, _e64m8) + +DEF_RVV_OP_TYPE (vv) +DEF_RVV_OP_TYPE (vx) +DEF_RVV_OP_TYPE (v) +DEF_RVV_OP_TYPE (wv) +DEF_RVV_OP_TYPE (wx) +DEF_RVV_OP_TYPE (x_x_v) +DEF_RVV_OP_TYPE (vf2) +DEF_RVV_OP_TYPE (vf4) +DEF_RVV_OP_TYPE (vf8) +DEF_RVV_OP_TYPE (vvm) +DEF_RVV_OP_TYPE (vxm) +DEF_RVV_OP_TYPE (x_x_w) +DEF_RVV_OP_TYPE (v_v) +DEF_RVV_OP_TYPE (v_x) +DEF_RVV_OP_TYPE (vs) +DEF_RVV_OP_TYPE (mm) +DEF_RVV_OP_TYPE (m) +DEF_RVV_OP_TYPE (vf) +DEF_RVV_OP_TYPE (vm) +DEF_RVV_OP_TYPE (wf) +DEF_RVV_OP_TYPE (vfm) +DEF_RVV_OP_TYPE (v_f) + +DEF_RVV_PRED_TYPE (ta) +DEF_RVV_PRED_TYPE (tu) +DEF_RVV_PRED_TYPE (ma) +DEF_RVV_PRED_TYPE (mu) +DEF_RVV_PRED_TYPE (tama) +DEF_RVV_PRED_TYPE (tamu) +DEF_RVV_PRED_TYPE (tuma) +DEF_RVV_PRED_TYPE (tumu) +DEF_RVV_PRED_TYPE (m) +DEF_RVV_PRED_TYPE (tam) +DEF_RVV_PRED_TYPE (tum) +#undef DEF_RVV_PRED_TYPE +#undef DEF_RVV_OP_TYPE #undef DEF_RVV_TYPE diff --git a/gcc/config/riscv/riscv-vector-builtins.h b/gcc/config/riscv/riscv-vector-builtins.h index ea67da9..425da12 100644 --- a/gcc/config/riscv/riscv-vector-builtins.h +++ b/gcc/config/riscv/riscv-vector-builtins.h @@ -21,8 +21,101 @@ #ifndef GCC_RISCV_VECTOR_BUILTINS_H #define GCC_RISCV_VECTOR_BUILTINS_H +/* The full name of an RVV intrinsic function is the concatenation of: + + - the base name ("vadd", etc.) + - the operand suffix ("_vv", "_vx", etc.) + - the type suffix ("_i32m1", "_i32mf2", etc.) + - the predication suffix ("_tamu", "_tumu", etc.) + + Each piece of information is individually useful, so we retain this + classification throughout: + + - function_base represents the base name. + + - operand_type_index can be used as an index to get operand suffix. + + - rvv_op_info can be used as an index to get argument suffix. + + - predication_type_index can be used as an index to get predication suffix. + + In addition to its unique full name, a function may have a shorter + overloaded alias. This alias removes pieces of the suffixes that + can be inferred from the arguments, such as by shortening the mode + suffix or dropping some of the type suffixes. The base name and the + predication suffix stay the same. + + - The function_instance class describes contains all properties of each + individual function. Such these information will be used by + function_builder, function_base, function_shape, gimple_folder, + function_expander, etc. + + - The function_builder class provides several helper function to add an + intrinsic function. + + - The function_shape class describes how that instruction has been presented + at the language level: + + 1. Determine the function name for C and C++ overload function which can + be recognized by compiler at language level for each instruction + according to members of function_instance (base name, operand suffix, + type suffix, predication suffix, etc.). + + 2. Specify the arguments type and return type of each function to + describe how that instruction has presented at language level. + + - The function_base describes how the underlying instruction behaves. + + The static list of functions uses function_group to describe a group + of related functions. The function_builder class is responsible for + expanding this static description into a list of individual functions + and registering the associated built-in functions. function_instance + describes one of these individual functions in terms of the properties + described above. + + The classes involved in compiling a function call are: + + - function_resolver, which resolves an overloaded function call to a + specific function_instance and its associated function decl. + + - function_checker, which checks whether the values of the arguments + conform to the RVV ISA specification. + + - gimple_folder, which tries to fold a function call at the gimple level + + - function_expander, which expands a function call into rtl instructions + + function_resolver and function_checker operate at the language level + and so are associated with the function_shape. gimple_folder and + function_expander are concerned with the behavior of the function + and so are associated with the function_base. */ + namespace riscv_vector { +/* Flags that describe what a function might do, in addition to reading + its arguments and returning a result. */ +static const unsigned int CP_READ_FPCR = 1U << 0; +static const unsigned int CP_RAISE_FP_EXCEPTIONS = 1U << 1; +static const unsigned int CP_READ_MEMORY = 1U << 2; +static const unsigned int CP_WRITE_MEMORY = 1U << 3; +static const unsigned int CP_READ_CSR = 1U << 4; +static const unsigned int CP_WRITE_CSR = 1U << 5; + +/* Bit values used to identify required extensions for RVV intrinsics. */ +#define RVV_REQUIRE_RV64BIT (1 << 0) /* Require RV64. */ +#define RVV_REQUIRE_ZVE64 (1 << 1) /* Require TARGET_MIN_VLEN > 32. */ +#define RVV_REQUIRE_ELEN_FP_32 (1 << 2) /* Require FP ELEN >= 32. */ +#define RVV_REQUIRE_ELEN_FP_64 (1 << 3) /* Require FP ELEN >= 64. */ + +/* Enumerates the RVV operand types. */ +enum operand_type_index +{ + OP_TYPE_none, +#define DEF_RVV_OP_TYPE(NAME) OP_TYPE_##NAME, +#include "riscv-vector-builtins.def" + NUM_OP_TYPES +}; + /* Enumerates the RVV types, together called "vector types" for brevity. */ enum vector_type_index @@ -32,6 +125,31 @@ enum vector_type_index NUM_VECTOR_TYPES }; +/* Enumerates the RVV governing predication types. */ +enum predication_type_index +{ + PRED_TYPE_none, +#define DEF_RVV_PRED_TYPE(NAME) PRED_TYPE_##NAME, +#include "riscv-vector-builtins.def" + NUM_PRED_TYPES +}; + +/* Enumerates the RVV base types. */ +enum rvv_base_type +{ + RVV_BASE_vector, + RVV_BASE_scalar, + RVV_BASE_vector_ptr, + RVV_BASE_scalar_ptr, + RVV_BASE_scalar_const_ptr, + RVV_BASE_void, + RVV_BASE_size, + RVV_BASE_ptrdiff, + RVV_BASE_unsigned_long, + RVV_BASE_long, + NUM_BASE_TYPES +}; + /* Builtin types that are used to register RVV intrinsics. */ struct GTY (()) rvv_builtin_types_t { @@ -42,6 +160,251 @@ struct GTY (()) rvv_builtin_types_t tree scalar_const_ptr; }; +/* Builtin suffix that are used to register RVV intrinsics. */ +struct rvv_builtin_suffixes +{ + const char *vector; + const char *scalar; + const char *vsetvl; +}; + +/* RVV Builtin argument information. */ +struct rvv_arg_type_info +{ + CONSTEXPR rvv_arg_type_info (rvv_base_type base_type_in) + : base_type (base_type_in) + {} + enum rvv_base_type base_type; + + tree get_tree_type (vector_type_index) const; +}; + +/* Static information for each operand. */ +struct rvv_type_info +{ + enum vector_type_index index; + uint64_t required_extensions; +}; + +/* RVV Builtin operands information. */ +struct rvv_op_info +{ + const rvv_type_info *types; + const operand_type_index op; + rvv_arg_type_info ret; + const rvv_arg_type_info *args; +}; + +class registered_function; +class function_base; +class function_shape; + +/* Static information about a set of functions. */ +struct function_group_info +{ + /* The base name, as a string. */ + const char *base_name; + + /* Describes the behavior associated with the function base name. */ + const function_base *const *base; + + /* The shape of the functions, as described above the class definition. + It's possible to have entries with the same base name but different + shapes. */ + const function_shape *const *shape; + + /* A list of the available operand types, predication types, + and of the available operand datatype. + The function supports every combination of the two. + The list of predication is terminated by two NUM_PRED_TYPES, + while the list of operand info is terminated by NUM_BASE_TYPES. + The list of these type suffix is lexicographically ordered based + on the index value. */ + const predication_type_index *preds; + const rvv_op_info ops_infos; +}; + +class GTY ((user)) function_instance +{ +public: + function_instance (const char *, const function_base *, + const function_shape *, rvv_type_info, + predication_type_index, const rvv_op_info *); + + bool operator== (const function_instance &) const; + bool operator!= (const function_instance &) const; + hashval_t hash () const; + + unsigned int call_properties () const; + bool reads_global_state_p () const; + bool modifies_global_state_p () const; + bool could_trap_p () const; + + /* Return true if return type or arguments are floating point type. */ + bool any_type_float_p () const; + + tree get_return_type () const; + tree get_arg_type (unsigned opno) const; + + /* The properties of the function. (The explicit "enum"s are required + for gengtype.) */ + const char *base_name; + const function_base *base; + const function_shape *shape; + rvv_type_info type; + enum predication_type_index pred; + const rvv_op_info *op_info; +}; + +/* A class for building and registering function decls. */ +class function_builder +{ +public: + function_builder (); + ~function_builder (); + + void allocate_argument_types (const function_instance &, vec<tree> &) const; + void add_unique_function (const function_instance &, const function_shape *, + tree, vec<tree> &); + void register_function_group (const function_group_info &); + void append_name (const char *); + char *finish_name (); + +private: + tree get_attributes (const function_instance &); + + registered_function &add_function (const function_instance &, const char *, + tree, tree, bool); + + /* True if we should create a separate decl for each instance of an + overloaded function, instead of using function_builder. */ + bool m_direct_overloads; + + /* Used for building up function names. */ + obstack m_string_obstack; +}; + +/* A base class for handling calls to built-in functions. */ +class function_call_info : public function_instance +{ +public: + function_call_info (location_t, const function_instance &, tree); + + bool function_returns_void_p (); + + /* The location of the call. */ + location_t location; + + /* The FUNCTION_DECL that is being called. */ + tree fndecl; +}; + +/* Return true if the function has no return value. */ +inline bool +function_call_info::function_returns_void_p () +{ + return TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node; +} + +/* A class for expanding a function call into RTL. */ +class function_expander : public function_call_info +{ +public: + function_expander (const function_instance &, tree, tree, rtx); + rtx expand (); + + void add_input_operand (machine_mode, rtx); + void add_input_operand (unsigned argno); + rtx generate_insn (insn_code); + + /* The function call expression. */ + tree exp; + + /* For functions that return a value, this is the preferred location + of that value. It could be null or could have a different mode + from the function return type. */ + rtx target; + + /* The number of the operands. */ + int opno; + +private: + /* Used to build up the operands to an instruction. */ + struct expand_operand m_ops[MAX_RECOG_OPERANDS]; +}; + +/* Provides information about a particular function base name, and handles + tasks related to the base name. */ +class function_base +{ +public: + /* Return a set of CP_* flags that describe what the function might do, + in addition to reading its arguments and returning a result. */ + virtual unsigned int call_properties (const function_instance &) const; + + /* Expand the given call into rtl. Return the result of the function, + or an arbitrary value if the function doesn't return a result. */ + virtual rtx expand (function_expander &) const = 0; +}; + +/* Classifies functions into "shapes" base on: + + - Base name of the intrinsic function. + + - Operand types list. + + - Argument type list. + + - Predication type list. */ +class function_shape +{ +public: + /* Shape the function name according to function_instance. */ + virtual char *get_name (function_builder &, const function_instance &, + bool) const + = 0; + + /* Define all functions associated with the given group. */ + virtual void build (function_builder &, const function_group_info &) const + = 0; +}; + +extern const char *const operand_suffixes[NUM_OP_TYPES]; +extern const rvv_builtin_suffixes type_suffixes[NUM_VECTOR_TYPES + 1]; +extern const char *const predication_suffixes[NUM_PRED_TYPES]; +extern rvv_builtin_types_t builtin_types[NUM_VECTOR_TYPES + 1]; + +inline bool +function_instance::operator!= (const function_instance &other) const +{ + return !operator== (other); +} + +/* Expand the call and return its lhs. */ +inline rtx +function_expander::expand () +{ + return base->expand (*this); +} + +/* Create op and add it into M_OPS and increase OPNO. */ +inline void +function_expander::add_input_operand (machine_mode mode, rtx op) +{ + create_input_operand (&m_ops[opno++], op, mode); +} + +/* Default implementation of function_base::call_properties, with conservatively + correct behavior for floating-point instructions. */ +inline unsigned int +function_base::call_properties (const function_instance &instance) const +{ + unsigned int flags = 0; + if (instance.any_type_float_p ()) + return flags | CP_READ_FPCR | CP_RAISE_FP_EXCEPTIONS; + return flags; +} + } // end namespace riscv_vector #endif diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index ad57b99..90a3904 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -4135,6 +4135,32 @@ riscv_print_operand (FILE *file, rtx op, int letter) switch (letter) { + case 'm': { + if (code == CONST_INT) + { + /* LMUL. Define the bitmap rule as follows: + | 4 | 3 2 1 0 | + | fractional_p | factor | + */ + bool fractional_p = (UINTVAL (op) >> 4) & 0x1; + unsigned int factor = UINTVAL (op) & 0xf; + asm_fprintf (file, "%s%d", fractional_p ? "mf" : "m", factor); + } + else + output_operand_lossage ("invalid vector constant"); + break; + } + case 'p': { + if (code == CONST_INT) + { + /* Tail && Mask policy. */ + bool agnostic_p = UINTVAL (op) & 0x1; + asm_fprintf (file, "%s", agnostic_p ? "a" : "u"); + } + else + output_operand_lossage ("invalid vector constant"); + break; + } case 'h': if (code == HIGH) op = XEXP (op, 0); diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 2d1cda2..9384ced 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -317,7 +317,7 @@ "unknown,branch,jump,call,load,fpload,store,fpstore, mtc,mfc,const,arith,logical,shift,slt,imul,idiv,move,fmove,fadd,fmul, fmadd,fdiv,fcmp,fcvt,fsqrt,multi,auipc,sfb_alu,nop,ghost,bitmanip,rotate, - rdvlenb,rdvl,vsetvl,vlde,vste,vldm,vstm,vlds,vsts, + atomic,rdvlenb,rdvl,vsetvl,vlde,vste,vldm,vstm,vlds,vsts, vldux,vldox,vstux,vstox,vldff,vldr,vstr, vialu,viwalu,vext,vicalu,vshift,vnshift,vicmp, vimul,vidiv,viwmul,vimuladd,viwmuladd,vimerge,vimov, @@ -2999,3 +2999,4 @@ (include "pic.md") (include "generic.md") (include "sifive-7.md") +(include "vector.md") diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 7deb290..449f275 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -62,7 +62,8 @@ UNSPEC_ATOMIC_STORE))] "TARGET_ATOMIC" "%F2amoswap.<amo>%A2 zero,%z1,%0" - [(set (attr "length") (const_int 8))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 8))]) (define_insn "atomic_<atomic_optab><mode>" [(set (match_operand:GPR 0 "memory_operand" "+A") @@ -73,7 +74,8 @@ UNSPEC_SYNC_OLD_OP))] "TARGET_ATOMIC" "%F2amo<insn>.<amo>%A2 zero,%z1,%0" - [(set (attr "length") (const_int 8))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 8))]) (define_insn "atomic_fetch_<atomic_optab><mode>" [(set (match_operand:GPR 0 "register_operand" "=&r") @@ -86,7 +88,8 @@ UNSPEC_SYNC_OLD_OP))] "TARGET_ATOMIC" "%F3amo<insn>.<amo>%A3 %0,%z2,%1" - [(set (attr "length") (const_int 8))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 8))]) (define_insn "atomic_exchange<mode>" [(set (match_operand:GPR 0 "register_operand" "=&r") @@ -98,7 +101,8 @@ (match_operand:GPR 2 "register_operand" "0"))] "TARGET_ATOMIC" "%F3amoswap.<amo>%A3 %0,%z2,%1" - [(set (attr "length") (const_int 8))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 8))]) (define_insn "atomic_cas_value_strong<mode>" [(set (match_operand:GPR 0 "register_operand" "=&r") @@ -112,7 +116,8 @@ (clobber (match_scratch:GPR 6 "=&r"))] "TARGET_ATOMIC" "%F5 1: lr.<amo>%A5 %0,%1; bne %0,%z2,1f; sc.<amo>%A4 %6,%z3,%1; bnez %6,1b; 1:" - [(set (attr "length") (const_int 20))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 20))]) (define_expand "atomic_compare_and_swap<mode>" [(match_operand:SI 0 "register_operand" "") ;; bool output diff --git a/gcc/config/riscv/t-riscv b/gcc/config/riscv/t-riscv index 15b9e7c..8f67676 100644 --- a/gcc/config/riscv/t-riscv +++ b/gcc/config/riscv/t-riscv @@ -11,10 +11,36 @@ riscv-vector-builtins.o: $(srcdir)/config/riscv/riscv-vector-builtins.cc \ $(FUNCTION_H) fold-const.h gimplify.h explow.h stor-layout.h $(REGS_H) \ alias.h langhooks.h attribs.h stringpool.h \ $(srcdir)/config/riscv/riscv-vector-builtins.h \ - $(srcdir)/config/riscv/riscv-vector-builtins.def + $(srcdir)/config/riscv/riscv-vector-builtins-shapes.h \ + $(srcdir)/config/riscv/riscv-vector-builtins-bases.h \ + $(srcdir)/config/riscv/riscv-vector-builtins.def \ + $(srcdir)/config/riscv/riscv-vector-builtins-types.def \ + $(srcdir)/config/riscv/riscv-vector-builtins-functions.def $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ $(srcdir)/config/riscv/riscv-vector-builtins.cc +riscv-vector-builtins-shapes.o: \ + $(srcdir)/config/riscv/riscv-vector-builtins-shapes.cc \ + $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \ + $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) \ + $(srcdir)/config/riscv/riscv-vector-builtins.h \ + $(srcdir)/config/riscv/riscv-vector-builtins-shapes.h + $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ + $(srcdir)/config/riscv/riscv-vector-builtins-shapes.cc + +riscv-vector-builtins-bases.o: \ + $(srcdir)/config/riscv/riscv-vector-builtins-bases.cc \ + $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \ + $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H) \ + $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) fold-const.h $(GIMPLE_H) \ + gimple-iterator.h gimplify.h explow.h $(EMIT_RTL_H) tree-vector-builder.h \ + rtx-vector-builder.h \ + $(srcdir)/config/riscv/riscv-vector-builtins.h \ + $(srcdir)/config/riscv/riscv-vector-builtins-shapes.h \ + $(srcdir)/config/riscv/riscv-vector-builtins-bases.h + $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ + $(srcdir)/config/riscv/riscv-vector-builtins-bases.cc + riscv-sr.o: $(srcdir)/config/riscv/riscv-sr.cc $(CONFIG_H) \ $(SYSTEM_H) $(TM_H) $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md new file mode 100644 index 0000000..82ce902 --- /dev/null +++ b/gcc/config/riscv/vector.md @@ -0,0 +1,72 @@ +;; Machine description for RISC-V 'V' Extension for GNU compiler. +;; Copyright (C) 2022-2022 Free Software Foundation, Inc. +;; Contributed by Juzhe Zhong (juzhe.zhong@rivai.ai), RiVAI Technologies Ltd. + +;; This file is part of GCC. + +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. + +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; <http://www.gnu.org/licenses/>. + +;; This file describes the RISC-V 'V' Extension, Version 1.0. +;; +;; This file include : +;; +;; - Intrinsics (https://github.com/riscv/rvv-intrinsic-doc) +;; - Auto-vectorization (TBD) +;; - Combine optimization (TBD) + +(define_c_enum "unspec" [ + UNSPEC_VSETVL +]) + +;; ----------------------------------------------------------------- +;; ---- 6. Configuration-Setting Instructions +;; ----------------------------------------------------------------- +;; Includes: +;; - 6.1 vsetvli/vsetivl/vsetvl instructions +;; ----------------------------------------------------------------- + +;; we dont't define vsetvli as unspec_volatile which has side effects. +;; This instruction can be scheduled by the instruction scheduler. +;; This means these instructions will be deleted when +;; there is no instructions using vl or vtype in the following. +;; rd | rs1 | AVL value | Effect on vl +;; - | !x0 | x[rs1] | Normal stripmining +;; !x0 | x0 | ~0 | Set vl to VLMAX +;; operands[0]: VL. +;; operands[1]: AVL. +;; operands[2]: SEW +;; operands[3]: LMUL +;; operands[4]: Tail policy 0 or 1 (undisturbed/agnostic) +;; operands[5]: Mask policy 0 or 1 (undisturbed/agnostic) +(define_insn "@vsetvl<mode>" + [(set (match_operand:P 0 "register_operand" "=r,r") + (unspec:P [(match_operand:P 1 "csr_operand" "r,K") + (match_operand 2 "const_int_operand" "i,i") + (match_operand 3 "const_int_operand" "i,i") + (match_operand 4 "const_int_operand" "i,i") + (match_operand 5 "const_int_operand" "i,i")] UNSPEC_VSETVL)) + (set (reg:SI VL_REGNUM) + (unspec:SI [(match_dup 1) + (match_dup 2) + (match_dup 3)] UNSPEC_VSETVL)) + (set (reg:SI VTYPE_REGNUM) + (unspec:SI [(match_dup 2) + (match_dup 3) + (match_dup 4) + (match_dup 5)] UNSPEC_VSETVL))] + "TARGET_VECTOR" + "vset%i1vli\t%0,%1,e%2,%m3,t%p4,m%p5" + [(set_attr "type" "vsetvl") + (set_attr "mode" "<MODE>")]) diff --git a/gcc/configure b/gcc/configure index 99ba76522..c6def4c 100755 --- a/gcc/configure +++ b/gcc/configure @@ -3333,6 +3333,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu + ac_config_headers="$ac_config_headers auto-host.h:config.in" @@ -12900,7 +12901,7 @@ case ${enable_threads} in target_thread_file='single' ;; aix | dce | lynx | mipssde | posix | rtems | \ - single | tpf | vxworks | win32) + single | tpf | vxworks | win32 | mcf) target_thread_file=${enable_threads} ;; *) @@ -19713,7 +19714,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 19716 "configure" +#line 19717 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -19819,7 +19820,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 19822 "configure" +#line 19823 "configure" #include "confdefs.h" #if HAVE_DLFCN_H diff --git a/gcc/configure.ac b/gcc/configure.ac index e48fcbf..45bf756 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -25,6 +25,7 @@ AC_INIT AC_CONFIG_SRCDIR(tree.cc) +AC_CONFIG_MACRO_DIRS([../config] [..]) AC_CONFIG_HEADER(auto-host.h:config.in) gcc_version=`cat $srcdir/BASE-VER` @@ -1991,7 +1992,7 @@ case ${enable_threads} in target_thread_file='single' ;; aix | dce | lynx | mipssde | posix | rtems | \ - single | tpf | vxworks | win32) + single | tpf | vxworks | win32 | mcf) target_thread_file=${enable_threads} ;; *) diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 1fe2b1f..830324c 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,32 @@ +2022-10-20 Patrick Palka <ppalka@redhat.com> + + * pt.cc (lookup_and_finish_template_variable): Don't + instantiate if the template's scope is dependent. + (tsubst_copy) <case TEMPLATE_DECL>: Pass entering_scope=true + when substituting the class scope. + +2022-10-20 Patrick Palka <ppalka@redhat.com> + + PR c++/102963 + * module.cc (node_template_info): Handle CONCEPT_DECL. + +2022-10-20 Jonathan Wakely <jwakely@redhat.com> + Ulrich Drepper <drepper@redhat.com> + + * Make-lang.in: Add rules to generate std-name-hint.gperf. Adjust + rule to generate std-name-hint.h to allow chain rule. + * std-name-hint.h: Regenerated. + * std-name-hint.gperf: This file is now generated. + * cxxapi-data.csv: New file. CSV file with C++ API data. + * gen-cxxapi-file.py: New file. Generate std-name-hint.gperf + and module export source (in future). + +2022-10-19 Marek Polacek <polacek@redhat.com> + + PR c++/85043 + * typeck.cc (maybe_warn_about_useless_cast): Don't warn when + a glvalue is cast to a non-reference type. + 2022-10-18 Patrick Palka <ppalka@redhat.com> PR c++/105045 diff --git a/gcc/cp/Make-lang.in b/gcc/cp/Make-lang.in index aa84d68..291835d 100644 --- a/gcc/cp/Make-lang.in +++ b/gcc/cp/Make-lang.in @@ -153,15 +153,30 @@ endif gperf -o -C -E -k '1-6,$$' -j1 -D -N 'libc_name_p' -L C++ \ $(srcdir)/cp/cfns.gperf --output-file $(srcdir)/cp/cfns.h -# The same procedure for the std-name-hint.gperf file. +# We always need the dependency on the .gperf file because it itself is generated. ifeq ($(ENABLE_MAINTAINER_RULES), true) $(srcdir)/cp/std-name-hint.h: $(srcdir)/cp/std-name-hint.gperf else -$(srcdir)/cp/std-name-hint.h: +$(srcdir)/cp/std-name-hint.h: | $(srcdir)/cp/std-name-hint.gperf endif gperf -o -C -E -k '1,2,7,11,$$' -D -N find -L C++ \ $(srcdir)/cp/std-name-hint.gperf --output-file $(srcdir)/cp/std-name-hint.h +# The std-name-hint.gperf file itself is generated from a general +# C++ API description. +ifeq ($(ENABLE_MAINTAINER_RULES), true) +$(srcdir)/cp/std-name-hint.gperf: $(srcdir)/cp/gen-cxxapi-file.py $(srcdir)/cp/cxxapi-data.csv +else +$(srcdir)/cp/std-name-hint.gperf: +endif + python3 $(srcdir)/cp/gen-cxxapi-file.py hints $(srcdir)/cp/cxxapi-data.csv > $@ +ifneq ($(ENABLE_MAINTAINER_RULES), true) +.SECONDARY: $(srcdir)/cp/std-name-hint.gperf +endif + +# This is the file that depends on the generated header file. +cp/name-lookup.o: $(srcdir)/cp/std-name-hint.h + cc1plus.fda: ../stage1-gcc/cc1plus$(exeext) ../prev-gcc/$(PERF_DATA) $(CREATE_GCOV) -binary ../stage1-gcc/cc1plus$(exeext) -gcov cc1plus.fda -profile ../prev-gcc/$(PERF_DATA) -gcov_version 1 diff --git a/gcc/cp/cxxapi-data.csv b/gcc/cp/cxxapi-data.csv new file mode 100644 index 0000000..159daa2 --- /dev/null +++ b/gcc/cp/cxxapi-data.csv @@ -0,0 +1,1032 @@ +# C++ API data. +# +# Copyright (C) 2022 Free Software Foundation +# This file is part of GCC. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. +# +# This file can be processed with gen-cxxapi-file.py to create the +# export list for the standard C++ library module and the tables for +# suggesting actions on missing symbols in the std:: namespace. +# +# The generated code is integral part of the C++ frontend but the +# content of this file is consists of information solely in the +# domain of the libstdc++ maintainers. Therefore ownership of +# this file is shared between these two groups. +# +# The format of this file must match what the gen-cxxapi-file.py +# script expects. +# column value +# 1 header file, including angle brackets +# 2 symbol name without std:: prefix +# 3 nonzero if to be exported +# 4 "no" if not to be added to the hint table else the appropriate +# enum cxx_dialect value +# 5 optional, a string used after #if in a line inserted first to +# enable conditional definitions +# +<algorithm>,ranges::in_fun_result,1,no +<algorithm>,ranges::in_in_result,1,no +<algorithm>,ranges::in_out_result,1,no +<algorithm>,ranges::in_in_out_result,1,no +<algorithm>,ranges::in_out_out_result,1,no +<algorithm>,ranges::min_max_result,1,no +<algorithm>,ranges::in_found_result,1,no +# unimplemented <algorithm>,ranges::out_value_result,1,no +<algorithm>,all_of,1,no +# c++/106851 <algorithm>,ranges::all_of,1,no +<algorithm>,any_of,1,no +# c++/106851 <algorithm>,ranges::any_of,1,no +<algorithm>,none_of,1,no +# c++/106851 <algorithm>,ranges::none_of,1,no +<algorithm>,for_each,1,no +<algorithm>,ranges::for_each_result,1,no +# c++/106851 <algorithm>,ranges::for_each,1,no +<algorithm>,for_each_n,1,no +<algorithm>,ranges::for_each_n_result,1,no +# c++/106851 <algorithm>,ranges::for_each_n,1,no +<algorithm>,find,1,no +<algorithm>,find_if,1,no +<algorithm>,find_if_not,1,no +# c++/106851 <algorithm>,ranges::find,1,no +# c++/106851 <algorithm>,ranges::find_if,1,no +# c++/106851 <algorithm>,ranges::find_if_not,1,no +<algorithm>,find_end,1,no +# c++/106851 <algorithm>,ranges::find_end,1,no +<algorithm>,find_first_of,1,no +# c++/106851 <algorithm>,ranges::find_first_of,1,no +<algorithm>,adjacent_find,1,no +# c++/106851 <algorithm>,ranges::adjacent_find,1,no +<algorithm>,count,1,no +<algorithm>,count_if,1,no +# c++/106851 <algorithm>,ranges::count,1,no +# c++/106851 <algorithm>,ranges::count_if,1,no +<algorithm>,mismatch,1,no +<algorithm>,ranges::mismatch_result,1,no +# c++/106851 <algorithm>,ranges::mismatch,1,no +<algorithm>,equal,1,no +# c++/106851 <algorithm>,ranges::equal,1,no +<algorithm>,is_permutation,1,no +# c++/106851 <algorithm>,ranges::is_permutation,1,no +<algorithm>,search,1,no +# c++/106851 <algorithm>,ranges::search,1,no +<algorithm>,search_n,1,no +# c++/106851 <algorithm>,ranges::search_n,1,no +# unimplemented <algorithm>,ranges::starts_with,1,no +# unimplemented <algorithm>,ranges::ends_with,1,no +<algorithm>,copy,1,no +<algorithm>,ranges::copy_result,1,no +# c++/106851 <algorithm>,ranges::copy,1,no +<algorithm>,copy_n,1,no +<algorithm>,ranges::copy_n_result,1,no +# c++/106851 <algorithm>,ranges::copy_n,1,no +<algorithm>,copy_if,1,no +<algorithm>,ranges::copy_if_result,1,no +# c++/106851 <algorithm>,ranges::copy_if,1,no +<algorithm>,copy_backward,1,no +<algorithm>,ranges::copy_backward_result,1,no +# c++/106851 <algorithm>,ranges::copy_backward,1,no +<algorithm>,move,1,no +<algorithm>,ranges::move_result,1,no +# c++/106851 <algorithm>,ranges::move,1,no +<algorithm>,move_backward,1,no +<algorithm>,ranges::move_backward_result,1,no +# c++/106851 <algorithm>,ranges::move_backward,1,no +# <algorithm> TODO the rest +<any>,bad_any_cast,1,no +<any>,any,1,cxx17 +<any>,swap,1,no +<any>,make_any,1,cxx17 +<any>,any_cast,1,cxx17 +<array>,array,1,cxx11 +<array>,operator==,1,no +<array>,operator<=>,1,no +<array>,swap,1,no +<array>,to_array,1,cxx20 +<array>,tuple_size,1,no +<array>,tuple_element,1,no +<array>,get,1,no +<atomic>,memory_order,1,no +<atomic>,kill_dependency,1,no +<atomic>,atomic_ref,1,cxx20 +<atomic>,atomic,1,cxx11 +<atomic>,atomic_is_lock_free,1,no +<atomic>,atomic_store,1,no +<atomic>,atomic_store_explicit,1,no +<atomic>,atomic_load,1,no +<atomic>,atomic_load_explicit,1,no +<atomic>,atomic_exchange,1,no +<atomic>,atomic_exchange_explicit,1,no +<atomic>,atomic_compare_exchange_weak,1,no +<atomic>,atomic_compare_exchange_strong,1,no +<atomic>,atomic_compare_exchange_weak_explicit,1,no +<atomic>,atomic_compare_exchange_strong_explicit,1,no +<atomic>,atomic_fetch_add,1,no +<atomic>,atomic_fetch_add_explicit,1,no +<atomic>,atomic_fetch_sub,1,no +<atomic>,atomic_fetch_sub_explicit,1,no +<atomic>,atomic_fetch_and,1,no +<atomic>,atomic_fetch_and_explicit,1,no +<atomic>,atomic_fetch_or,1,no +<atomic>,atomic_fetch_or_explicit,1,no +<atomic>,atomic_fetch_xor,1,no +<atomic>,atomic_fetch_xor_explicit,1,no +<atomic>,atomic_wait,1,no +<atomic>,atomic_wait_explicit,1,no +<atomic>,atomic_notify_one,1,no +<atomic>,atomic_notify_all,1,no +<atomic>,atomic_notify_all,1,no +<atomic>,atomic_bool,1,no +<atomic>,atomic_char,1,no +<atomic>,atomic_schar,1,no +<atomic>,atomic_uchar,1,no +<atomic>,atomic_short,1,no +<atomic>,atomic_ushort,1,no +<atomic>,atomic_int,1,no +<atomic>,atomic_uint,1,no +<atomic>,atomic_long,1,no +<atomic>,atomic_ulong,1,no +<atomic>,atomic_llong,1,no +<atomic>,atomic_ullong,1,no +<atomic>,atomic_char8_t,1,no +<atomic>,atomic_char16_t,1,no +<atomic>,atomic_char32_t,1,no +<atomic>,atomic_wchar_t,1,no +<atomic>,atomic_int8_t,1,no +<atomic>,atomic_uint8_t,1,no +<atomic>,atomic_int16_t,1,no +<atomic>,atomic_uint16_t,1,no +<atomic>,atomic_int32_t,1,no +<atomic>,atomic_uint32_t,1,no +<atomic>,atomic_int64_t,1,no +<atomic>,atomic_uint64_t,1,no +<atomic>,atomic_int_least8_t,1,no +<atomic>,atomic_uint_least8_t,1,no +<atomic>,atomic_int_least16_t,1,no +<atomic>,atomic_uint_least16_t,1,no +<atomic>,atomic_int_least32_t,1,no +<atomic>,atomic_uint_least32_t,1,no +<atomic>,atomic_int_least64_t,1,no +<atomic>,atomic_uint_least64_t,1,no +<atomic>,atomic_int_fast8_t,1,no +<atomic>,atomic_uint_fast8_t,1,no +<atomic>,atomic_int_fast16_t,1,no +<atomic>,atomic_uint_fast16_t,1,no +<atomic>,atomic_int_fast32_t,1,no +<atomic>,atomic_uint_fast32_t,1,no +<atomic>,atomic_int_fast64_t,1,no +<atomic>,atomic_uint_fast64_t,1,no +<atomic>,atomic_intptr_t,1,no +<atomic>,atomic_uintptr_t,1,no +<atomic>,atomic_size_t,1,no +<atomic>,atomic_ptrdiff_t,1,no +<atomic>,atomic_intmax_t,1,no +<atomic>,atomic_uintmax_t,1,no +<atomic>,atomic_uintmax_t,1,cxx20 +<atomic>,atomic_signed_lock_free,1,cxx11,__cpp_lib_atomic_lock_free_type_aliases +<atomic>,atomic_unsigned_lock_free,1,cxx11,__cpp_lib_atomic_lock_free_type_aliases +# libstdc++/103934 <atomic>,atomic_flag_test,1,no +# libstdc++/103934 <atomic>,atomic_flag_test_explicit,1,no +<atomic>,atomic_flag_test_and_set,1,no +<atomic>,atomic_flag_test_and_set_explicit,1,no +<atomic>,atomic_flag_clear,1,no +<atomic>,atomic_flag_clear_explicit,1,no +# libstdc++/103934 <atomic>,atomic_flag_wait,1,no +# libstdc++/103934 <atomic>,atomic_flag_wait_explicit,1,no +# libstdc++/103934 <atomic>,atomic_flag_notify_one,1,no +# libstdc++/103934 <atomic>,atomic_flag_notify_all,1,no +<atomic>,atomic_thread_fence,1,no +<atomic>,atomic_signal_fence,1,no +<barrier>,barrier,1,no +<bit>,bit_cast,1,no +<bit>,byteswap,1,no +<bit>,has_single_bit,1,no +<bit>,bit_ceil,1,no +<bit>,bit_floor,1,no +<bit>,bit_width,1,no +<bit>,rotl,1,no +<bit>,rotr,1,no +<bit>,countl_zero,1,no +<bit>,countl_one,1,no +<bit>,countr_zero,1,no +<bit>,countr_one,1,no +<bit>,popcount,1,no +<bit>,endian,1,no +<bit>,endian::little,1,no +<bit>,endian::big,1,no +<bit>,endian::native,1,no +<bitset>,bitset,1,cxx11 +<bitset>,operator&,1,no +<bitset>,operator|,1,no +<bitset>,operator^,1,no +<bitset>,operator>>,1,no +<bitset>,operator<<,1,no +<charconv>,chars_format,1,no +<charconv>,to_chars_result,1,no +<charconv>,to_chars,1,no +<charconv>,from_chars_result,1,no +<charconv>,from_chars,1,no +# <chrono> TODO +# <codecvt> TODO +<compare>,weak_equality,1,cxx20 +<compare>,strong_equality,1,cxx20 +<compare>,partial_ordering,1,cxx20 +<compare>,weak_ordering,1,cxx20 +<compare>,strong_ordering,1,cxx20 +# <compare> TODO the rest +<complex>,complex,1,cxx98 +<complex>,complex_literals,0,cxx14 +# <complex> TODO the rest +# <concepts> TODO +<condition_variable>,condition_variable,1,cxx11 +<condition_variable>,condition_variable_any,1,cxx11 +<condition_variable>,notify_all_at_thread_exit,1,no +<condition_variable>,cv_status,1,no +<condition_variable>,cv_status::no_timeout,1,no +<condition_variable>,cv_status::timeout,1,no +<coroutine>,coroutine_traits,1,no +<coroutine>,coroutine_handle,1,no +<coroutine>,operator==,1,no +<coroutine>,operator<=>,1,no +<coroutine>,hash,1,no +<coroutine>,noop_coroutine_promise,1,no +<coroutine>,noop_coroutine_handle,1,no +<coroutine>,noop_coroutine,1,no +<coroutine>,suspend_never,1,no +<coroutine>,suspend_always,1,no +<cstddef>,byte,0,cxx17 +<deque>,deque,1,cxx98 +<deque>,operator==,1,no +<deque>,operator<=>,1,no +<deque>,swap,1,no +<deque>,erase,1,no +<deque>,erase_if,1,no +# c++/106851 <deque>,pmr::deque,1,no +# <exception> TODO +<exception>,exception,1,cxx98 +<exception>,bad_exception,1,no +<exception>,nested_exception,1,no +<exception>,terminate_handler,1,no +<exception>,get_terminate,1,no +<exception>,set_terminate,1,no +<exception>,terminate,1,cxx98 +<exception>,uncaught_exceptions,1,cxx17 +<exception>,exception_ptr,1,cxx11 +<exception>,current_exception,1,cxx11 +<exception>,rethrow_exception,1,no +<exception>,make_exception_ptr,1,cxx11 +<exception>,throw_with_nested,1,no +<exception>,rethrow_if_nested,1,no +<expected>,unexpected,1,no +<expected>,bad_expected_access,1,no +<expected>,unexpect_t,1,no +<expected>,unexpect,1,no +<expected>,expected,1,cxx23 +# <filesystem> TODO +# <flat_map>,flat_map,1,no +# <flat_map>,flat_multimap,1,no +# <flat_map>,sorted_unique_t,1,no +# <flat_map>,sorted_unique,1,no +# <flat_map>,sorted_equivalent_t,1,no +# <flat_map>,sorted_equivalent,1,no +# <flat_map>,erase_if,1,no +# <flat_map>,uses_allocator,1,no +# <flat_set>,flat_set,1,no +# <flat_set>,flat_multiset,1,no +# <flat_set>,sorted_unique_t,1,no +# <flat_set>,sorted_unique,1,no +# <flat_set>,sorted_equivalent_t,1,no +# <flat_set>,sorted_equivalent,1,no +# <flat_set>,erase_if,1,no +# <flat_set>,uses_allocator,1,no +<forward_list>,forward_list,1,cxx11 +<forward_list>,operator==,1,no +<forward_list>,operator<=>,1,no +<forward_list>,swap,1,no +<forward_list>,erase,1,no +<forward_list>,erase_if,1,no +# c++/106851 <forward_list>,pmr::forward_list,1,no +<fstream>,basic_filebuf,1,no +<fstream>,swap,1,no +<fstream>,basic_filebuf,0,cxx98 +<fstream>,filebuf,1,no +<fstream>,wfilebuf,1,no +<fstream>,basic_ifstream,1,cxx98 +<fstream>,ifstream,1,no +<fstream>,wifstream,1,no +<fstream>,basic_ofstream,1,cxx98 +<fstream>,ofstream,1,cxx98 +<fstream>,wofstream,1,no +<fstream>,basic_fstream,1,cxx98 +<fstream>,fstream,1,cxx98 +<fstream>,ifstream,1,cxx98 +<functional>,bind,1,cxx11 +<functional>,bind_front,1,cxx20 +<functional>,function,1,cxx11 +<functional>,hash,0,cxx11 +<functional>,invoke,1,cxx17 +<functional>,invoke_r,1,cxx23 +<functional>,mem_fn,1,cxx11 +<functional>,not_fn,1,cxx17 +<functional>,reference_wrapper,1,cxx11 +<functional>,unwrap_reference,1,cxx20 +<functional>,unwrap_reference_t,1,cxx20 +<functional>,unwrap_ref_decay,1,cxx20 +<functional>,unwrap_ref_decay_t,1,cxx20 +# <functional> TODO the rest +<future>,future_errc,1,no +<future>,launch,1,no +<future>,future_status,1,no +<future>,is_error_code_enum,1,no +<future>,make_error_code,1,no +<future>,make_error_condition,1,no +<future>,future_category,1,no +<future>,future_error,1,no +<future>,promise,1,cxx11 +<future>,swap,1,no +<future>,uses_allocator,1,no +<future>,future,1,cxx11 +<future>,shared_future,1,no +<future>,packaged_task,1,cxx11 +<future>,async,1,cxx11 +<initializer_list>,initializer_list,1,no +<initializer_list>,begin,1,no +<initializer_list>,end,1,no +<iomanip>,resetiosflags,1,cxx98 +<iomanip>,setiosflags,1,cxx98 +<iomanip>,setbase,1,cxx98 +<iomanip>,setfill,1,cxx98 +<iomanip>,setprecision,1,cxx98 +<iomanip>,setw,1,cxx98 +<iomanip>,get_money,1,cxx11 +<iomanip>,put_money,1,cxx11 +<iomanip>,get_time,1,cxx11 +<iomanip>,put_time,1,cxx11 +<iomanip>,quoted,1,cxx14 +<ios>,boolalpha,0,cxx98 +<ios>,noboolalpha,0,cxx98 +<ios>,showbase,0,cxx98 +<ios>,noshowbase,0,cxx98 +<ios>,showpoint,0,cxx98 +<ios>,noshowpoint,0,cxx98 +<ios>,showpos,0,cxx98 +<ios>,noshowpos,0,cxx98 +<ios>,skipws,0,cxx98 +<ios>,noskipws,0,cxx98 +<ios>,uppercase,0,cxx98 +<ios>,nouppercase,0,cxx98 +<ios>,unitbuf,0,cxx98 +<ios>,nounitbuf,0,cxx98 +<ios>,internal,0,cxx98 +<ios>,left,0,cxx98 +<ios>,right,0,cxx98 +<ios>,dec,0,cxx98 +<ios>,hex,0,cxx98 +<ios>,oct,0,cxx98 +<ios>,fixed,0,cxx98 +<ios>,scientific,0,cxx98 +<ios>,hexfloat,0,cxx11 +<ios>,defaultfloat,0,cxx11 +# <ios> TODO the rest +# <iosfwd> TODO ? +<iostream>,cin,1,cxx98 +<iostream>,cout,1,cxx98 +<iostream>,cerr,1,cxx98 +<iostream>,clog,1,cxx98 +<iostream>,wcin,1,cxx98 +<iostream>,wcout,1,cxx98 +<iostream>,wcerr,1,cxx98 +<iostream>,wclog,1,cxx98 +<istream>,basic_istream,1,no +<istream>,istream,1,cxx98 +<istream>,wistream,1,no +<istream>,basic_iostream,1,no +<istream>,iostream,1,no +<istream>,wiostream,1,no +<istream>,ws,1,cxx98 +<istream>,operator>>,1,no +<iterator>,advance,1,cxx98 +<iterator>,back_inserter,1,cxx98 +<iterator>,begin,1,cxx11 +<iterator>,distance,1,cxx98 +<iterator>,end,1,cxx11 +<iterator>,front_inserter,1,cxx98 +<iterator>,inserter,1,cxx98 +<iterator>,istream_iterator,1,cxx98 +<iterator>,istreambuf_iterator,1,cxx98 +<iterator>,iterator_traits,1,cxx98 +<iterator>,move_iterator,1,cxx11 +<iterator>,next,1,cxx11 +<iterator>,ostream_iterator,1,cxx98 +<iterator>,ostreambuf_iterator,1,cxx98 +<iterator>,prev,1,cxx11 +<iterator>,reverse_iterator,1,cxx98 +# <iterator> TODO the rest +<latch>,latch,1,no +<list>,list,1,cxx98 +<list>,operator==,1,no +<list>,operator<=>,1,no +<list>,swap,1,no +<list>,erase,1,no +<list>,erase_if,1,no +# c++/106851 <list>,pmr::list,1,no +# <locale> TODO +<map>,map,1,cxx98 +<map>,multimap,1,cxx98 +<map>,operator==,1,no +<map>,operator<=>,1,no +<map>,swap,1,no +<map>,erase,1,no +<map>,erase_if,1,no +# c++/106851 <map>,pmr::map,1,no +# c++/106851 <map>,pmr::multimap,1,no +# unimplemented <mdspan>,extents,1,no +# unimplemented <mdspan>,dextents,1,no +# unimplemented <mdspan>,layout_left,1,no +# unimplemented <mdspan>,layout_right,1,no +# unimplemented <mdspan>,layout_stride,1,no +# unimplemented <mdspan>,default_accessor,1,no +# unimplemented <mdspan>,mdspan,1,cxx23 +<memory>,pointer_traits,1,cxx11 +<memory>,to_address,1,cxx11 +<memory>,align,1,cxx11 +<memory>,assume_aligned,1,cxx20 +<memory>,allocator_arg_t,1,cxx11 +<memory>,allocator_arg,1,cxx11 +<memory>,uses_allocator,1,cxx11 +<memory>,uses_allocator_v,1,cxx17 +<memory>,uses_allocator_construction_args,1,cxx20 +<memory>,make_obj_using_allocator,1,cxx20 +<memory>,uninitialized_construct_using_allocator,1,cxx20 +<memory>,allocator_traits,1,cxx11 +<memory>,allocator,1,cxx98 +<memory>,operator==,1,no +<memory>,addressof,1,cxx11 +# TODO uninitialized memory algos +<memory>,construct_at,1,cxx20 +# c++/106851 <memory>,ranges::construct_at,1,cxx20 +<memory>,destroy_at,1,cxx20 +<memory>,destroy,1,cxx20 +<memory>,destroy_n,1,cxx20 +# c++/106851 <memory>,ranges::destroy_at,1,cxx20 +# c++/106851 <memory>,ranges::destroy,1,cxx20 +# c++/106851 <memory>,ranges::destroy_n,1,cxx20 +<memory>,default_delete,1,cxx11 +<memory>,unique_ptr,1,cxx11 +<memory>,make_unique,1,cxx14 +<memory>,make_unique_for_overwrite,1,cxx20 +<memory>,swap,1,no +<memory>,operator==,1,no +<memory>,operator<=>,1,no +<memory>,operator>,1,no +<memory>,operator<=,1,no +<memory>,operator>=,1,no +<memory>,operator<=>,1,no +<memory>,operator<<,1,no +<memory>,bad_weak_ptr,1,cxx11 +<memory>,shared_ptr,1,cxx11 +<memory>,make_shared,1,cxx11 +<memory>,allocate_shared,1,cxx11 +<memory>,make_shared_for_overwrite,1,cxx20 +<memory>,allocate_shared_for_overwrite,1,cxx20 +<memory>,get_deleter,1,cxx11 +<memory>,static_pointer_cast,1,cxx11 +<memory>,dynamic_pointer_cast,1,cxx11 +<memory>,const_pointer_cast,1,cxx11 +<memory>,reinterpret_pointer_cast,1,cxx17 +<memory>,weak_ptr,1,cxx11 +<memory>,owner_less,1,cxx11 +<memory>,enable_shared_from_this,1,cxx11 +<memory>,hash,1,no +<memory_resource>,pmr,0,cxx17 +<memory_resource>,pmr::memory_resource,1,cxx17 +<memory_resource>,pmr::operator==,1,no +<memory_resource>,pmr::polymorphic_allocator,1,cxx17 +<memory_resource>,pmr::new_delete_resource,1,cxx17 +<memory_resource>,pmr::set_default_resource,1,cxx17 +<memory_resource>,pmr::get_default_resource,1,cxx17 +<memory_resource>,pmr::pool_options,1,cxx17 +<memory_resource>,pmr::synchronized_pool_resource,1,cxx17 +<memory_resource>,pmr::unsynchronized_pool_resource,1,cxx17 +<memory_resource>,pmr::monotonic_buffer_resource,1,cxx17 +<mutex>,mutex,1,cxx11 +<mutex>,recursive_mutex,1,cxx11 +<mutex>,timed_mutex,1,cxx11 +<mutex>,recursive_timed_mutex,1,cxx11 +<mutex>,defer_lock_t,1,no +<mutex>,try_to_lock_t,1,no +<mutex>,adopt_lock_t,1,no +<mutex>,defer_lock,1,no +<mutex>,try_to_lock,1,no +<mutex>,adopt_lock,1,no +<mutex>,lock_guard,1,cxx11 +<mutex>,scoped_lock,1,cxx17 +<mutex>,unique_lock,1,cxx11 +<mutex>,swap,1,no +<mutex>,try_lock,1,cxx11 +<mutex>,lock,1,cxx11 +<mutex>,once_flag,1,cxx11 +<mutex>,call_once,1,cxx11 +<new>,bad_alloc,1,cxx98 +<new>,bad_array_new_length,1,no +<new>,destroying_delete_t,1,no +<new>,destroying_delete,1,no +<new>,align_val_t,1,no +<new>,nothrow_t,1,cxx98 +<new>,nothrow,1,cxx98 +<new>,new_handler,1,no +<new>,get_new_handler,1,no +<new>,set_new_handler,1,no +<new>,launder,1,cxx17 +<new>,hardware_destructive_interference_size,1,cxx17 +<new>,hardware_constructive_interference_size,1,cxx17 +<numbers>,numbers::e_v,1,cxx20 +<numbers>,numbers::log2e_v,1,cxx20 +<numbers>,numbers::log10e_v,1,cxx20 +<numbers>,numbers::pi_v,1,cxx20 +<numbers>,numbers::inv_pi_v,1,cxx20 +<numbers>,numbers::inv_sqrtpi_v,1,cxx20 +<numbers>,numbers::ln2_v,1,cxx20 +<numbers>,numbers::ln10_v,1,cxx20 +<numbers>,numbers::sqrt2_v,1,cxx20 +<numbers>,numbers::sqrt3_v,1,cxx20 +<numbers>,numbers::inv_sqrt3_v,1,cxx20 +<numbers>,numbers::egamma_v,1,cxx20 +<numbers>,numbers::phi_v,1,cxx20 +<optional>,optional,1,cxx17 +<optional>,nullopt_t,1,no +<optional>,nullopt,1,cxx17 +<optional>,bad_optional_access,1,no +<optional>,operator==,1,no +<optional>,operator!=,1,no +<optional>,operator<,1,no +<optional>,operator>,1,no +<optional>,operator<=,1,no +<optional>,operator>=,1,no +<optional>,operator<=>,1,no +<optional>,swap,1,no +<optional>,make_optional,1,cxx17 +<optional>,hash,1,no +<ostream>,basic_ostream,1,no +<ostream>,ostream,1,cxx98 +<ostream>,wostream,1,cxx98 +<ostream>,endl,1,cxx98 +<ostream>,ends,1,cxx98 +<ostream>,flush,1,cxx98 +<ostream>,emit_on_flush,1,cxx20 +<ostream>,noemit_on_flush,1,cxx20 +<ostream>,flush_emit,1,cxx20 +<ostream>,operator<<,1,no +# <numeric> TODO +<queue>,queue,1,cxx98 +<queue>,operator==,1,no +<queue>,operator!=,1,no +<queue>,operator<,1,no +<queue>,operator>,1,no +<queue>,operator<=,1,no +<queue>,operator>=,1,no +<queue>,operator<=>,1,no +<queue>,swap,1,no +<queue>,uses_allocator,1,no +<queue>,priority_queue,1,cxx98 +# <random> TODO +<ranges>,ranges::enable_view,1,cxx20 +<ranges>,ranges::enable_borrowed_range,1,cxx20 +# <ranges> TODO the rest +<ratio>,ratio,1,no +<ratio>,ratio_add,1,no +<ratio>,ratio_subtract,1,no +<ratio>,ratio_multiply,1,no +<ratio>,ratio_divide,1,no +<ratio>,ratio_equal,1,no +<ratio>,ratio_not_equal,1,no +<ratio>,ratio_less,1,no +<ratio>,ratio_less_equal,1,no +<ratio>,ratio_greater,1,no +<ratio>,ratio_greater_equal,1,no +<ratio>,ratio_equal_v,1,no +<ratio>,ratio_not_equal_v,1,no +<ratio>,ratio_less_v,1,no +<ratio>,ratio_less_equal_v,1,no +<ratio>,ratio_greater_v,1,no +<ratio>,ratio_greater_equal_v,1,no +<ratio>,yocto,1,no,__INTMAX_WIDTH__ > 80 +<ratio>,zepto,1,no,__INTMAX_WIDTH__ > 70 +<ratio>,atto,1,no +<ratio>,femto,1,no +<ratio>,pico,1,no +<ratio>,nano,1,no +<ratio>,micro,1,no +<ratio>,milli,1,no +<ratio>,centi,1,no +<ratio>,deci,1,no +<ratio>,deca,1,no +<ratio>,hecto,1,no +<ratio>,kilo,1,no +<ratio>,mega,1,no +<ratio>,giga,1,no +<ratio>,tera,1,no +<ratio>,peta,1,no +<ratio>,exa,1,no +<ratio>,zetta,1,no,__INTMAX_WIDTH__ > 70 +<ratio>,yotta,1,no,__INTMAX_WIDTH__ > 80 +# <regex> TODO +<scoped_allocator>,scoped_allocator_adaptor,1,cxx11 +<scoped_allocator>,operator==,1,no +<semaphore>,counting_semaphore,1,cxx20 +<semaphore>,binary_semaphore,1,cxx20 +<set>,set,1,cxx98 +<set>,multiset,1,cxx98 +<set>,operator==,1,no +<set>,operator<=>,1,no +<set>,swap,1,no +<set>,erase,1,no +<set>,erase_if,1,no +# c++/106851 <set>,pmr::set,1,no +# c++/106851 <set>,pmr::multiset,1,no +<shared_mutex>,shared_mutex,1,cxx17 +<shared_mutex>,shared_timed_mutex,1,cxx14 +<shared_mutex>,shared_lock,1,cxx14 +<shared_mutex>,swap,1,no +<source_location>,source_location,1,cxx20 +<span>,dynamic_extent,1,no +<span>,span,1,cxx20 +<span>,ranges::enable_view,1,no +<span>,ranges::enable_borrowed_range,1,no +<span>,as_bytes,1,no +<span>,as_writable_bytes,1,no +<spanstream>,basic_spanbuf,1,cxx23 +<spanstream>,swap,1,no +<spanstream>,spanbuf,1,cxx23 +<spanstream>,wspanbuf,1,cxx23 +<spanstream>,basic_ispanstream,1,cxx23 +<spanstream>,ispanstream,1,cxx23 +<spanstream>,wispanstream,1,cxx23 +<spanstream>,basic_ospanstream,1,cxx23 +<spanstream>,ospanstream,1,cxx23 +<spanstream>,wospanstream,1,cxx23 +<spanstream>,basic_spanstream,1,cxx23 +<spanstream>,spanstream,1,cxx23 +<spanstream>,ispanstream,1,cxx23 +<sstream>,basic_stringbuf,1,cxx98 +<sstream>,swap,1,no +<sstream>,stringbuf,1,cxx98 +<sstream>,wstringbuf,1,cxx98 +<sstream>,basic_istringstream,1,cxx98 +<sstream>,istringstream,1,cxx98 +<sstream>,wistringstream,1,cxx98 +<sstream>,basic_ostringstream,1,cxx98 +<sstream>,ostringstream,1,cxx98 +<sstream>,wostringstream,1,cxx98 +<sstream>,basic_stringstream,1,cxx98 +<sstream>,stringstream,1,cxx98 +<sstream>,istringstream,1,cxx98 +<stack>,stack,1,cxx98 +<stack>,operator==,1,no +<stack>,operator!=,1,no +<stack>,operator<,1,no +<stack>,operator>,1,no +<stack>,operator<=,1,no +<stack>,operator>=,1,no +<stack>,operator<=>,1,no +<stack>,swap,1,no +<stack>,uses_allocator,1,no +<stacktrace>,stacktrace_entry,1,no +<stacktrace>,basic_stacktrace,1,no +<stacktrace>,stacktrace,1,cxx23 +<stacktrace>,swap,1,no +<stacktrace>,to_string,1,no +<stacktrace>,operator<<,1,no +# c++/106851 <stacktrace>,pmr::stacktrace,1,no +<stacktrace>,hash,1,no +<stdexcept>,logic_error,1,cxx98 +<stdexcept>,domain_error,1,cxx98 +<stdexcept>,invalid_argument,1,cxx98 +<stdexcept>,length_error,1,cxx98 +<stdexcept>,out_of_range,1,cxx98 +<stdexcept>,runtime_error,1,cxx98 +<stdexcept>,range_error,1,cxx98 +<stdexcept>,overflow_error,1,cxx98 +<stdexcept>,underflow_error,1,cxx98 +<stop_token>,stop_token,1,cxx20 +<stop_token>,stop_source,1,cxx20 +<stop_token>,nostopstate_t,1,no +<stop_token>,nostopstate,1,no +<stop_token>,stop_callback,1,cxx20 +<streambuf>,basic_streambuf,1,cxx98 +<streambuf>,streambuf,1,cxx98 +<streambuf>,wstreambuf,1,cxx98 +<string>,char_traits,1,cxx98 +<string>,basic_string,1,cxx98 +<string>,operator+,1,no +<string>,operator==,1,no +<string>,operator<=>,1,no +<string>,swap,1,no +<string>,operator<<,1,no +<string>,operator>>,1,no +<string>,getline,1,no +<string>,erase,1,no +<string>,erase_if,1,no +<string>,string,1,cxx98 +<string>,wstring,1,cxx98 +<string>,u8string,1,cxx20 +<string>,u16string,1,cxx11 +<string>,u32string,1,cxx11 +<string>,stoi,1,cxx11 +<string>,stol,1,cxx11 +<string>,stoul,1,cxx11 +<string>,stoll,1,cxx11 +<string>,stoull,1,cxx11 +<string>,stof,1,cxx11 +<string>,stod,1,cxx11 +<string>,stold,1,cxx11 +<string>,to_string,1,cxx17 +<string>,to_wstring,1,cxx17 +# c++/106851 <string>,pmr::string,1,cxx17 +# c++/106851 <string>,pmr::wstring,1,cxx17 +# c++/106851 <string>,pmr::u8string,1,cxx20 +# c++/106851 <string>,pmr::u16string,1,cxx17 +# c++/106851 <string>,pmr::u32string,1,cxx17 +<string_view>,basic_string_view,1,cxx17 +<string_view>,ranges::enable_view,1,no +<string_view>,ranges::enable_borrowed_range,1,no +<string_view>,operator==,1,no +<string_view>,operator<=>,1,no +<string_view>,operator<<,1,no +<string_view>,string_view,1,cxx17 +<string_view>,hash,1,no +<string_view>,literals::string_literals::operator""sv,1,no +<system_error>,error_category,1,cxx11 +<system_error>,generic_category,1,cxx11 +<system_error>,system_category,1,cxx11 +<system_error>,error_code,1,cxx11 +<system_error>,error_condition,1,cxx11 +<system_error>,is_error_code_enum,1,cxx11 +<system_error>,is_error_condition_enum,1,cxx11 +<system_error>,errc,1,cxx11 +<system_error>,make_error_code,1,cxx11 +<system_error>,make_error_condition,1,cxx11 +<system_error>,operator==,1,no +<system_error>,operator<=>,1,no +<system_error>,hash,1,no +<system_error>,is_error_code_enum_v,1,cxx17 +<system_error>,is_error_condition_enum_v,1,cxx17 +<syncstream>,basic_syncbuf,1,no +<syncstream>,swap,1,no +<syncstream>,syncbuf,1,no +<syncstream>,wsyncbuf,1,no +<syncstream>,basic_osyncstream,1,no +<syncstream>,osyncstream,1,no +<syncstream>,wosyncstream,1,no +<thread>,thread,1,cxx11 +<thread>,swap,1,no +<thread>,jthread,1,cxx20 +<thread>,this_thread,0,cxx11 +<thread>,this_thread::get_id,1,no +<thread>,this_thread::yield,1,no +<thread>,this_thread::sleep_until,1,no +<thread>,this_thread::sleep_for,1,no +<tuple>,tuple,1,cxx11 +<tuple>,basic_common_reference,1,no +<tuple>,common_type,1,no +<tuple>,ignore,1,no +<tuple>,make_tuple,1,cxx11 +<tuple>,forward_as_tuple,1,cxx11 +<tuple>,tie,1,cxx11 +<tuple>,tuple_cat,1,cxx11 +<tuple>,apply,1,cxx17 +<tuple>,make_from_tuple,1,cxx17 +<tuple>,tuple_size,1,cxx11 +<tuple>,tuple_size_v,1,cxx17 +<tuple>,tuple_element,1,cxx11 +<tuple>,tuple_element_t,1,cxx14 +<tuple>,get,1,no +<tuple>,operator==,1,no +<tuple>,operator<=>,1,no +<tuple>,uses_allocator,1,no +<tuple>,swap,1,no +<typeindex>,type_index,1,cxx11 +<typeindex>,hash,1,no +<typeinfo>,type_info,1,no +<typeinfo>,bad_cast,1,cxx98 +<typeinfo>,bad_typeid,1,cxx98 +<type_traits>,enable_if,1,cxx11 +<type_traits>,enable_if_t,1,cxx14 +<type_traits>,invoke_result,1,cxx17 +<type_traits>,invoke_result_t,1,cxx17 +<type_traits>,remove_cvref,1,cxx20 +<type_traits>,remove_cvref_t,1,cxx20 +<type_traits>,type_identity,1,cxx20 +<type_traits>,type_identity_t,1,cxx20 +<type_traits>,void_t,1,cxx17 +<type_traits>,conjunction,1,cxx17 +<type_traits>,conjunction_v,1,cxx17 +<type_traits>,disjunction,1,cxx17 +<type_traits>,disjunction_v,1,cxx17 +<type_traits>,negation,1,cxx17 +<type_traits>,negation_v,1,cxx17 +<unordered_map>,unordered_map,1,cxx11 +<unordered_map>,unordered_multimap,1,cxx11 +<unordered_map>,operator==,1,no +<unordered_map>,operator<=>,1,no +<unordered_map>,swap,1,no +<unordered_map>,erase,1,no +<unordered_map>,erase_if,1,no +# c++/106851 <unordered_map>,pmr::unordered_map,1,cxx17 +# c++/106851 <unordered_map>,pmr::unordered_multimap,1,cxx17 +<unordered_set>,unordered_set,1,cxx11 +<unordered_set>,unordered_multiset,1,cxx11 +<unordered_set>,operator==,1,no +<unordered_set>,operator<=>,1,no +<unordered_set>,swap,1,no +<unordered_set>,erase,1,no +<unordered_set>,erase_if,1,no +# c++/106851 <unordered_set>,pmr::unordered_set,1,no +# c++/106851 <unordered_set>,pmr::unordered_multiset,1,no +<utility>,swap,1,no +<utility>,exchange,1,cxx14 +<utility>,forward,1,cxx11 +# unimplemented <utility>,forward_like,1,cxx23 +<utility>,move,1,cxx11 +<utility>,move_if_noexcept,1,cxx11 +<utility>,as_const,1,cxx17 +<utility>,declval,1,cxx11 +<utility>,cmp_equal,1,cxx20 +<utility>,cmp_not_equal,1,cxx20 +<utility>,cmp_less,1,cxx20 +<utility>,cmp_greater,1,cxx20 +<utility>,cmp_less_equal,1,cxx20 +<utility>,cmp_greater_equal,1,cxx20 +<utility>,in_range,1,cxx20 +<utility>,to_underlying,1,cxx23 +<utility>,unreachable,1,cxx23 +<utility>,integer_sequence,1,cxx14 +<utility>,index_sequence,1,cxx14 +<utility>,make_integer_sequence,1,cxx14 +<utility>,make_index_sequence,1,cxx14 +<utility>,index_sequence_for,1,cxx14 +<utility>,pair,1,cxx98 +<utility>,operator==,1,no +<utility>,operator<=>,1,no +<utility>,basic_common_reference,1,no +<utility>,common_type,1,no +<utility>,make_pair,1,cxx98 +<utility>,tuple_size,1,no +<utility>,tuple_element,1,no +<utility>,get,1,no +<utility>,piecewise_construct_t,1,cxx11 +<utility>,piecewise_construct,1,cxx11 +<utility>,in_place_t,1,cxx17 +<utility>,in_place,1,cxx17 +<utility>,in_place_type_t,1,cxx17 +<utility>,in_place_type,1,cxx17 +<utility>,in_place_index_t,1,cxx17 +<utility>,in_place_index,1,cxx17 +# <valarray> TODO +<variant>,variant,1,cxx17 +<variant>,variant_size,1,cxx17 +<variant>,variant_size_v,1,cxx17 +<variant>,variant_alternative,1,cxx17 +<variant>,variant_alternative_t,1,cxx17 +<variant>,variant_npos,1,cxx17 +<variant>,holds_alternative,1,cxx17 +<variant>,get,1,no +<variant>,get_if,1,no +<variant>,operator==,1,no +<variant>,operator!=,1,no +<variant>,operator<,1,no +<variant>,operator>,1,no +<variant>,operator<=,1,no +<variant>,operator>=,1,no +<variant>,operator<=>,1,no +<variant>,visit,1,cxx17 +<variant>,monostate,1,cxx17 +<variant>,swap,1,no +<variant>,bad_variant_access,1,cxx17 +<variant>,hash,1,no +<vector>,vector,1,cxx98 +<vector>,operator==,1,no +<vector>,operator<=>,1,no +<vector>,swap,1,no +<vector>,erase,1,no +<vector>,erase_if,1,no +<vector>,hash,1,no +# <version> contains no exportable names +# <cassert> contains no exportable names +# <cctype> TODO +<cfenv>,fenv_t,1,no +<cfenv>,fexcept_t,1,no +<cfenv>,feclearexcept,1,no +<cfenv>,fegetexceptflag,1,no +<cfenv>,feraiseexcept,1,no +<cfenv>,fesetexceptflag,1,no +<cfenv>,fetestexcept,1,no +<cfenv>,fegetround,1,no +<cfenv>,fesetround,1,no +<cfenv>,fegetenv,1,no +<cfenv>,feholdexcept,1,no +<cfenv>,fesetenv,1,no +<cfenv>,feupdateenv,1,no +<cinttypes>,imaxdiv_t,1,no +<cinttypes>,imaxabs,1,no +<cinttypes>,imaxdiv,1,no +<cinttypes>,strtoimax,1,no +<cinttypes>,strtoumax,1,no +<cinttypes>,wcstoimax,1,no +<cinttypes>,wcstoumax,1,no +<cinttypes>,abs,1,no +<cinttypes>,div,1,no +# <climits> only contains macros, handled by get_stdlib_header_for_name +# <climits>,CHAR_BIT,0,cxx98 +# <climits>,SCHAR_MIN,0,cxx98 +# <climits>,SCHAR_MAX,0,cxx98 +# <climits>,UCHAR_MAX,0,cxx98 +# <climits>,CHAR_MIN,0,cxx98 +# <climits>,CHAR_MAX,0,cxx98 +# <climits>,MB_LEN_MAX,0,cxx98 +# <climits>,SHRT_MIN,0,cxx98 +# <climits>,SHRT_MAX,0,cxx98 +# <climits>,USHRT_MAX,0,cxx98 +# <climits>,INT_MIN,0,cxx98 +# <climits>,INT_MAX,0,cxx98 +# <climits>,UINT_MAX,0,cxx98 +# <climits>,LONG_MIN,0,cxx98 +# <climits>,LONG_MAX,0,cxx98 +# <climits>,ULONG_MAX,0,cxx98 +# <climits>,LLONG_MIN,0,cxx98 +# <climits>,LLONG_MAX,0,cxx11 +# <climits>,ULLONG_MAX,0,cxx11 +<clocale>,lconv,1,no +<clocale>,setlocale,1,no +<clocale>,localeconv,1,no +# <cmath> TODO +<csetjmp>,jmp_buf,1,no +<csetjmp>,longjmp,1,no +<csignal>,sig_atomic_t,1,no +<csignal>,signal,1,no +<csignal>,raise,1,no +<csignal>,va_list,1,no +<cstddef>,ptrdiff_t,1,no +<cstddef>,size_t,1,no +<cstddef>,max_align_t,1,no +<cstddef>,nullptr_t,1,no +<cstddef>,byte,1,no +<cstddef>,operator<<=,1,no +<cstddef>,operator<<,1,no +<cstddef>,operator>>=,1,no +<cstddef>,operator>>,1,no +<cstddef>,operator|=,1,no +<cstddef>,operator|,1,no +<cstddef>,operator&=,1,no +<cstddef>,operator&,1,no +<cstddef>,operator^=,1,no +<cstddef>,operator^,1,no +<cstddef>,operator~,1,no +<cstddef>,to_integer,1,no +<cstdint>,int8_t,1,no +<cstdint>,int16_t,1,no +<cstdint>,int32_t,1,no +<cstdint>,int64_t,1,no +<cstdint>,int_fast8_t,1,no +<cstdint>,int_fast16_t,1,no +<cstdint>,int_fast32_t,1,no +<cstdint>,int_fast64_t,1,no +<cstdint>,int_least8_t,1,no +<cstdint>,int_least16_t,1,no +<cstdint>,int_least32_t,1,no +<cstdint>,int_least64_t,1,no +<cstdint>,intmax_t,1,no +<cstdint>,intptr_t,1,no +<cstdint>,uint8_t,1,no +<cstdint>,uint16_t,1,no +<cstdint>,uint32_t,1,no +<cstdint>,uint64_t,1,no +<cstdint>,uint_fast8_t,1,cxx11 +<cstdint>,uint_fast16_t,1,cxx11 +<cstdint>,uint_fast32_t,1,cxx11 +<cstdint>,uint_fast64_t,1,cxx11 +<cstdint>,uint_least8_t,1,cxx11 +<cstdint>,uint_least16_t,1,cxx11 +<cstdint>,uint_least32_t,1,cxx11 +<cstdint>,uint_least64_t,1,cxx11 +<cstdint>,uintmax_t,1,cxx11 +<cstdint>,uintptr_t,1,cxx11 +# <cstdio> TODO +# <cstdlib> TODO +# <cstring> TODO +# <ctime> TODO +# <cuchar> TODO +# <cwchar> TODO +# <cwctype> TODO diff --git a/gcc/cp/gen-cxxapi-file.py b/gcc/cp/gen-cxxapi-file.py new file mode 100644 index 0000000..bb1f8ed --- /dev/null +++ b/gcc/cp/gen-cxxapi-file.py @@ -0,0 +1,190 @@ +#!/usr/bin/env python3 + +# Copyright (C) 2022 Free Software Foundation, Inc. +# This file is part of GCC. + +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. + +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + + +# Generate gcc source files: +# - the export description of the standard C++ library module +# - the gperf tables used to hint at actions to fix problems +# related to missing symbols in the std:: namespace + +import csv +import os +import time + +# The CSV file contains the following columns: +# column value +# 1 header file, including angle brackets +# 2 symbol name without std:: prefix +# 3 nonzero if to be exported +# 4 "no" if not to be added to the hint table else the appropriate enum cxx_dialect value +# 5 optional, a string used after #if in a line inserted first to enable conditional definitions + + +def print_condition(prev, e): + if len(e) > 4 and e[4] != '': + if not prev or prev != e[4]: + if prev: + print('#endif') + print(f'#if {e[4]}') + return e[4] + if prev: + print('#endif') + return None + + +def export(script, content): + print("""// This file is auto-generated by {:s}. +#if __cplusplus <= 202002L +# if __cplusplus == 202002L +# ifdef __STRICT_ANSI__ +# error "module `std' is only available before C++23 if using -std=gnu++20" +# endif +# else +# error "module `std' is not available before C++23" +# endif +#endif + +export module std; + +import <bits/stdc++.h>; + +// new/delete operators in global namespace from <new> +export using ::operator new; +export using ::operator delete; +export using ::operator new[]; +export using ::operator delete[];""".format(script)) + header = '' + printed_header = False + cond = None + for e in content: + if e[0] != header: + header = e[0] + printed_header = False + if e[2] != 0: + if not printed_header: + if cond: + print('#endif') + cond = None + print(f'\n// {header}') + printed_header = True + cond = print_condition(cond, e) + print(f'export using std::{e[1]};') + if cond: + print('#endif') + + +def hints(script, content): + print("""%language=C++ +%define class-name std_name_hint_lookup +%struct-type +%{{ +/* This file is auto-generated by {:s}. */ +/* Copyright (C) {:s} Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +<http://www.gnu.org/licenses/>. */ +%}} +struct std_name_hint +{{ + /* A name within "std::". */ + const char *name; + + /* The header name defining it within the C++ Standard Library + (with '<' and '>'). */ + const char* header; + + /* The dialect of C++ in which this was added. */ + enum cxx_dialect min_dialect; +}}; +%% +# The standard-defined types, functions, and options in the std:: namespace +# as defined in the C++ language specification. The result is used in the +# get_std_name_hint functions. +# throws an exception. +#""".format(script, time.strftime('%Y'))) + header = '' + printed_header = False + for e in content: + if e[0] != header: + header = e[0] + printed_header = False + if e[3] != 'no': + if not printed_header: + print(f'# {header}') + printed_header = True + print(f'{e[1]}, "{e[0]}", {e[3]}') + + +def remove_comment(f): + for row in f: + row = row.strip() + if row[0] != '#': + yield row + + +modes = { + 'export': export, + 'hints': hints +} + + +def usage(script): + print(f'Usage: {script} [{"|".join(modes.keys())}] CSVFILE') + exit(1) + + +def main(argv): + if len(argv) < 3: + usage(argv[0] if len(argv) > 0 else '???') + + script = argv[0] + mode = argv[1] + filename = argv[2] + + if mode not in modes: + print(f"{script}: unrecognized mode '{mode}'") + usage(script) + + try: + with open(filename, 'r') as csvfile: + modes[mode](os.path.basename(script), sorted(csv.reader(remove_comment(csvfile), delimiter=','))) + except FileNotFoundError: + print(f"{script}: cannot find CSV file '{filename}'") + exit(1) + except PermissionError: + print(f"{script}: insufficient permission to read CSV file '{filename}'") + exit(1) + + +if __name__ == '__main__': + import sys + main(sys.argv) diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc index 2c2f9a9..73971e7 100644 --- a/gcc/cp/module.cc +++ b/gcc/cp/module.cc @@ -4046,6 +4046,7 @@ node_template_info (tree decl, int &use) || TREE_CODE (decl) == TYPE_DECL || TREE_CODE (decl) == FUNCTION_DECL || TREE_CODE (decl) == FIELD_DECL + || TREE_CODE (decl) == CONCEPT_DECL || TREE_CODE (decl) == TEMPLATE_DECL)) { use_tpl = DECL_USE_TEMPLATE (decl); diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc index 5eddad9..1289aab 100644 --- a/gcc/cp/pt.cc +++ b/gcc/cp/pt.cc @@ -10398,14 +10398,15 @@ tree lookup_and_finish_template_variable (tree templ, tree targs, tsubst_flags_t complain) { - templ = lookup_template_variable (templ, targs); - if (!any_dependent_template_arguments_p (targs)) + tree var = lookup_template_variable (templ, targs); + if (TMPL_PARMS_DEPTH (DECL_TEMPLATE_PARMS (templ)) == 1 + && !any_dependent_template_arguments_p (targs)) { - templ = finish_template_variable (templ, complain); - mark_used (templ); + var = finish_template_variable (var, complain); + mark_used (var); } - return convert_from_reference (templ); + return convert_from_reference (var); } /* If the set of template parameters PARMS contains a template parameter @@ -17229,7 +17230,8 @@ tsubst_copy (tree t, tree args, tsubst_flags_t complain, tree in_decl) TEMPLATE_DECL with `D<T>' as its DECL_CONTEXT. Now we have to substitute this with one having context `D<int>'. */ - tree context = tsubst (DECL_CONTEXT (t), args, complain, in_decl); + tree context = tsubst_aggr_type (DECL_CONTEXT (t), args, complain, + in_decl, /*entering_scope=*/true); return lookup_field (context, DECL_NAME(t), 0, false); } else diff --git a/gcc/cp/semantics.cc b/gcc/cp/semantics.cc index 7d46c3c..82f9dd8 100644 --- a/gcc/cp/semantics.cc +++ b/gcc/cp/semantics.cc @@ -3164,7 +3164,14 @@ finish_compound_literal (tree type, tree compound_literal, { /* DR2351 */ if (VOID_TYPE_P (type) && CONSTRUCTOR_NELTS (compound_literal) == 0) - return void_node; + { + if (!processing_template_decl) + return void_node; + TREE_TYPE (compound_literal) = type; + TREE_HAS_CONSTRUCTOR (compound_literal) = 1; + CONSTRUCTOR_IS_DEPENDENT (compound_literal) = 0; + return compound_literal; + } else if (VOID_TYPE_P (type) && processing_template_decl && maybe_zero_constructor_nelts (compound_literal)) diff --git a/gcc/cp/std-name-hint.gperf b/gcc/cp/std-name-hint.gperf index 976b90c..c906360 100644 --- a/gcc/cp/std-name-hint.gperf +++ b/gcc/cp/std-name-hint.gperf @@ -2,6 +2,7 @@ %define class-name std_name_hint_lookup %struct-type %{ +/* This file is auto-generated by gen-cxxapi-file.py. */ /* Copyright (C) 2022 Free Software Foundation, Inc. This file is part of GCC. @@ -47,33 +48,55 @@ array, "<array>", cxx11 to_array, "<array>", cxx20 # <atomic> atomic, "<atomic>", cxx11 -atomic_flag, "<atomic>", cxx11 atomic_ref, "<atomic>", cxx20 +atomic_signed_lock_free, "<atomic>", cxx11 +atomic_uintmax_t, "<atomic>", cxx20 +atomic_unsigned_lock_free, "<atomic>", cxx11 # <bitset> bitset, "<bitset>", cxx11 # <compare> -weak_equality, "<compare>", cxx20 -strong_equality, "<compare>", cxx20 partial_ordering, "<compare>", cxx20 -weak_ordering, "<compare>", cxx20 +strong_equality, "<compare>", cxx20 strong_ordering, "<compare>", cxx20 +weak_equality, "<compare>", cxx20 +weak_ordering, "<compare>", cxx20 # <complex> complex, "<complex>", cxx98 complex_literals, "<complex>", cxx14 -# <condition_variable>. */ +# <condition_variable> condition_variable, "<condition_variable>", cxx11 condition_variable_any, "<condition_variable>", cxx11 # <cstddef> byte, "<cstddef>", cxx17 +# <cstdint> +uint_fast16_t, "<cstdint>", cxx11 +uint_fast32_t, "<cstdint>", cxx11 +uint_fast64_t, "<cstdint>", cxx11 +uint_fast8_t, "<cstdint>", cxx11 +uint_least16_t, "<cstdint>", cxx11 +uint_least32_t, "<cstdint>", cxx11 +uint_least64_t, "<cstdint>", cxx11 +uint_least8_t, "<cstdint>", cxx11 +uintmax_t, "<cstdint>", cxx11 +uintptr_t, "<cstdint>", cxx11 # <deque> deque, "<deque>", cxx98 +# <exception> +current_exception, "<exception>", cxx11 +exception, "<exception>", cxx98 +exception_ptr, "<exception>", cxx11 +make_exception_ptr, "<exception>", cxx11 +terminate, "<exception>", cxx98 +uncaught_exceptions, "<exception>", cxx17 +# <expected> +expected, "<expected>", cxx23 # <forward_list> forward_list, "<forward_list>", cxx11 # <fstream> basic_filebuf, "<fstream>", cxx98 +basic_fstream, "<fstream>", cxx98 basic_ifstream, "<fstream>", cxx98 basic_ofstream, "<fstream>", cxx98 -basic_fstream, "<fstream>", cxx98 fstream, "<fstream>", cxx98 ifstream, "<fstream>", cxx98 ofstream, "<fstream>", cxx98 @@ -83,63 +106,65 @@ bind_front, "<functional>", cxx20 function, "<functional>", cxx11 hash, "<functional>", cxx11 invoke, "<functional>", cxx17 +invoke_r, "<functional>", cxx23 mem_fn, "<functional>", cxx11 not_fn, "<functional>", cxx17 reference_wrapper, "<functional>", cxx11 -unwrap_reference, "<functional>", cxx20 -unwrap_reference_t, "<functional>", cxx20 unwrap_ref_decay, "<functional>", cxx20 unwrap_ref_decay_t, "<functional>", cxx20 -# <future>. */ +unwrap_reference, "<functional>", cxx20 +unwrap_reference_t, "<functional>", cxx20 +# <future> async, "<future>", cxx11 future, "<future>", cxx11 packaged_task, "<future>", cxx11 promise, "<future>", cxx11 # <iomanip> +get_money, "<iomanip>", cxx11 +get_time, "<iomanip>", cxx11 +put_money, "<iomanip>", cxx11 +put_time, "<iomanip>", cxx11 +quoted, "<iomanip>", cxx14 resetiosflags, "<iomanip>", cxx98 -setiosflags, "<iomanip>", cxx98 setbase, "<iomanip>", cxx98 setfill, "<iomanip>", cxx98 +setiosflags, "<iomanip>", cxx98 setprecision, "<iomanip>", cxx98 setw, "<iomanip>", cxx98 -get_money, "<iomanip>", cxx11 -put_money, "<iomanip>", cxx11 -get_time, "<iomanip>", cxx11 -put_time, "<iomanip>", cxx11 -quoted, "<iomanip>", cxx14 # <ios> boolalpha, "<ios>", cxx98 +dec, "<ios>", cxx98 +defaultfloat, "<ios>", cxx11 +fixed, "<ios>", cxx98 +hex, "<ios>", cxx98 +hexfloat, "<ios>", cxx11 +internal, "<ios>", cxx98 +left, "<ios>", cxx98 noboolalpha, "<ios>", cxx98 -showbase, "<ios>", cxx98 noshowbase, "<ios>", cxx98 -showpoint, "<ios>", cxx98 noshowpoint, "<ios>", cxx98 -showpos, "<ios>", cxx98 noshowpos, "<ios>", cxx98 -skipws, "<ios>", cxx98 noskipws, "<ios>", cxx98 -uppercase, "<ios>", cxx98 -nouppercase, "<ios>", cxx98 -unitbuf, "<ios>", cxx98 nounitbuf, "<ios>", cxx98 -internal, "<ios>", cxx98 -left, "<ios>", cxx98 -right, "<ios>", cxx98 -dec, "<ios>", cxx98 -hex, "<ios>", cxx98 +nouppercase, "<ios>", cxx98 oct, "<ios>", cxx98 -fixed, "<ios>", cxx98 +right, "<ios>", cxx98 scientific, "<ios>", cxx98 -hexfloat, "<ios>", cxx11 -defaultfloat, "<ios>", cxx11 +showbase, "<ios>", cxx98 +showpoint, "<ios>", cxx98 +showpos, "<ios>", cxx98 +skipws, "<ios>", cxx98 +unitbuf, "<ios>", cxx98 +uppercase, "<ios>", cxx98 # <iostream> -cin, "<iostream>", cxx98 -cout, "<iostream>", cxx98 cerr, "<iostream>", cxx98 +cin, "<iostream>", cxx98 clog, "<iostream>", cxx98 +cout, "<iostream>", cxx98 +wcerr, "<iostream>", cxx98 wcin, "<iostream>", cxx98 -wcout, "<iostream>", cxx98 wclog, "<iostream>", cxx98 +wcout, "<iostream>", cxx98 # <istream> istream, "<istream>", cxx98 ws, "<istream>", cxx98 @@ -160,86 +185,213 @@ ostream_iterator, "<iterator>", cxx98 ostreambuf_iterator, "<iterator>", cxx98 prev, "<iterator>", cxx11 reverse_iterator, "<iterator>", cxx98 -# <ostream> -ostream, "<ostream>", cxx98 -ends, "<ostream>", cxx98 -flush, "<ostream>", cxx98 -endl, "<ostream>", cxx98 -emit_on_flush, "<ostream>", cxx20 -noemit_on_flush, "<ostream>", cxx20 -flush_emit, "<ostream>", cxx20 # <list> list, "<list>", cxx98 # <map> map, "<map>", cxx98 multimap, "<map>", cxx98 # <memory> +addressof, "<memory>", cxx11 +align, "<memory>", cxx11 allocate_shared, "<memory>", cxx11 +allocate_shared_for_overwrite, "<memory>", cxx20 allocator, "<memory>", cxx98 +allocator_arg, "<memory>", cxx11 +allocator_arg_t, "<memory>", cxx11 allocator_traits, "<memory>", cxx11 +assume_aligned, "<memory>", cxx20 +bad_weak_ptr, "<memory>", cxx11 +const_pointer_cast, "<memory>", cxx11 +construct_at, "<memory>", cxx20 +default_delete, "<memory>", cxx11 +destroy, "<memory>", cxx20 +destroy_at, "<memory>", cxx20 +destroy_n, "<memory>", cxx20 +dynamic_pointer_cast, "<memory>", cxx11 +enable_shared_from_this, "<memory>", cxx11 +get_deleter, "<memory>", cxx11 +make_obj_using_allocator, "<memory>", cxx20 make_shared, "<memory>", cxx11 +make_shared_for_overwrite, "<memory>", cxx20 make_unique, "<memory>", cxx14 +make_unique_for_overwrite, "<memory>", cxx20 +owner_less, "<memory>", cxx11 +pointer_traits, "<memory>", cxx11 +reinterpret_pointer_cast, "<memory>", cxx17 shared_ptr, "<memory>", cxx11 +static_pointer_cast, "<memory>", cxx11 +to_address, "<memory>", cxx11 +uninitialized_construct_using_allocator, "<memory>", cxx20 unique_ptr, "<memory>", cxx11 +uses_allocator, "<memory>", cxx11 +uses_allocator_construction_args, "<memory>", cxx20 +uses_allocator_v, "<memory>", cxx17 weak_ptr, "<memory>", cxx11 # <memory_resource> pmr, "<memory_resource>", cxx17 +pmr::get_default_resource, "<memory_resource>", cxx17 +pmr::memory_resource, "<memory_resource>", cxx17 +pmr::monotonic_buffer_resource, "<memory_resource>", cxx17 +pmr::new_delete_resource, "<memory_resource>", cxx17 +pmr::polymorphic_allocator, "<memory_resource>", cxx17 +pmr::pool_options, "<memory_resource>", cxx17 +pmr::set_default_resource, "<memory_resource>", cxx17 +pmr::synchronized_pool_resource, "<memory_resource>", cxx17 +pmr::unsynchronized_pool_resource, "<memory_resource>", cxx17 # <mutex> +call_once, "<mutex>", cxx11 +lock, "<mutex>", cxx11 +lock_guard, "<mutex>", cxx11 mutex, "<mutex>", cxx11 -timed_mutex, "<mutex>", cxx11 +once_flag, "<mutex>", cxx11 recursive_mutex, "<mutex>", cxx11 recursive_timed_mutex, "<mutex>", cxx11 -once_flag, "<mutex>", cxx11 -call_once, "<mutex>", cxx11 -lock, "<mutex>", cxx11 scoped_lock, "<mutex>", cxx17 +timed_mutex, "<mutex>", cxx11 try_lock, "<mutex>", cxx11 -lock_guard, "<mutex>", cxx11 unique_lock, "<mutex>", cxx11 -# <optional>. */ -optional, "<optional>", cxx17 +# <new> +bad_alloc, "<new>", cxx98 +hardware_constructive_interference_size, "<new>", cxx17 +hardware_destructive_interference_size, "<new>", cxx17 +launder, "<new>", cxx17 +nothrow, "<new>", cxx98 +nothrow_t, "<new>", cxx98 +# <numbers> +numbers::e_v, "<numbers>", cxx20 +numbers::egamma_v, "<numbers>", cxx20 +numbers::inv_pi_v, "<numbers>", cxx20 +numbers::inv_sqrt3_v, "<numbers>", cxx20 +numbers::inv_sqrtpi_v, "<numbers>", cxx20 +numbers::ln10_v, "<numbers>", cxx20 +numbers::ln2_v, "<numbers>", cxx20 +numbers::log10e_v, "<numbers>", cxx20 +numbers::log2e_v, "<numbers>", cxx20 +numbers::phi_v, "<numbers>", cxx20 +numbers::pi_v, "<numbers>", cxx20 +numbers::sqrt2_v, "<numbers>", cxx20 +numbers::sqrt3_v, "<numbers>", cxx20 +# <optional> make_optional, "<optional>", cxx17 +nullopt, "<optional>", cxx17 +optional, "<optional>", cxx17 # <ostream> -ostream, "<ostream>", cxx98 -wostream, "<ostream>", cxx98 +emit_on_flush, "<ostream>", cxx20 +endl, "<ostream>", cxx98 ends, "<ostream>", cxx98 flush, "<ostream>", cxx98 -endl, "<ostream>", cxx98 +flush_emit, "<ostream>", cxx20 +noemit_on_flush, "<ostream>", cxx20 +ostream, "<ostream>", cxx98 +wostream, "<ostream>", cxx98 # <queue> -queue, "<queue>", cxx98 priority_queue, "<queue>", cxx98 +queue, "<queue>", cxx98 +# <ranges> +ranges::enable_borrowed_range, "<ranges>", cxx20 +ranges::enable_view, "<ranges>", cxx20 +# <scoped_allocator> +scoped_allocator_adaptor, "<scoped_allocator>", cxx11 +# <semaphore> +binary_semaphore, "<semaphore>", cxx20 +counting_semaphore, "<semaphore>", cxx20 # <set> -set, "<set>", cxx98 multiset, "<set>", cxx98 +set, "<set>", cxx98 # <shared_mutex> shared_lock, "<shared_mutex>", cxx14 shared_mutex, "<shared_mutex>", cxx17 shared_timed_mutex, "<shared_mutex>", cxx14 # <source_location> source_location, "<source_location>", cxx20 +# <span> +span, "<span>", cxx20 +# <spanstream> +basic_ispanstream, "<spanstream>", cxx23 +basic_ospanstream, "<spanstream>", cxx23 +basic_spanbuf, "<spanstream>", cxx23 +basic_spanstream, "<spanstream>", cxx23 +ispanstream, "<spanstream>", cxx23 +ispanstream, "<spanstream>", cxx23 +ospanstream, "<spanstream>", cxx23 +spanbuf, "<spanstream>", cxx23 +spanstream, "<spanstream>", cxx23 +wispanstream, "<spanstream>", cxx23 +wospanstream, "<spanstream>", cxx23 +wspanbuf, "<spanstream>", cxx23 # <sstream> -basic_stringbuf, "<sstream>", cxx98 basic_istringstream, "<sstream>", cxx98 basic_ostringstream, "<sstream>", cxx98 +basic_stringbuf, "<sstream>", cxx98 basic_stringstream, "<sstream>", cxx98 istringstream, "<sstream>", cxx98 +istringstream, "<sstream>", cxx98 ostringstream, "<sstream>", cxx98 +stringbuf, "<sstream>", cxx98 stringstream, "<sstream>", cxx98 +wistringstream, "<sstream>", cxx98 +wostringstream, "<sstream>", cxx98 +wstringbuf, "<sstream>", cxx98 # <stack> stack, "<stack>", cxx98 +# <stacktrace> +stacktrace, "<stacktrace>", cxx23 +# <stdexcept> +domain_error, "<stdexcept>", cxx98 +invalid_argument, "<stdexcept>", cxx98 +length_error, "<stdexcept>", cxx98 +logic_error, "<stdexcept>", cxx98 +out_of_range, "<stdexcept>", cxx98 +overflow_error, "<stdexcept>", cxx98 +range_error, "<stdexcept>", cxx98 +runtime_error, "<stdexcept>", cxx98 +underflow_error, "<stdexcept>", cxx98 +# <stop_token> +stop_callback, "<stop_token>", cxx20 +stop_source, "<stop_token>", cxx20 +stop_token, "<stop_token>", cxx20 +# <streambuf> +basic_streambuf, "<streambuf>", cxx98 +streambuf, "<streambuf>", cxx98 +wstreambuf, "<streambuf>", cxx98 # <string> basic_string, "<string>", cxx98 +char_traits, "<string>", cxx98 +stod, "<string>", cxx11 +stof, "<string>", cxx11 +stoi, "<string>", cxx11 +stol, "<string>", cxx11 +stold, "<string>", cxx11 +stoll, "<string>", cxx11 +stoul, "<string>", cxx11 +stoull, "<string>", cxx11 string, "<string>", cxx98 -wstring, "<string>", cxx98 -u8string, "<string>", cxx20 +to_string, "<string>", cxx17 +to_wstring, "<string>", cxx17 u16string, "<string>", cxx11 u32string, "<string>", cxx11 +u8string, "<string>", cxx20 +wstring, "<string>", cxx98 # <string_view> basic_string_view, "<string_view>", cxx17 string_view, "<string_view>", cxx17 +# <system_error> +errc, "<system_error>", cxx11 +error_category, "<system_error>", cxx11 +error_code, "<system_error>", cxx11 +error_condition, "<system_error>", cxx11 +generic_category, "<system_error>", cxx11 +is_error_code_enum, "<system_error>", cxx11 +is_error_code_enum_v, "<system_error>", cxx17 +is_error_condition_enum, "<system_error>", cxx11 +is_error_condition_enum_v, "<system_error>", cxx17 +make_error_code, "<system_error>", cxx11 +make_error_condition, "<system_error>", cxx11 +system_category, "<system_error>", cxx11 # <thread> -thread, "<thread>", cxx11 +jthread, "<thread>", cxx20 this_thread, "<thread>", cxx11 +thread, "<thread>", cxx11 # <tuple> apply, "<tuple>", cxx17 forward_as_tuple, "<tuple>", cxx11 @@ -253,35 +405,73 @@ tuple_element_t, "<tuple>", cxx14 tuple_size, "<tuple>", cxx11 tuple_size_v, "<tuple>", cxx17 # <type_traits> +conjunction, "<type_traits>", cxx17 +conjunction_v, "<type_traits>", cxx17 +disjunction, "<type_traits>", cxx17 +disjunction_v, "<type_traits>", cxx17 enable_if, "<type_traits>", cxx11 enable_if_t, "<type_traits>", cxx14 invoke_result, "<type_traits>", cxx17 invoke_result_t, "<type_traits>", cxx17 +negation, "<type_traits>", cxx17 +negation_v, "<type_traits>", cxx17 remove_cvref, "<type_traits>", cxx20 remove_cvref_t, "<type_traits>", cxx20 type_identity, "<type_traits>", cxx20 type_identity_t, "<type_traits>", cxx20 void_t, "<type_traits>", cxx17 -conjunction, "<type_traits>", cxx17 -conjunction_v, "<type_traits>", cxx17 -disjunction, "<type_traits>", cxx17 -disjunction_v, "<type_traits>", cxx17 -negation, "<type_traits>", cxx17 -negation_v, "<type_traits>", cxx17 +# <typeindex> +type_index, "<typeindex>", cxx11 +# <typeinfo> +bad_cast, "<typeinfo>", cxx98 +bad_typeid, "<typeinfo>", cxx98 # <unordered_map> unordered_map, "<unordered_map>", cxx11 unordered_multimap, "<unordered_map>", cxx11 # <unordered_set> -unordered_set, "<unordered_set>", cxx11 unordered_multiset, "<unordered_set>", cxx11 +unordered_set, "<unordered_set>", cxx11 # <utility> +as_const, "<utility>", cxx17 +cmp_equal, "<utility>", cxx20 +cmp_greater, "<utility>", cxx20 +cmp_greater_equal, "<utility>", cxx20 +cmp_less, "<utility>", cxx20 +cmp_less_equal, "<utility>", cxx20 +cmp_not_equal, "<utility>", cxx20 declval, "<utility>", cxx11 +exchange, "<utility>", cxx14 forward, "<utility>", cxx11 +in_place, "<utility>", cxx17 +in_place_index, "<utility>", cxx17 +in_place_index_t, "<utility>", cxx17 +in_place_t, "<utility>", cxx17 +in_place_type, "<utility>", cxx17 +in_place_type_t, "<utility>", cxx17 +in_range, "<utility>", cxx20 +index_sequence, "<utility>", cxx14 +index_sequence_for, "<utility>", cxx14 +integer_sequence, "<utility>", cxx14 +make_index_sequence, "<utility>", cxx14 +make_integer_sequence, "<utility>", cxx14 make_pair, "<utility>", cxx98 move, "<utility>", cxx11 +move_if_noexcept, "<utility>", cxx11 pair, "<utility>", cxx98 +piecewise_construct, "<utility>", cxx11 +piecewise_construct_t, "<utility>", cxx11 +to_underlying, "<utility>", cxx23 +unreachable, "<utility>", cxx23 # <variant> +bad_variant_access, "<variant>", cxx17 +holds_alternative, "<variant>", cxx17 +monostate, "<variant>", cxx17 variant, "<variant>", cxx17 +variant_alternative, "<variant>", cxx17 +variant_alternative_t, "<variant>", cxx17 +variant_npos, "<variant>", cxx17 +variant_size, "<variant>", cxx17 +variant_size_v, "<variant>", cxx17 visit, "<variant>", cxx17 # <vector> vector, "<vector>", cxx98 diff --git a/gcc/cp/std-name-hint.h b/gcc/cp/std-name-hint.h index c48eac3..f28a2e0 100644 --- a/gcc/cp/std-name-hint.h +++ b/gcc/cp/std-name-hint.h @@ -1,5 +1,5 @@ /* C++ code produced by gperf version 3.1 */ -/* Command-line: gperf -o -C -E -D -N find -L C++ --output-file std-name-hint.h -k'1,2,7,11,$' std-name-hint.gperf */ +/* Command-line: gperf -o -C -E -k '1,2,7,11,$' -D -N find -L C++ --output-file std-name-hint.h std-name-hint.gperf */ #if !((' ' == 32) && ('!' == 33) && ('"' == 34) && ('#' == 35) \ && ('%' == 37) && ('&' == 38) && ('\'' == 39) && ('(' == 40) \ @@ -30,6 +30,7 @@ #line 4 "std-name-hint.gperf" +/* This file is auto-generated by gen-cxxapi-file.py. */ /* Copyright (C) 2022 Free Software Foundation, Inc. This file is part of GCC. @@ -47,7 +48,7 @@ for more details. You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ -#line 23 "std-name-hint.gperf" +#line 24 "std-name-hint.gperf" struct std_name_hint { /* A name within "std::". */ @@ -60,7 +61,7 @@ struct std_name_hint /* The dialect of C++ in which this was added. */ enum cxx_dialect min_dialect; }; -/* maximum key range = 626, duplicates = 4 */ +/* maximum key range = 1387, duplicates = 6 */ class std_name_hint_lookup { @@ -75,32 +76,32 @@ std_name_hint_lookup::hash (const char *str, size_t len) { static const unsigned short asso_values[] = { - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 5, - 635, 0, 635, 635, 635, 635, 25, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 45, 635, 25, 70, 165, - 20, 0, 35, 225, 190, 95, 635, 120, 183, 10, - 5, 25, 165, 5, 5, 10, 0, 55, 4, 143, - 115, 229, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635, 635, 635, 635, 635, - 635, 635, 635, 635, 635, 635 + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 10, + 25, 5, 20, 1412, 0, 1412, 5, 0, 15, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 260, 1412, 430, 15, 323, + 305, 5, 55, 198, 475, 125, 240, 105, 225, 50, + 5, 155, 105, 440, 85, 5, 0, 10, 15, 124, + 470, 463, 65, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, 1412, + 1412, 1412, 1412, 1412, 1412, 1412, 1412 }; unsigned int hval = len; @@ -120,7 +121,7 @@ std_name_hint_lookup::hash (const char *str, size_t len) case 4: case 3: case 2: - hval += asso_values[static_cast<unsigned char>(str[1])]; + hval += asso_values[static_cast<unsigned char>(str[1]+1)]; /*FALLTHROUGH*/ case 1: hval += asso_values[static_cast<unsigned char>(str[0])]; @@ -134,509 +135,952 @@ std_name_hint_lookup::find (const char *str, size_t len) { enum { - TOTAL_KEYWORDS = 205, + TOTAL_KEYWORDS = 378, MIN_WORD_LENGTH = 2, - MAX_WORD_LENGTH = 22, - MIN_HASH_VALUE = 9, - MAX_HASH_VALUE = 634 + MAX_WORD_LENGTH = 39, + MIN_HASH_VALUE = 25, + MAX_HASH_VALUE = 1411 }; static const struct std_name_hint wordlist[] = { -#line 158 "std-name-hint.gperf" - {"next", "<iterator>", cxx11}, -#line 212 "std-name-hint.gperf" +#line 401 "std-name-hint.gperf" + {"tuple", "<tuple>", cxx11}, +#line 276 "std-name-hint.gperf" + {"nullopt", "<optional>", cxx17}, +#line 405 "std-name-hint.gperf" + {"tuple_size", "<tuple>", cxx11}, +#line 469 "std-name-hint.gperf" + {"variant", "<variant>", cxx17}, +#line 403 "std-name-hint.gperf" + {"tuple_element", "<tuple>", cxx11}, +#line 404 "std-name-hint.gperf" + {"tuple_element_t", "<tuple>", cxx14}, +#line 426 "std-name-hint.gperf" + {"bad_cast", "<typeinfo>", cxx98}, +#line 471 "std-name-hint.gperf" + {"variant_alternative_t", "<variant>", cxx17}, +#line 470 "std-name-hint.gperf" + {"variant_alternative", "<variant>", cxx17}, +#line 267 "std-name-hint.gperf" + {"numbers::ln2_v", "<numbers>", cxx20}, +#line 266 "std-name-hint.gperf" + {"numbers::ln10_v", "<numbers>", cxx20}, +#line 263 "std-name-hint.gperf" + {"numbers::inv_pi_v", "<numbers>", cxx20}, +#line 300 "std-name-hint.gperf" {"set", "<set>", cxx98}, -#line 287 "std-name-hint.gperf" - {"vector", "<vector>", cxx98}, -#line 101 "std-name-hint.gperf" +#line 183 "std-name-hint.gperf" + {"next", "<iterator>", cxx11}, +#line 264 "std-name-hint.gperf" + {"numbers::inv_sqrt3_v", "<numbers>", cxx20}, +#line 265 "std-name-hint.gperf" + {"numbers::inv_sqrtpi_v", "<numbers>", cxx20}, +#line 361 "std-name-hint.gperf" + {"stof", "<string>", cxx11}, +#line 129 "std-name-hint.gperf" {"setbase", "<iomanip>", cxx98}, -#line 165 "std-name-hint.gperf" - {"ends", "<ostream>", cxx98}, -#line 205 "std-name-hint.gperf" - {"ends", "<ostream>", cxx98}, -#line 86 "std-name-hint.gperf" +#line 299 "std-name-hint.gperf" + {"multiset", "<set>", cxx98}, +#line 174 "std-name-hint.gperf" + {"begin", "<iterator>", cxx11}, +#line 119 "std-name-hint.gperf" + {"future", "<future>", cxx11}, +#line 70 "std-name-hint.gperf" + {"byte", "<cstddef>", cxx17}, +#line 399 "std-name-hint.gperf" + {"make_tuple", "<tuple>", cxx11}, +#line 216 "std-name-hint.gperf" + {"make_unique", "<memory>", cxx14}, +#line 330 "std-name-hint.gperf" + {"stringbuf", "<sstream>", cxx98}, +#line 355 "std-name-hint.gperf" + {"streambuf", "<streambuf>", cxx98}, +#line 456 "std-name-hint.gperf" + {"make_integer_sequence", "<utility>", cxx14}, +#line 217 "std-name-hint.gperf" + {"make_unique_for_overwrite", "<memory>", cxx20}, +#line 313 "std-name-hint.gperf" + {"basic_spanstream", "<spanstream>", cxx23}, +#line 326 "std-name-hint.gperf" + {"basic_stringstream", "<sstream>", cxx98}, +#line 325 "std-name-hint.gperf" + {"basic_stringbuf", "<sstream>", cxx98}, +#line 473 "std-name-hint.gperf" + {"variant_size", "<variant>", cxx17}, +#line 338 "std-name-hint.gperf" + {"stacktrace", "<stacktrace>", cxx23}, +#line 110 "std-name-hint.gperf" {"mem_fn", "<functional>", cxx11}, -#line 69 "std-name-hint.gperf" - {"deque", "<deque>", cxx98}, -#line 162 "std-name-hint.gperf" - {"reverse_iterator", "<iterator>", cxx98}, -#line 151 "std-name-hint.gperf" - {"end", "<iterator>", cxx11}, -#line 264 "std-name-hint.gperf" +#line 312 "std-name-hint.gperf" + {"basic_spanbuf", "<spanstream>", cxx23}, +#line 283 "std-name-hint.gperf" + {"flush_emit", "<ostream>", cxx20}, +#line 111 "std-name-hint.gperf" + {"not_fn", "<functional>", cxx17}, +#line 474 "std-name-hint.gperf" + {"variant_size_v", "<variant>", cxx17}, +#line 336 "std-name-hint.gperf" + {"stack", "<stack>", cxx98}, +#line 422 "std-name-hint.gperf" {"void_t", "<type_traits>", cxx17}, -#line 284 "std-name-hint.gperf" - {"variant", "<variant>", cxx17}, -#line 281 "std-name-hint.gperf" +#line 121 "std-name-hint.gperf" + {"promise", "<future>", cxx11}, +#line 186 "std-name-hint.gperf" + {"prev", "<iterator>", cxx11}, +#line 170 "std-name-hint.gperf" + {"ws", "<istream>", cxx98}, +#line 173 "std-name-hint.gperf" + {"back_inserter", "<iterator>", cxx98}, +#line 131 "std-name-hint.gperf" + {"setiosflags", "<iomanip>", cxx98}, +#line 466 "std-name-hint.gperf" + {"bad_variant_access", "<variant>", cxx17}, +#line 288 "std-name-hint.gperf" + {"priority_queue", "<queue>", cxx98}, +#line 144 "std-name-hint.gperf" + {"noshowbase", "<ios>", cxx98}, +#line 362 "std-name-hint.gperf" + {"stoi", "<string>", cxx11}, +#line 155 "std-name-hint.gperf" + {"showpos", "<ios>", cxx98}, +#line 153 "std-name-hint.gperf" + {"showbase", "<ios>", cxx98}, +#line 235 "std-name-hint.gperf" + {"pmr::new_delete_resource", "<memory_resource>", cxx17}, +#line 232 "std-name-hint.gperf" + {"pmr::get_default_resource", "<memory_resource>", cxx17}, +#line 238 "std-name-hint.gperf" + {"pmr::set_default_resource", "<memory_resource>", cxx17}, +#line 97 "std-name-hint.gperf" + {"basic_fstream", "<fstream>", cxx98}, +#line 477 "std-name-hint.gperf" + {"vector", "<vector>", cxx98}, +#line 100 "std-name-hint.gperf" + {"fstream", "<fstream>", cxx98}, +#line 458 "std-name-hint.gperf" {"move", "<utility>", cxx11}, -#line 87 "std-name-hint.gperf" - {"not_fn", "<functional>", cxx17}, +#line 96 "std-name-hint.gperf" + {"basic_filebuf", "<fstream>", cxx98}, +#line 281 "std-name-hint.gperf" + {"ends", "<ostream>", cxx98}, +#line 398 "std-name-hint.gperf" + {"make_from_tuple", "<tuple>", cxx17}, +#line 191 "std-name-hint.gperf" + {"map", "<map>", cxx98}, +#line 271 "std-name-hint.gperf" + {"numbers::pi_v", "<numbers>", cxx20}, +#line 376 "std-name-hint.gperf" + {"basic_string_view", "<string_view>", cxx17}, +#line 126 "std-name-hint.gperf" + {"put_time", "<iomanip>", cxx11}, +#line 352 "std-name-hint.gperf" + {"stop_token", "<stop_token>", cxx20}, +#line 133 "std-name-hint.gperf" + {"setw", "<iomanip>", cxx98}, +#line 148 "std-name-hint.gperf" + {"nounitbuf", "<ios>", cxx98}, +#line 351 "std-name-hint.gperf" + {"stop_source", "<stop_token>", cxx20}, +#line 213 "std-name-hint.gperf" + {"make_obj_using_allocator", "<memory>", cxx20}, +#line 321 "std-name-hint.gperf" + {"wspanbuf", "<spanstream>", cxx23}, +#line 231 "std-name-hint.gperf" + {"pmr", "<memory_resource>", cxx17}, +#line 472 "std-name-hint.gperf" + {"variant_npos", "<variant>", cxx17}, +#line 223 "std-name-hint.gperf" + {"to_address", "<memory>", cxx11}, +#line 460 "std-name-hint.gperf" + {"pair", "<utility>", cxx98}, #line 269 "std-name-hint.gperf" + {"numbers::log2e_v", "<numbers>", cxx20}, +#line 268 "std-name-hint.gperf" + {"numbers::log10e_v", "<numbers>", cxx20}, +#line 149 "std-name-hint.gperf" + {"nouppercase", "<ios>", cxx98}, +#line 368 "std-name-hint.gperf" + {"string", "<string>", cxx98}, +#line 373 "std-name-hint.gperf" + {"u8string", "<string>", cxx20}, +#line 145 "std-name-hint.gperf" + {"noshowpoint", "<ios>", cxx98}, +#line 310 "std-name-hint.gperf" + {"basic_ispanstream", "<spanstream>", cxx23}, +#line 416 "std-name-hint.gperf" {"negation", "<type_traits>", cxx17}, -#line 270 "std-name-hint.gperf" +#line 146 "std-name-hint.gperf" + {"noshowpos", "<ios>", cxx98}, +#line 459 "std-name-hint.gperf" + {"move_if_noexcept", "<utility>", cxx11}, +#line 169 "std-name-hint.gperf" + {"istream", "<istream>", cxx98}, +#line 314 "std-name-hint.gperf" + {"ispanstream", "<spanstream>", cxx23}, +#line 315 "std-name-hint.gperf" + {"ispanstream", "<spanstream>", cxx23}, +#line 106 "std-name-hint.gperf" + {"function", "<functional>", cxx11}, +#line 356 "std-name-hint.gperf" + {"wstreambuf", "<streambuf>", cxx98}, +#line 417 "std-name-hint.gperf" {"negation_v", "<type_traits>", cxx17}, -#line 122 "std-name-hint.gperf" - {"nouppercase", "<ios>", cxx98}, -#line 43 "std-name-hint.gperf" - {"any_cast", "<any>", cxx17}, -#line 181 "std-name-hint.gperf" - {"make_unique", "<memory>", cxx14}, +#line 156 "std-name-hint.gperf" + {"skipws", "<ios>", cxx98}, +#line 259 "std-name-hint.gperf" + {"nothrow_t", "<new>", cxx98}, +#line 363 "std-name-hint.gperf" + {"stol", "<string>", cxx11}, +#line 365 "std-name-hint.gperf" + {"stoll", "<string>", cxx11}, +#line 366 "std-name-hint.gperf" + {"stoul", "<string>", cxx11}, +#line 367 "std-name-hint.gperf" + {"stoull", "<string>", cxx11}, #line 147 "std-name-hint.gperf" - {"advance", "<iterator>", cxx98}, -#line 157 "std-name-hint.gperf" + {"noskipws", "<ios>", cxx98}, +#line 400 "std-name-hint.gperf" + {"tie", "<tuple>", cxx11}, +#line 220 "std-name-hint.gperf" + {"reinterpret_pointer_cast", "<memory>", cxx17}, +#line 358 "std-name-hint.gperf" + {"basic_string", "<string>", cxx98}, +#line 187 "std-name-hint.gperf" + {"reverse_iterator", "<iterator>", cxx98}, +#line 182 "std-name-hint.gperf" {"move_iterator", "<iterator>", cxx11}, -#line 246 "std-name-hint.gperf" - {"make_from_tuple", "<tuple>", cxx17}, -#line 134 "std-name-hint.gperf" - {"defaultfloat", "<ios>", cxx11}, -#line 249 "std-name-hint.gperf" - {"tuple", "<tuple>", cxx11}, -#line 257 "std-name-hint.gperf" - {"enable_if_t", "<type_traits>", cxx14}, -#line 164 "std-name-hint.gperf" - {"ostream", "<ostream>", cxx98}, -#line 203 "std-name-hint.gperf" +#line 262 "std-name-hint.gperf" + {"numbers::egamma_v", "<numbers>", cxx20}, +#line 311 "std-name-hint.gperf" + {"basic_ospanstream", "<spanstream>", cxx23}, +#line 475 "std-name-hint.gperf" + {"visit", "<variant>", cxx17}, +#line 56 "std-name-hint.gperf" + {"bitset", "<bitset>", cxx11}, +#line 285 "std-name-hint.gperf" {"ostream", "<ostream>", cxx98}, -#line 261 "std-name-hint.gperf" - {"remove_cvref_t", "<type_traits>", cxx20}, -#line 209 "std-name-hint.gperf" - {"queue", "<queue>", cxx98}, -#line 159 "std-name-hint.gperf" - {"ostream_iterator", "<iterator>", cxx98}, -#line 227 "std-name-hint.gperf" - {"stringstream", "<sstream>", cxx98}, -#line 251 "std-name-hint.gperf" - {"tuple_element", "<tuple>", cxx11}, -#line 252 "std-name-hint.gperf" - {"tuple_element_t", "<tuple>", cxx14}, -#line 77 "std-name-hint.gperf" - {"fstream", "<fstream>", cxx98}, -#line 213 "std-name-hint.gperf" - {"multiset", "<set>", cxx98}, -#line 280 "std-name-hint.gperf" - {"make_pair", "<utility>", cxx98}, -#line 253 "std-name-hint.gperf" - {"tuple_size", "<tuple>", cxx11}, -#line 100 "std-name-hint.gperf" - {"setiosflags", "<iomanip>", cxx98}, -#line 99 "std-name-hint.gperf" - {"resetiosflags", "<iomanip>", cxx98}, -#line 149 "std-name-hint.gperf" - {"begin", "<iterator>", cxx11}, -#line 109 "std-name-hint.gperf" - {"quoted", "<iomanip>", cxx14}, -#line 275 "std-name-hint.gperf" +#line 154 "std-name-hint.gperf" + {"showpoint", "<ios>", cxx98}, +#line 316 "std-name-hint.gperf" + {"ospanstream", "<spanstream>", cxx23}, +#line 433 "std-name-hint.gperf" {"unordered_set", "<unordered_set>", cxx11}, -#line 276 "std-name-hint.gperf" - {"unordered_multiset", "<unordered_set>", cxx11}, -#line 256 "std-name-hint.gperf" - {"enable_if", "<type_traits>", cxx11}, -#line 95 "std-name-hint.gperf" - {"future", "<future>", cxx11}, -#line 260 "std-name-hint.gperf" - {"remove_cvref", "<type_traits>", cxx20}, -#line 248 "std-name-hint.gperf" - {"tie", "<tuple>", cxx11}, -#line 247 "std-name-hint.gperf" - {"make_tuple", "<tuple>", cxx11}, -#line 71 "std-name-hint.gperf" - {"forward_list", "<forward_list>", cxx11}, -#line 79 "std-name-hint.gperf" - {"ofstream", "<fstream>", cxx98}, -#line 285 "std-name-hint.gperf" - {"visit", "<variant>", cxx17}, -#line 127 "std-name-hint.gperf" - {"right", "<ios>", cxx98}, -#line 85 "std-name-hint.gperf" - {"invoke", "<functional>", cxx17}, -#line 279 "std-name-hint.gperf" - {"forward", "<utility>", cxx11}, -#line 114 "std-name-hint.gperf" - {"noshowbase", "<ios>", cxx98}, -#line 153 "std-name-hint.gperf" - {"inserter", "<iterator>", cxx98}, -#line 160 "std-name-hint.gperf" - {"ostreambuf_iterator", "<iterator>", cxx98}, -#line 51 "std-name-hint.gperf" - {"atomic_ref", "<atomic>", cxx20}, -#line 112 "std-name-hint.gperf" - {"noboolalpha", "<ios>", cxx98}, -#line 148 "std-name-hint.gperf" - {"back_inserter", "<iterator>", cxx98}, -#line 183 "std-name-hint.gperf" - {"unique_ptr", "<memory>", cxx11}, -#line 89 "std-name-hint.gperf" - {"unwrap_reference", "<functional>", cxx20}, -#line 90 "std-name-hint.gperf" - {"unwrap_reference_t", "<functional>", cxx20}, -#line 219 "std-name-hint.gperf" - {"source_location", "<source_location>", cxx20}, -#line 254 "std-name-hint.gperf" - {"tuple_size_v", "<tuple>", cxx17}, -#line 83 "std-name-hint.gperf" - {"function", "<functional>", cxx11}, -#line 144 "std-name-hint.gperf" - {"istream", "<istream>", cxx98}, +#line 78 "std-name-hint.gperf" + {"uint_least64_t", "<cstdint>", cxx11}, #line 229 "std-name-hint.gperf" - {"stack", "<stack>", cxx98}, -#line 154 "std-name-hint.gperf" + {"weak_ptr", "<memory>", cxx11}, +#line 79 "std-name-hint.gperf" + {"uint_least8_t", "<cstdint>", cxx11}, +#line 77 "std-name-hint.gperf" + {"uint_least32_t", "<cstdint>", cxx11}, +#line 76 "std-name-hint.gperf" + {"uint_least16_t", "<cstdint>", cxx11}, +#line 179 "std-name-hint.gperf" {"istream_iterator", "<iterator>", cxx98}, -#line 123 "std-name-hint.gperf" +#line 157 "std-name-hint.gperf" {"unitbuf", "<ios>", cxx98}, -#line 224 "std-name-hint.gperf" - {"basic_stringstream", "<sstream>", cxx98}, -#line 245 "std-name-hint.gperf" - {"forward_as_tuple", "<tuple>", cxx11}, +#line 142 "std-name-hint.gperf" + {"left", "<ios>", cxx98}, +#line 346 "std-name-hint.gperf" + {"range_error", "<stdexcept>", cxx98}, +#line 347 "std-name-hint.gperf" + {"runtime_error", "<stdexcept>", cxx98}, +#line 108 "std-name-hint.gperf" + {"invoke", "<functional>", cxx17}, +#line 222 "std-name-hint.gperf" + {"static_pointer_cast", "<memory>", cxx11}, +#line 98 "std-name-hint.gperf" + {"basic_ifstream", "<fstream>", cxx98}, +#line 406 "std-name-hint.gperf" + {"tuple_size_v", "<tuple>", cxx17}, +#line 452 "std-name-hint.gperf" + {"index_sequence", "<utility>", cxx14}, +#line 184 "std-name-hint.gperf" + {"ostream_iterator", "<iterator>", cxx98}, +#line 261 "std-name-hint.gperf" + {"numbers::e_v", "<numbers>", cxx20}, #line 124 "std-name-hint.gperf" - {"nounitbuf", "<ios>", cxx98}, -#line 119 "std-name-hint.gperf" - {"skipws", "<ios>", cxx98}, -#line 75 "std-name-hint.gperf" + {"get_time", "<iomanip>", cxx11}, +#line 432 "std-name-hint.gperf" + {"unordered_multiset", "<unordered_set>", cxx11}, +#line 360 "std-name-hint.gperf" + {"stod", "<string>", cxx11}, +#line 364 "std-name-hint.gperf" + {"stold", "<string>", cxx11}, +#line 151 "std-name-hint.gperf" + {"right", "<ios>", cxx98}, +#line 99 "std-name-hint.gperf" {"basic_ofstream", "<fstream>", cxx98}, -#line 156 "std-name-hint.gperf" - {"iterator_traits", "<iterator>", cxx98}, -#line 76 "std-name-hint.gperf" - {"basic_fstream", "<fstream>", cxx98}, -#line 131 "std-name-hint.gperf" - {"fixed", "<ios>", cxx98}, -#line 184 "std-name-hint.gperf" - {"weak_ptr", "<memory>", cxx11}, -#line 104 "std-name-hint.gperf" - {"setw", "<iomanip>", cxx98}, -#line 152 "std-name-hint.gperf" - {"front_inserter", "<iterator>", cxx98}, -#line 221 "std-name-hint.gperf" - {"basic_stringbuf", "<sstream>", cxx98}, -#line 145 "std-name-hint.gperf" - {"ws", "<istream>", cxx98}, -#line 92 "std-name-hint.gperf" - {"unwrap_ref_decay_t", "<functional>", cxx20}, -#line 53 "std-name-hint.gperf" - {"bitset", "<bitset>", cxx11}, -#line 78 "std-name-hint.gperf" - {"ifstream", "<fstream>", cxx98}, -#line 138 "std-name-hint.gperf" - {"cerr", "<iostream>", cxx98}, -#line 88 "std-name-hint.gperf" - {"reference_wrapper", "<functional>", cxx11}, -#line 97 "std-name-hint.gperf" - {"promise", "<future>", cxx11}, -#line 161 "std-name-hint.gperf" - {"prev", "<iterator>", cxx11}, -#line 82 "std-name-hint.gperf" - {"bind_front", "<functional>", cxx20}, -#line 186 "std-name-hint.gperf" - {"pmr", "<memory_resource>", cxx17}, -#line 155 "std-name-hint.gperf" - {"istreambuf_iterator", "<iterator>", cxx98}, -#line 188 "std-name-hint.gperf" - {"mutex", "<mutex>", cxx11}, -#line 126 "std-name-hint.gperf" - {"left", "<ios>", cxx98}, -#line 128 "std-name-hint.gperf" - {"dec", "<ios>", cxx98}, +#line 379 "std-name-hint.gperf" + {"errc", "<system_error>", cxx11}, #line 81 "std-name-hint.gperf" - {"bind", "<functional>", cxx11}, -#line 120 "std-name-hint.gperf" - {"noskipws", "<ios>", cxx98}, -#line 167 "std-name-hint.gperf" - {"endl", "<ostream>", cxx98}, -#line 207 "std-name-hint.gperf" - {"endl", "<ostream>", cxx98}, -#line 130 "std-name-hint.gperf" - {"oct", "<ios>", cxx98}, -#line 137 "std-name-hint.gperf" - {"cout", "<iostream>", cxx98}, -#line 49 "std-name-hint.gperf" - {"atomic", "<atomic>", cxx11}, -#line 282 "std-name-hint.gperf" - {"pair", "<utility>", cxx98}, -#line 174 "std-name-hint.gperf" - {"map", "<map>", cxx98}, -#line 193 "std-name-hint.gperf" + {"uintptr_t", "<cstdint>", cxx11}, +#line 439 "std-name-hint.gperf" + {"cmp_less", "<utility>", cxx20}, +#line 402 "std-name-hint.gperf" + {"tuple_cat", "<tuple>", cxx11}, +#line 381 "std-name-hint.gperf" + {"error_code", "<system_error>", cxx11}, +#line 323 "std-name-hint.gperf" + {"basic_istringstream", "<sstream>", cxx98}, +#line 105 "std-name-hint.gperf" + {"bind_front", "<functional>", cxx20}, +#line 455 "std-name-hint.gperf" + {"make_index_sequence", "<utility>", cxx14}, +#line 242 "std-name-hint.gperf" {"call_once", "<mutex>", cxx11}, -#line 94 "std-name-hint.gperf" - {"async", "<future>", cxx11}, -#line 116 "std-name-hint.gperf" - {"noshowpoint", "<ios>", cxx98}, -#line 204 "std-name-hint.gperf" - {"wostream", "<ostream>", cxx98}, +#line 372 "std-name-hint.gperf" + {"u32string", "<string>", cxx11}, #line 258 "std-name-hint.gperf" - {"invoke_result", "<type_traits>", cxx17}, -#line 118 "std-name-hint.gperf" - {"noshowpos", "<ios>", cxx98}, -#line 259 "std-name-hint.gperf" - {"invoke_result_t", "<type_traits>", cxx17}, -#line 241 "std-name-hint.gperf" - {"thread", "<thread>", cxx11}, -#line 103 "std-name-hint.gperf" - {"setprecision", "<iomanip>", cxx98}, -#line 113 "std-name-hint.gperf" - {"showbase", "<ios>", cxx98}, -#line 74 "std-name-hint.gperf" - {"basic_ifstream", "<fstream>", cxx98}, + {"nothrow", "<new>", cxx98}, +#line 371 "std-name-hint.gperf" + {"u16string", "<string>", cxx11}, +#line 177 "std-name-hint.gperf" + {"front_inserter", "<iterator>", cxx98}, +#line 83 "std-name-hint.gperf" + {"deque", "<deque>", cxx98}, +#line 112 "std-name-hint.gperf" + {"reference_wrapper", "<functional>", cxx11}, #line 178 "std-name-hint.gperf" - {"allocator", "<memory>", cxx98}, -#line 133 "std-name-hint.gperf" - {"hexfloat", "<ios>", cxx11}, -#line 117 "std-name-hint.gperf" - {"showpos", "<ios>", cxx98}, -#line 170 "std-name-hint.gperf" - {"flush_emit", "<ostream>", cxx20}, -#line 250 "std-name-hint.gperf" - {"tuple_cat", "<tuple>", cxx11}, -#line 179 "std-name-hint.gperf" - {"allocator_traits", "<memory>", cxx11}, -#line 191 "std-name-hint.gperf" - {"recursive_timed_mutex", "<mutex>", cxx11}, -#line 108 "std-name-hint.gperf" - {"put_time", "<iomanip>", cxx11}, -#line 210 "std-name-hint.gperf" - {"priority_queue", "<queue>", cxx98}, -#line 190 "std-name-hint.gperf" - {"recursive_mutex", "<mutex>", cxx11}, -#line 232 "std-name-hint.gperf" - {"string", "<string>", cxx98}, -#line 107 "std-name-hint.gperf" - {"get_time", "<iomanip>", cxx11}, -#line 223 "std-name-hint.gperf" + {"inserter", "<iterator>", cxx98}, +#line 324 "std-name-hint.gperf" {"basic_ostringstream", "<sstream>", cxx98}, -#line 73 "std-name-hint.gperf" - {"basic_filebuf", "<fstream>", cxx98}, -#line 272 "std-name-hint.gperf" +#line 333 "std-name-hint.gperf" + {"wostringstream", "<sstream>", cxx98}, +#line 334 "std-name-hint.gperf" + {"wstringbuf", "<sstream>", cxx98}, +#line 280 "std-name-hint.gperf" + {"endl", "<ostream>", cxx98}, +#line 327 "std-name-hint.gperf" + {"istringstream", "<sstream>", cxx98}, +#line 328 "std-name-hint.gperf" + {"istringstream", "<sstream>", cxx98}, +#line 453 "std-name-hint.gperf" + {"index_sequence_for", "<utility>", cxx14}, +#line 181 "std-name-hint.gperf" + {"iterator_traits", "<iterator>", cxx98}, +#line 370 "std-name-hint.gperf" + {"to_wstring", "<string>", cxx17}, +#line 275 "std-name-hint.gperf" + {"make_optional", "<optional>", cxx17}, +#line 257 "std-name-hint.gperf" + {"launder", "<new>", cxx17}, +#line 429 "std-name-hint.gperf" {"unordered_map", "<unordered_map>", cxx11}, -#line 121 "std-name-hint.gperf" - {"uppercase", "<ios>", cxx98}, -#line 273 "std-name-hint.gperf" +#line 419 "std-name-hint.gperf" + {"remove_cvref_t", "<type_traits>", cxx20}, +#line 329 "std-name-hint.gperf" + {"ostringstream", "<sstream>", cxx98}, +#line 430 "std-name-hint.gperf" {"unordered_multimap", "<unordered_map>", cxx11}, -#line 182 "std-name-hint.gperf" +#line 388 "std-name-hint.gperf" + {"make_error_code", "<system_error>", cxx11}, +#line 413 "std-name-hint.gperf" + {"enable_if_t", "<type_traits>", cxx14}, +#line 163 "std-name-hint.gperf" + {"cout", "<iostream>", cxx98}, +#line 167 "std-name-hint.gperf" + {"wcout", "<iostream>", cxx98}, +#line 389 "std-name-hint.gperf" + {"make_error_condition", "<system_error>", cxx11}, +#line 394 "std-name-hint.gperf" + {"thread", "<thread>", cxx11}, +#line 369 "std-name-hint.gperf" + {"to_string", "<string>", cxx17}, +#line 165 "std-name-hint.gperf" + {"wcin", "<iostream>", cxx98}, +#line 243 "std-name-hint.gperf" + {"lock", "<mutex>", cxx11}, +#line 251 "std-name-hint.gperf" + {"try_lock", "<mutex>", cxx11}, +#line 237 "std-name-hint.gperf" + {"pmr::pool_options", "<memory_resource>", cxx17}, +#line 435 "std-name-hint.gperf" + {"as_const", "<utility>", cxx17}, +#line 463 "std-name-hint.gperf" + {"to_underlying", "<utility>", cxx23}, +#line 116 "std-name-hint.gperf" + {"unwrap_reference_t", "<functional>", cxx20}, +#line 427 "std-name-hint.gperf" + {"bad_typeid", "<typeinfo>", cxx98}, +#line 115 "std-name-hint.gperf" + {"unwrap_reference", "<functional>", cxx20}, +#line 172 "std-name-hint.gperf" + {"advance", "<iterator>", cxx98}, +#line 308 "std-name-hint.gperf" + {"span", "<span>", cxx20}, +#line 234 "std-name-hint.gperf" + {"pmr::monotonic_buffer_resource", "<memory_resource>", cxx17}, +#line 297 "std-name-hint.gperf" + {"counting_semaphore", "<semaphore>", cxx20}, +#line 150 "std-name-hint.gperf" + {"oct", "<ios>", cxx98}, +#line 289 "std-name-hint.gperf" + {"queue", "<queue>", cxx98}, +#line 160 "std-name-hint.gperf" + {"cerr", "<iostream>", cxx98}, +#line 176 "std-name-hint.gperf" + {"end", "<iterator>", cxx11}, +#line 189 "std-name-hint.gperf" + {"list", "<list>", cxx98}, +#line 385 "std-name-hint.gperf" + {"is_error_code_enum_v", "<system_error>", cxx17}, +#line 418 "std-name-hint.gperf" + {"remove_cvref", "<type_traits>", cxx20}, +#line 387 "std-name-hint.gperf" + {"is_error_condition_enum_v", "<system_error>", cxx17}, +#line 240 "std-name-hint.gperf" + {"pmr::unsynchronized_pool_resource", "<memory_resource>", cxx17}, +#line 382 "std-name-hint.gperf" + {"error_condition", "<system_error>", cxx11}, +#line 224 "std-name-hint.gperf" + {"uninitialized_construct_using_allocator", "<memory>", cxx20}, +#line 94 "std-name-hint.gperf" + {"forward_list", "<forward_list>", cxx11}, +#line 412 "std-name-hint.gperf" + {"enable_if", "<type_traits>", cxx11}, +#line 221 "std-name-hint.gperf" {"shared_ptr", "<memory>", cxx11}, -#line 42 "std-name-hint.gperf" - {"any", "<any>", cxx17}, -#line 175 "std-name-hint.gperf" - {"multimap", "<map>", cxx98}, -#line 46 "std-name-hint.gperf" - {"array", "<array>", cxx11}, -#line 136 "std-name-hint.gperf" - {"cin", "<iostream>", cxx98}, -#line 238 "std-name-hint.gperf" - {"basic_string_view", "<string_view>", cxx17}, -#line 168 "std-name-hint.gperf" +#line 195 "std-name-hint.gperf" + {"align", "<memory>", cxx11}, +#line 451 "std-name-hint.gperf" + {"in_range", "<utility>", cxx20}, +#line 60 "std-name-hint.gperf" + {"strong_ordering", "<compare>", cxx20}, +#line 348 "std-name-hint.gperf" + {"underflow_error", "<stdexcept>", cxx98}, +#line 272 "std-name-hint.gperf" + {"numbers::sqrt2_v", "<numbers>", cxx20}, +#line 273 "std-name-hint.gperf" + {"numbers::sqrt3_v", "<numbers>", cxx20}, +#line 89 "std-name-hint.gperf" + {"terminate", "<exception>", cxx98}, +#line 201 "std-name-hint.gperf" + {"allocator_traits", "<memory>", cxx11}, +#line 384 "std-name-hint.gperf" + {"is_error_code_enum", "<system_error>", cxx11}, +#line 194 "std-name-hint.gperf" + {"addressof", "<memory>", cxx11}, +#line 386 "std-name-hint.gperf" + {"is_error_condition_enum", "<system_error>", cxx11}, +#line 421 "std-name-hint.gperf" + {"type_identity_t", "<type_traits>", cxx20}, +#line 331 "std-name-hint.gperf" + {"stringstream", "<sstream>", cxx98}, +#line 279 "std-name-hint.gperf" {"emit_on_flush", "<ostream>", cxx20}, +#line 437 "std-name-hint.gperf" + {"cmp_greater", "<utility>", cxx20}, +#line 343 "std-name-hint.gperf" + {"logic_error", "<stdexcept>", cxx98}, +#line 130 "std-name-hint.gperf" + {"setfill", "<iomanip>", cxx98}, +#line 332 "std-name-hint.gperf" + {"wistringstream", "<sstream>", cxx98}, +#line 164 "std-name-hint.gperf" + {"wcerr", "<iostream>", cxx98}, +#line 225 "std-name-hint.gperf" + {"unique_ptr", "<memory>", cxx11}, +#line 374 "std-name-hint.gperf" + {"wstring", "<string>", cxx98}, +#line 270 "std-name-hint.gperf" + {"numbers::phi_v", "<numbers>", cxx20}, +#line 236 "std-name-hint.gperf" + {"pmr::polymorphic_allocator", "<memory_resource>", cxx17}, +#line 211 "std-name-hint.gperf" + {"enable_shared_from_this", "<memory>", cxx11}, +#line 377 "std-name-hint.gperf" + {"string_view", "<string_view>", cxx17}, +#line 354 "std-name-hint.gperf" + {"basic_streambuf", "<streambuf>", cxx98}, #line 180 "std-name-hint.gperf" - {"make_shared", "<memory>", cxx11}, -#line 44 "std-name-hint.gperf" + {"istreambuf_iterator", "<iterator>", cxx98}, +#line 245 "std-name-hint.gperf" + {"mutex", "<mutex>", cxx11}, +#line 45 "std-name-hint.gperf" {"make_any", "<any>", cxx17}, -#line 172 "std-name-hint.gperf" - {"list", "<list>", cxx98}, -#line 226 "std-name-hint.gperf" - {"ostringstream", "<sstream>", cxx98}, -#line 47 "std-name-hint.gperf" - {"to_array", "<array>", cxx20}, -#line 150 "std-name-hint.gperf" - {"distance", "<iterator>", cxx98}, -#line 197 "std-name-hint.gperf" - {"lock_guard", "<mutex>", cxx11}, -#line 111 "std-name-hint.gperf" - {"boolalpha", "<ios>", cxx98}, -#line 59 "std-name-hint.gperf" - {"strong_ordering", "<compare>", cxx20}, -#line 196 "std-name-hint.gperf" - {"try_lock", "<mutex>", cxx11}, -#line 267 "std-name-hint.gperf" - {"disjunction", "<type_traits>", cxx17}, -#line 268 "std-name-hint.gperf" - {"disjunction_v", "<type_traits>", cxx17}, +#line 424 "std-name-hint.gperf" + {"type_index", "<typeindex>", cxx11}, +#line 204 "std-name-hint.gperf" + {"const_pointer_cast", "<memory>", cxx11}, +#line 359 "std-name-hint.gperf" + {"char_traits", "<string>", cxx98}, +#line 132 "std-name-hint.gperf" + {"setprecision", "<iomanip>", cxx98}, +#line 203 "std-name-hint.gperf" + {"bad_weak_ptr", "<memory>", cxx11}, +#line 317 "std-name-hint.gperf" + {"spanbuf", "<spanstream>", cxx23}, +#line 414 "std-name-hint.gperf" + {"invoke_result", "<type_traits>", cxx17}, +#line 104 "std-name-hint.gperf" + {"bind", "<functional>", cxx11}, +#line 415 "std-name-hint.gperf" + {"invoke_result_t", "<type_traits>", cxx17}, +#line 185 "std-name-hint.gperf" + {"ostreambuf_iterator", "<iterator>", cxx98}, +#line 161 "std-name-hint.gperf" + {"cin", "<iostream>", cxx98}, +#line 436 "std-name-hint.gperf" + {"cmp_equal", "<utility>", cxx20}, +#line 198 "std-name-hint.gperf" + {"allocator", "<memory>", cxx98}, +#line 162 "std-name-hint.gperf" + {"clog", "<iostream>", cxx98}, +#line 441 "std-name-hint.gperf" + {"cmp_not_equal", "<utility>", cxx20}, +#line 291 "std-name-hint.gperf" + {"ranges::enable_borrowed_range", "<ranges>", cxx20}, +#line 282 "std-name-hint.gperf" + {"flush", "<ostream>", cxx98}, +#line 254 "std-name-hint.gperf" + {"bad_alloc", "<new>", cxx98}, +#line 457 "std-name-hint.gperf" + {"make_pair", "<utility>", cxx98}, +#line 318 "std-name-hint.gperf" + {"spanstream", "<spanstream>", cxx23}, #line 67 "std-name-hint.gperf" - {"byte", "<cstddef>", cxx17}, -#line 115 "std-name-hint.gperf" - {"showpoint", "<ios>", cxx98}, -#line 64 "std-name-hint.gperf" {"condition_variable", "<condition_variable>", cxx11}, -#line 129 "std-name-hint.gperf" - {"hex", "<ios>", cxx98}, -#line 141 "std-name-hint.gperf" - {"wcout", "<iostream>", cxx98}, -#line 222 "std-name-hint.gperf" - {"basic_istringstream", "<sstream>", cxx98}, -#line 169 "std-name-hint.gperf" - {"noemit_on_flush", "<ostream>", cxx20}, #line 125 "std-name-hint.gperf" - {"internal", "<ios>", cxx98}, -#line 140 "std-name-hint.gperf" - {"wcin", "<iostream>", cxx98}, -#line 234 "std-name-hint.gperf" - {"u8string", "<string>", cxx20}, -#line 56 "std-name-hint.gperf" - {"strong_equality", "<compare>", cxx20}, + {"put_money", "<iomanip>", cxx11}, +#line 44 "std-name-hint.gperf" + {"any_cast", "<any>", cxx17}, +#line 468 "std-name-hint.gperf" + {"monostate", "<variant>", cxx17}, #line 62 "std-name-hint.gperf" - {"complex_literals", "<complex>", cxx14}, -#line 194 "std-name-hint.gperf" - {"lock", "<mutex>", cxx11}, -#line 189 "std-name-hint.gperf" - {"timed_mutex", "<mutex>", cxx11}, -#line 231 "std-name-hint.gperf" - {"basic_string", "<string>", cxx98}, -#line 96 "std-name-hint.gperf" + {"weak_ordering", "<compare>", cxx20}, +#line 233 "std-name-hint.gperf" + {"pmr::memory_resource", "<memory_resource>", cxx17}, +#line 206 "std-name-hint.gperf" + {"default_delete", "<memory>", cxx11}, +#line 138 "std-name-hint.gperf" + {"fixed", "<ios>", cxx98}, +#line 86 "std-name-hint.gperf" + {"exception", "<exception>", cxx98}, +#line 192 "std-name-hint.gperf" + {"multimap", "<map>", cxx98}, +#line 302 "std-name-hint.gperf" + {"shared_lock", "<shared_mutex>", cxx14}, +#line 448 "std-name-hint.gperf" + {"in_place_t", "<utility>", cxx17}, +#line 445 "std-name-hint.gperf" + {"in_place", "<utility>", cxx17}, +#line 345 "std-name-hint.gperf" + {"overflow_error", "<stdexcept>", cxx98}, +#line 256 "std-name-hint.gperf" + {"hardware_destructive_interference_size", "<new>", cxx17}, +#line 447 "std-name-hint.gperf" + {"in_place_index_t", "<utility>", cxx17}, +#line 166 "std-name-hint.gperf" + {"wclog", "<iostream>", cxx98}, +#line 109 "std-name-hint.gperf" + {"invoke_r", "<functional>", cxx23}, +#line 88 "std-name-hint.gperf" + {"make_exception_ptr", "<exception>", cxx11}, +#line 344 "std-name-hint.gperf" + {"out_of_range", "<stdexcept>", cxx98}, +#line 252 "std-name-hint.gperf" + {"unique_lock", "<mutex>", cxx11}, +#line 244 "std-name-hint.gperf" + {"lock_guard", "<mutex>", cxx11}, +#line 212 "std-name-hint.gperf" + {"get_deleter", "<memory>", cxx11}, +#line 438 "std-name-hint.gperf" + {"cmp_greater_equal", "<utility>", cxx20}, +#line 464 "std-name-hint.gperf" + {"unreachable", "<utility>", cxx23}, +#line 135 "std-name-hint.gperf" + {"boolalpha", "<ios>", cxx98}, +#line 120 "std-name-hint.gperf" {"packaged_task", "<future>", cxx11}, +#line 443 "std-name-hint.gperf" + {"exchange", "<utility>", cxx14}, +#line 85 "std-name-hint.gperf" + {"current_exception", "<exception>", cxx11}, +#line 136 "std-name-hint.gperf" + {"dec", "<ios>", cxx98}, +#line 292 "std-name-hint.gperf" + {"ranges::enable_view", "<ranges>", cxx20}, +#line 72 "std-name-hint.gperf" + {"uint_fast16_t", "<cstdint>", cxx11}, #line 239 "std-name-hint.gperf" - {"string_view", "<string_view>", cxx17}, -#line 225 "std-name-hint.gperf" - {"istringstream", "<sstream>", cxx98}, -#line 198 "std-name-hint.gperf" - {"unique_lock", "<mutex>", cxx11}, -#line 263 "std-name-hint.gperf" - {"type_identity_t", "<type_traits>", cxx20}, -#line 216 "std-name-hint.gperf" - {"shared_mutex", "<shared_mutex>", cxx17}, -#line 265 "std-name-hint.gperf" + {"pmr::synchronized_pool_resource", "<memory_resource>", cxx17}, +#line 228 "std-name-hint.gperf" + {"uses_allocator_v", "<memory>", cxx17}, +#line 227 "std-name-hint.gperf" + {"uses_allocator_construction_args", "<memory>", cxx20}, +#line 114 "std-name-hint.gperf" + {"unwrap_ref_decay_t", "<functional>", cxx20}, +#line 74 "std-name-hint.gperf" + {"uint_fast64_t", "<cstdint>", cxx11}, +#line 53 "std-name-hint.gperf" + {"atomic_uintmax_t", "<atomic>", cxx20}, +#line 286 "std-name-hint.gperf" + {"wostream", "<ostream>", cxx98}, +#line 73 "std-name-hint.gperf" + {"uint_fast32_t", "<cstdint>", cxx11}, +#line 320 "std-name-hint.gperf" + {"wospanstream", "<spanstream>", cxx23}, +#line 80 "std-name-hint.gperf" + {"uintmax_t", "<cstdint>", cxx11}, +#line 123 "std-name-hint.gperf" + {"get_money", "<iomanip>", cxx11}, +#line 52 "std-name-hint.gperf" + {"atomic_signed_lock_free", "<atomic>", cxx11}, +#line 246 "std-name-hint.gperf" + {"once_flag", "<mutex>", cxx11}, +#line 128 "std-name-hint.gperf" + {"resetiosflags", "<iomanip>", cxx98}, +#line 219 "std-name-hint.gperf" + {"pointer_traits", "<memory>", cxx11}, +#line 397 "std-name-hint.gperf" + {"forward_as_tuple", "<tuple>", cxx11}, +#line 248 "std-name-hint.gperf" + {"recursive_timed_mutex", "<mutex>", cxx11}, +#line 118 "std-name-hint.gperf" + {"async", "<future>", cxx11}, +#line 226 "std-name-hint.gperf" + {"uses_allocator", "<memory>", cxx11}, +#line 51 "std-name-hint.gperf" + {"atomic_ref", "<atomic>", cxx20}, +#line 127 "std-name-hint.gperf" + {"quoted", "<iomanip>", cxx14}, +#line 152 "std-name-hint.gperf" + {"scientific", "<ios>", cxx98}, +#line 50 "std-name-hint.gperf" + {"atomic", "<atomic>", cxx11}, +#line 408 "std-name-hint.gperf" {"conjunction", "<type_traits>", cxx17}, -#line 266 "std-name-hint.gperf" +#line 255 "std-name-hint.gperf" + {"hardware_constructive_interference_size", "<new>", cxx17}, +#line 444 "std-name-hint.gperf" + {"forward", "<utility>", cxx11}, +#line 409 "std-name-hint.gperf" {"conjunction_v", "<type_traits>", cxx17}, -#line 217 "std-name-hint.gperf" - {"shared_timed_mutex", "<shared_mutex>", cxx14}, -#line 102 "std-name-hint.gperf" - {"setfill", "<iomanip>", cxx98}, -#line 236 "std-name-hint.gperf" - {"u32string", "<string>", cxx11}, -#line 235 "std-name-hint.gperf" - {"u16string", "<string>", cxx11}, -#line 278 "std-name-hint.gperf" +#line 92 "std-name-hint.gperf" + {"expected", "<expected>", cxx23}, +#line 249 "std-name-hint.gperf" + {"scoped_lock", "<mutex>", cxx17}, +#line 342 "std-name-hint.gperf" + {"length_error", "<stdexcept>", cxx98}, +#line 87 "std-name-hint.gperf" + {"exception_ptr", "<exception>", cxx11}, +#line 341 "std-name-hint.gperf" + {"invalid_argument", "<stdexcept>", cxx98}, +#line 247 "std-name-hint.gperf" + {"recursive_mutex", "<mutex>", cxx11}, +#line 137 "std-name-hint.gperf" + {"defaultfloat", "<ios>", cxx11}, +#line 101 "std-name-hint.gperf" + {"ifstream", "<fstream>", cxx98}, +#line 461 "std-name-hint.gperf" + {"piecewise_construct", "<utility>", cxx11}, +#line 390 "std-name-hint.gperf" + {"system_category", "<system_error>", cxx11}, +#line 462 "std-name-hint.gperf" + {"piecewise_construct_t", "<utility>", cxx11}, +#line 442 "std-name-hint.gperf" {"declval", "<utility>", cxx11}, -#line 91 "std-name-hint.gperf" - {"unwrap_ref_decay", "<functional>", cxx20}, -#line 201 "std-name-hint.gperf" - {"make_optional", "<optional>", cxx17}, +#line 306 "std-name-hint.gperf" + {"source_location", "<source_location>", cxx20}, +#line 454 "std-name-hint.gperf" + {"integer_sequence", "<utility>", cxx14}, +#line 208 "std-name-hint.gperf" + {"destroy_at", "<memory>", cxx20}, +#line 294 "std-name-hint.gperf" + {"scoped_allocator_adaptor", "<scoped_allocator>", cxx11}, +#line 209 "std-name-hint.gperf" + {"destroy_n", "<memory>", cxx20}, +#line 210 "std-name-hint.gperf" + {"dynamic_pointer_cast", "<memory>", cxx11}, +#line 102 "std-name-hint.gperf" + {"ofstream", "<fstream>", cxx98}, +#line 54 "std-name-hint.gperf" + {"atomic_unsigned_lock_free", "<atomic>", cxx11}, +#line 319 "std-name-hint.gperf" + {"wispanstream", "<spanstream>", cxx23}, +#line 58 "std-name-hint.gperf" + {"partial_ordering", "<compare>", cxx20}, +#line 218 "std-name-hint.gperf" + {"owner_less", "<memory>", cxx11}, +#line 392 "std-name-hint.gperf" + {"jthread", "<thread>", cxx20}, +#line 215 "std-name-hint.gperf" + {"make_shared_for_overwrite", "<memory>", cxx20}, +#line 303 "std-name-hint.gperf" + {"shared_mutex", "<shared_mutex>", cxx17}, +#line 205 "std-name-hint.gperf" + {"construct_at", "<memory>", cxx20}, +#line 175 "std-name-hint.gperf" + {"distance", "<iterator>", cxx98}, +#line 304 "std-name-hint.gperf" + {"shared_timed_mutex", "<shared_mutex>", cxx14}, +#line 410 "std-name-hint.gperf" + {"disjunction", "<type_traits>", cxx17}, +#line 158 "std-name-hint.gperf" + {"uppercase", "<ios>", cxx98}, +#line 411 "std-name-hint.gperf" + {"disjunction_v", "<type_traits>", cxx17}, +#line 47 "std-name-hint.gperf" + {"array", "<array>", cxx11}, +#line 284 "std-name-hint.gperf" + {"noemit_on_flush", "<ostream>", cxx20}, +#line 65 "std-name-hint.gperf" + {"complex_literals", "<complex>", cxx14}, +#line 340 "std-name-hint.gperf" + {"domain_error", "<stdexcept>", cxx98}, #line 200 "std-name-hint.gperf" - {"optional", "<optional>", cxx17}, -#line 84 "std-name-hint.gperf" + {"allocator_arg_t", "<memory>", cxx11}, +#line 141 "std-name-hint.gperf" + {"internal", "<ios>", cxx98}, +#line 75 "std-name-hint.gperf" + {"uint_fast8_t", "<cstdint>", cxx11}, +#line 296 "std-name-hint.gperf" + {"binary_semaphore", "<semaphore>", cxx20}, +#line 140 "std-name-hint.gperf" + {"hexfloat", "<ios>", cxx11}, +#line 107 "std-name-hint.gperf" {"hash", "<functional>", cxx11}, -#line 166 "std-name-hint.gperf" - {"flush", "<ostream>", cxx98}, -#line 206 "std-name-hint.gperf" - {"flush", "<ostream>", cxx98}, -#line 244 "std-name-hint.gperf" - {"apply", "<tuple>", cxx17}, +#line 420 "std-name-hint.gperf" + {"type_identity", "<type_traits>", cxx20}, +#line 197 "std-name-hint.gperf" + {"allocate_shared_for_overwrite", "<memory>", cxx20}, +#line 350 "std-name-hint.gperf" + {"stop_callback", "<stop_token>", cxx20}, +#line 139 "std-name-hint.gperf" + {"hex", "<ios>", cxx98}, +#line 48 "std-name-hint.gperf" + {"to_array", "<array>", cxx20}, +#line 380 "std-name-hint.gperf" + {"error_category", "<system_error>", cxx11}, +#line 440 "std-name-hint.gperf" + {"cmp_less_equal", "<utility>", cxx20}, +#line 43 "std-name-hint.gperf" + {"any", "<any>", cxx17}, +#line 68 "std-name-hint.gperf" + {"condition_variable_any", "<condition_variable>", cxx11}, +#line 383 "std-name-hint.gperf" + {"generic_category", "<system_error>", cxx11}, +#line 450 "std-name-hint.gperf" + {"in_place_type_t", "<utility>", cxx17}, +#line 449 "std-name-hint.gperf" + {"in_place_type", "<utility>", cxx17}, +#line 446 "std-name-hint.gperf" + {"in_place_index", "<utility>", cxx17}, +#line 467 "std-name-hint.gperf" + {"holds_alternative", "<variant>", cxx17}, +#line 199 "std-name-hint.gperf" + {"allocator_arg", "<memory>", cxx11}, +#line 90 "std-name-hint.gperf" + {"uncaught_exceptions", "<exception>", cxx17}, +#line 214 "std-name-hint.gperf" + {"make_shared", "<memory>", cxx11}, +#line 113 "std-name-hint.gperf" + {"unwrap_ref_decay", "<functional>", cxx20}, +#line 59 "std-name-hint.gperf" + {"strong_equality", "<compare>", cxx20}, +#line 202 "std-name-hint.gperf" + {"assume_aligned", "<memory>", cxx20}, #line 61 "std-name-hint.gperf" - {"complex", "<complex>", cxx98}, -#line 242 "std-name-hint.gperf" + {"weak_equality", "<compare>", cxx20}, +#line 393 "std-name-hint.gperf" {"this_thread", "<thread>", cxx11}, -#line 177 "std-name-hint.gperf" +#line 250 "std-name-hint.gperf" + {"timed_mutex", "<mutex>", cxx11}, +#line 277 "std-name-hint.gperf" + {"optional", "<optional>", cxx17}, +#line 196 "std-name-hint.gperf" {"allocate_shared", "<memory>", cxx11}, -#line 132 "std-name-hint.gperf" - {"scientific", "<ios>", cxx98}, -#line 192 "std-name-hint.gperf" - {"once_flag", "<mutex>", cxx11}, -#line 106 "std-name-hint.gperf" - {"put_money", "<iomanip>", cxx11}, -#line 105 "std-name-hint.gperf" - {"get_money", "<iomanip>", cxx11}, -#line 195 "std-name-hint.gperf" - {"scoped_lock", "<mutex>", cxx17}, -#line 58 "std-name-hint.gperf" - {"weak_ordering", "<compare>", cxx20}, -#line 55 "std-name-hint.gperf" - {"weak_equality", "<compare>", cxx20}, -#line 215 "std-name-hint.gperf" - {"shared_lock", "<shared_mutex>", cxx14}, -#line 50 "std-name-hint.gperf" - {"atomic_flag", "<atomic>", cxx11}, -#line 142 "std-name-hint.gperf" - {"wclog", "<iostream>", cxx98}, -#line 65 "std-name-hint.gperf" - {"condition_variable_any", "<condition_variable>", cxx11}, -#line 139 "std-name-hint.gperf" - {"clog", "<iostream>", cxx98}, -#line 262 "std-name-hint.gperf" - {"type_identity", "<type_traits>", cxx20}, -#line 233 "std-name-hint.gperf" - {"wstring", "<string>", cxx98}, -#line 57 "std-name-hint.gperf" - {"partial_ordering", "<compare>", cxx20} +#line 207 "std-name-hint.gperf" + {"destroy", "<memory>", cxx20}, +#line 396 "std-name-hint.gperf" + {"apply", "<tuple>", cxx17}, +#line 64 "std-name-hint.gperf" + {"complex", "<complex>", cxx98}, +#line 143 "std-name-hint.gperf" + {"noboolalpha", "<ios>", cxx98} }; static const short lookup[] = { -1, -1, -1, -1, -1, -1, -1, -1, - -1, 0, -1, -1, -1, 1, -1, 2, - -1, 3, -1, -228, -1, 6, -201, -2, - -1, 7, 8, -1, 9, -1, -1, -1, - -1, -1, -1, 10, 11, -1, -1, 12, - -1, 13, -1, 14, 15, -1, 16, -1, - 17, -1, -1, 18, 19, 20, -1, 21, - -1, 22, -1, -1, 23, 24, -287, -1, - 27, 28, 29, 30, 31, -1, 32, -1, - 33, 34, 35, 36, 37, -1, 38, -1, - 39, -180, -2, -1, -1, -1, 40, -1, - 41, -1, -1, -1, -1, 42, 43, -1, - 44, 45, 46, -1, 47, -1, 48, 49, - 50, 51, 52, 53, -1, -1, 54, -1, - -1, 55, 56, 57, 58, -1, 59, -1, - 60, 61, -1, 62, -1, 63, 64, -1, - 65, -1, -1, -1, 66, -1, -1, 67, - 68, 69, 70, -1, -1, 71, -1, -1, - 72, -1, 73, -1, -1, 74, 75, -1, - -1, 76, -1, 77, 78, 79, -1, 80, - 81, -1, -1, -1, -1, 82, -1, -1, - 83, -1, -1, 84, -1, 85, 86, 87, - -1, 88, 89, -1, 90, -1, -1, 91, - 92, 93, -1, 94, 95, 96, -1, 97, - -403, 100, 101, -1, 102, -107, -2, 103, - -1, -1, -1, 104, 105, 106, 107, -1, - -1, -1, -1, 108, -1, 109, 110, 111, - 112, 113, 114, 115, -1, -1, 116, 117, - -1, -1, -1, 118, 119, 120, -1, -1, - -1, -1, 121, -1, 122, -1, 123, 124, - 125, 126, -1, 127, 128, -1, -1, -1, - 129, -1, -1, -1, -1, 130, 131, -1, - -1, -1, 132, -1, 133, -1, 134, 135, - 136, -1, -1, -1, 137, -1, 138, -1, - -1, 139, -1, -1, 140, 141, -1, -1, - -1, -1, 142, 143, -1, -1, -1, 144, - 145, -1, -1, -1, -1, 146, 147, 148, - -1, -1, 149, -1, -1, 150, 151, 152, - 153, -1, -1, 154, 155, -1, -1, -1, - -1, 156, 157, 158, 159, 160, 161, -1, - -1, -1, -1, -1, 162, -1, -1, -1, - -1, -1, -1, 163, 164, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 165, 166, 167, -1, -1, -1, - 168, 169, -1, -1, 170, -1, -1, 171, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 172, -1, -1, -1, - 173, 174, 175, -1, -1, -1, -1, 176, - 177, -1, -1, -1, -1, 178, -1, -1, - -1, 179, -1, 180, -1, -1, -1, -1, - -1, 181, -1, -1, -1, -1, 182, -1, - -1, 183, -1, -1, -1, -620, -21, -2, - -1, -1, -1, -1, -1, -1, -1, -1, - 186, -1, -1, 187, -1, -1, -1, 188, - -1, 189, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 190, -1, 191, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 192, - -1, -1, -1, -1, 193, -1, -1, 194, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, 195, -1, -1, -1, 196, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - 197, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 198, -1, -1, -1, -1, - -1, -1, 199, -1, 200, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, 201, -1, -1, -1, -1, -1, -1, - -1, -1, 202, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 203, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 204 + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, 0, -1, 1, -1, -1, -1, -1, + -1, -1, -1, 2, -1, 3, 4, -1, + 5, -1, -1, 6, -1, -1, -1, -1, + -1, -1, -1, 7, -1, -1, 8, -1, + -1, -1, -1, 9, 10, -1, 11, 12, + 13, 14, 15, -1, -1, -1, -1, -1, + -1, -1, 16, -1, -1, 17, 18, -1, + 19, 20, -1, -1, -1, -1, -1, -1, + -1, 21, 22, 23, -1, -1, -474, -354, + -2, -1, -1, -1, -1, 26, -1, -1, + -1, 27, 28, -1, 29, -1, 30, -1, + 31, -1, -1, 32, 33, -1, 34, -1, + 35, 36, -1, -1, 37, 38, 39, 40, + -1, 41, -1, 42, -1, 43, -1, -1, + 44, -1, 45, 46, 47, -1, -1, -1, + 48, -1, -1, 49, 50, 51, -530, -326, + -2, 54, -1, -1, -1, -1, -1, -1, + -1, 55, 56, -1, 57, -1, -1, -1, + 58, 59, 60, -1, -1, 61, -1, -1, + -1, -1, 62, -1, -1, 63, -1, 64, + -1, 65, -1, -1, 66, 67, -1, 68, + -1, -1, 69, -1, -1, 70, 71, -1, + -1, -1, 72, -1, -1, 73, -1, -1, + -1, 74, -1, 75, 76, -1, -1, -1, + 77, -1, -1, 78, -1, 79, -1, -1, + -1, -1, 80, 81, 82, 83, -1, 84, + 85, -1, -1, -1, -649, -1, 88, 89, + 90, 91, -1, 92, 93, -637, 96, 97, + 98, 99, 100, 101, -1, 102, -1, 103, + -1, 104, -284, -2, 105, 106, 107, -1, + 108, -1, 109, -1, 110, 111, -292, -2, + 112, 113, 114, -1, -1, -1, -1, 115, + -1, 116, 117, -1, 118, -1, 119, -1, + 120, -1, -1, 121, -1, -1, -1, -1, + -1, -1, -1, 122, -1, -1, -1, -1, + 123, -1, -1, 124, -1, 125, -1, 126, + 127, -1, -1, -1, 128, -1, 129, -1, + -1, -1, -1, -1, 130, 131, -1, -1, + -1, -1, 132, -1, -1, -1, 133, -1, + -1, 134, -1, -1, -1, -1, -1, -1, + 135, -1, 136, 137, 138, 139, 140, -1, + -1, -1, 141, -1, -1, 142, -1, -1, + -1, -1, 143, -1, -1, 144, -1, 145, + -1, 146, 147, 148, -1, -1, -1, -1, + -1, -1, 149, 150, -1, -1, -1, 151, + -1, -1, -1, 152, -1, 153, -1, -775, + -1, 156, -1, 157, -224, -2, 158, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 159, -1, -1, + -1, 160, 161, 162, -1, 163, -1, 164, + -1, -1, -1, -1, -1, -1, 165, 166, + 167, -1, 168, 169, 170, 171, 172, 173, + -1, 174, 175, 176, -1, -1, 177, -1, + 178, -1, 179, 180, 181, -1, 182, 183, + -1, -1, -1, -1, -1, 184, -1, 185, + -1, 186, -1, 187, 188, 189, 190, -1, + 191, -1, -1, 192, 193, -1, 194, 195, + -1, -1, 196, -1, 197, 198, -1, -1, + -1, -1, 199, 200, -1, 201, -1, 202, + -876, -175, -2, 205, -1, 206, -1, 207, + 208, -1, -1, -1, 209, -1, 210, -1, + 211, 212, 213, -1, 214, 215, 216, 217, + 218, -1, -1, -1, -1, -1, -1, 219, + -1, 220, -1, 221, -1, 222, 223, 224, + -1, -1, -1, 225, 226, 227, -1, -1, + -1, -1, -1, -1, -1, -1, 228, 229, + -1, -1, 230, 231, -1, 232, -1, -1, + -1, -1, 233, 234, 235, 236, -1, -1, + -1, 237, -1, 238, 239, -1, 240, 241, + 242, -1, -1, 243, -1, -1, -1, -1, + -1, 244, -1, 245, -1, 246, 247, 248, + -1, -1, -1, -1, -1, 249, 250, 251, + 252, -1, -1, 253, 254, 255, -1, 256, + 257, -1, -1, 258, -1, 259, -1, -1, + 260, -1, 261, -1, -1, -1, -1, 262, + 263, -1, -1, -1, -1, -1, -1, -1, + 264, 265, -1, -1, -1, -1, 266, -1, + -1, -1, -1, -1, -1, 267, 268, -1, + -1, -1, -1, -1, -1, -1, -1, 269, + -1, -1, -1, 270, 271, 272, -1, -1, + 273, -1, -1, -1, -1, -1, -1, -1, + -1, 274, -1, -1, -1, -1, -1, 275, + -1, -1, -1, 276, -1, -1, 277, -1, + 278, -1, -1, -1, -1, 279, 280, -1, + 281, -1, -1, -1, -1, -1, 282, 283, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, 284, -1, -1, 285, 286, 287, -1, + -1, -1, -1, -1, -1, -1, 288, -1, + -1, 289, 290, -1, -1, 291, -1, -1, + -1, -1, -1, -1, -1, -1, 292, 293, + 294, -1, 295, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 296, -1, 297, -1, + -1, -1, -1, -1, 298, 299, 300, -1, + 301, 302, -1, -1, 303, -1, 304, -1, + -1, 305, -1, -1, -1, -1, -1, -1, + 306, -1, 307, -1, -1, -1, -1, 308, + 309, -1, -1, -1, 310, -1, -1, 311, + 312, -1, 313, -1, -1, -1, -1, -1, + -1, -1, -1, 314, 315, 316, 317, -1, + -1, 318, -1, -1, 319, -1, -1, -1, + -1, -1, 320, -1, -1, -1, -1, -1, + -1, 321, 322, -1, -1, 323, 324, -1, + -1, 325, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 326, + -1, -1, -1, -1, -1, 327, -1, -1, + 328, 329, -1, 330, -1, -1, -1, -1, + -1, -1, -1, 331, -1, 332, -1, -1, + 333, 334, -1, 335, -1, -1, -1, -1, + -1, 336, -1, -1, -1, -1, 337, -1, + -1, -1, -1, -1, -1, 338, -1, 339, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 340, -1, -1, -1, 341, + -1, -1, 342, -1, -1, 343, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 344, + -1, -1, -1, -1, -1, -1, -1, -1, + 345, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 346, -1, + 347, 348, -1, 349, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 350, -1, -1, + -1, 351, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 352, -1, -1, 353, -1, + 354, -1, -1, -1, 355, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 356, -1, 357, -1, 358, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, 359, -1, -1, 360, -1, -1, -1, + -1, -1, -1, -1, 361, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 362, -1, -1, + -1, 363, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 364, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, 365, -1, -1, 366, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 367, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 368, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 369, 370, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, 371, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 372, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 373, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 374, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 375, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 376, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 377 }; if (len <= MAX_WORD_LENGTH && len >= MIN_WORD_LENGTH) diff --git a/gcc/cp/typeck.cc b/gcc/cp/typeck.cc index da0e142..16e7d85 100644 --- a/gcc/cp/typeck.cc +++ b/gcc/cp/typeck.cc @@ -8104,11 +8104,13 @@ maybe_warn_about_useless_cast (location_t loc, tree type, tree expr, if (warn_useless_cast && complain & tf_warning) { - if ((TYPE_REF_P (type) - && (TYPE_REF_IS_RVALUE (type) - ? xvalue_p (expr) : lvalue_p (expr)) - && same_type_p (TREE_TYPE (expr), TREE_TYPE (type))) - || same_type_p (TREE_TYPE (expr), type)) + if (TYPE_REF_P (type) + ? ((TYPE_REF_IS_RVALUE (type) + ? xvalue_p (expr) : lvalue_p (expr)) + && same_type_p (TREE_TYPE (expr), TREE_TYPE (type))) + /* Don't warn when converting a class object to a non-reference type, + because that's a common way to create a temporary. */ + : (!glvalue_p (expr) && same_type_p (TREE_TYPE (expr), type))) warning_at (loc, OPT_Wuseless_cast, "useless cast to type %q#T", type); } diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 6cba2a8..3a1d4a5 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -7055,6 +7055,16 @@ Enable/disable the generation of the WIDEKL instructions. @cindex @code{target("avxvnni")} function attribute, x86 Enable/disable the generation of the AVXVNNI instructions. +@item avxifma +@itemx no-avxifma +@cindex @code{target("avxifma")} function attribute, x86 +Enable/disable the generation of the AVXIFMA instructions. + +@item avxvnniint8 +@itemx no-avxvnniint8 +@cindex @code{target("avxvnniint8")} function attribute, x86 +Enable/disable the generation of the AVXVNNIINT8 instructions. + @item cld @itemx no-cld @cindex @code{target("cld")} function attribute, x86 @@ -21920,6 +21930,9 @@ AMD Family 19h CPU. @item znver3 AMD Family 19h Zen version 3. +@item znver4 +AMD Family 19h Zen version 4. + @item x86-64 Baseline x86-64 microarchitecture level (as defined in x86-64 psABI). diff --git a/gcc/doc/gty.texi b/gcc/doc/gty.texi index 81aafd1..4f791b3 100644 --- a/gcc/doc/gty.texi +++ b/gcc/doc/gty.texi @@ -196,7 +196,26 @@ static GTY((length("reg_known_value_size"))) rtx *reg_known_value; Note that the @code{length} option is only meant for use with arrays of non-atomic objects, that is, objects that contain pointers pointing to other GTY-managed objects. For other GC-allocated arrays and strings -you should use @code{atomic}. +you should use @code{atomic} or @code{string_length}. + +@findex string_length +@item string_length ("@var{expression}") + +In order to simplify production of PCH, a structure member that is a plain +array of bytes (an optionally @code{const} and/or @code{unsigned} @code{char +*}) is treated specially by the infrastructure. Even if such an array has not +been allocated in GC-controlled memory, it will still be written properly into +a PCH. The machinery responsible for this needs to know the length of the +data; by default, the length is determined by calling @code{strlen} on the +pointer. The @code{string_length} option specifies an alternate way to +determine the length, such as by inspecting another struct member: + +@smallexample +struct GTY(()) non_terminated_string @{ + size_t sz; + const char * GTY((string_length ("%h.sz"))) data; +@}; +@end smallexample @findex skip @item skip diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 1c0fe7d..4db4bcb 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1398,7 +1398,7 @@ See RS/6000 and PowerPC Options. -mavx5124fmaps -mavx512vnni -mavx5124vnniw -mprfchw -mrdpid @gol -mrdseed -msgx -mavx512vp2intersect -mserialize -mtsxldtrk@gol -mamx-tile -mamx-int8 -mamx-bf16 -muintr -mhreset -mavxvnni@gol --mavx512fp16 @gol +-mavx512fp16 -mavxifma -mavxvnniint8 @gol -mcldemote -mms-bitfields -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol -mkl -mwidekl @gol @@ -4513,7 +4513,18 @@ pointers after reallocation. @item -Wuseless-cast @r{(C++ and Objective-C++ only)} @opindex Wuseless-cast @opindex Wno-useless-cast -Warn when an expression is casted to its own type. +Warn when an expression is cast to its own type. This warning does not +occur when a class object is converted to a non-reference type as that +is a way to create a temporary: + +@smallexample +struct S @{ @}; +void g (S&&); +void f (S&& arg) +@{ + g (S(arg)); // make arg prvalue so that it can bind to S&& +@} +@end smallexample @item -Wno-conversion-null @r{(C++ and Objective-C++ only)} @opindex Wconversion-null @@ -32119,6 +32130,15 @@ MWAITX, SHA, CLZERO, AES, PCLMUL, CX16, MOVBE, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM, XSAVEC, XSAVES, CLFLUSHOPT, POPCNT, RDPID, WBNOINVD, PKU, VPCLMULQDQ, VAES, and 64-bit instruction set extensions.) +@item znver4 +AMD Family 19h core based CPUs with x86-64 instruction set support. (This +supersets BMI, BMI2, CLWB, F16C, FMA, FSGSBASE, AVX, AVX2, ADCX, RDSEED, +MWAITX, SHA, CLZERO, AES, PCLMUL, CX16, MOVBE, MMX, SSE, SSE2, SSE3, SSE4A, +SSSE3, SSE4.1, SSE4.2, ABM, XSAVEC, XSAVES, CLFLUSHOPT, POPCNT, RDPID, +WBNOINVD, PKU, VPCLMULQDQ, VAES, AVX512F, AVX512DQ, AVX512IFMA, AVX512CD, +AVX512BW, AVX512VL, AVX512BF16, AVX512VBMI, AVX512VBMI2, AVX512VNNI, +AVX512BITALG, AVX512VPOPCNTDQ, GFNI and 64-bit instruction set extensions.) + @item btver1 CPUs based on AMD Family 14h cores with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, CX16, ABM and 64-bit @@ -32851,6 +32871,12 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @need 200 @itemx -mwidekl @opindex mwidekl +@need 200 +@itemx -mavxifma +@opindex mavxifma +@need 200 +@itemx -mavxvnniint8 +@opindex mavxvnniint8 These switches enable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, SSE4, SSE4A, SSE4.1, SSE4.2, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD, AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA, AVX512VBMI, SHA, @@ -32860,9 +32886,9 @@ WBNOINVD, FMA4, PREFETCHW, RDPID, PREFETCHWT1, RDSEED, SGX, XOP, LWP, XSAVEOPT, XSAVEC, XSAVES, RTM, HLE, TBM, MWAITX, CLZERO, PKU, AVX512VBMI2, GFNI, VAES, WAITPKG, VPCLMULQDQ, AVX512BITALG, MOVDIRI, MOVDIR64B, AVX512BF16, ENQCMD, AVX512VPOPCNTDQ, AVX5124FMAPS, AVX512VNNI, AVX5124VNNIW, SERIALIZE, -UINTR, HRESET, AMXTILE, AMXINT8, AMXBF16, KL, WIDEKL, AVXVNNI, AVX512FP16 -or CLDEMOTE extended instruction sets. Each has a corresponding -@option{-mno-} option to disable use of these instructions. +UINTR, HRESET, AMXTILE, AMXINT8, AMXBF16, KL, WIDEKL, AVXVNNI, AVX512FP16, +AVXIFMA, AVXVNNIINT8 or CLDEMOTE extended instruction sets. Each has a +corresponding @option{-mno-} option to disable use of these instructions. These extensions are also available as built-in functions: see @ref{x86 Built-in Functions}, for details of the functions enabled and diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index c81e2ff..e21a1d3 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -2490,6 +2490,12 @@ Target supports the execution of @code{avx512f} instructions. @item avx512vp2intersect Target supports the execution of @code{avx512vp2intersect} instructions. +@item avxifma +Target supports the execution of @code{avxifma} instructions. + +@item avxvnniint8 +Target supports the execution of @code{avxvnniint8} instructions. + @item amx_tile Target supports the execution of @code{amx-tile} instructions. diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 80f12c6e..ab1810e 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,10 @@ +2022-10-20 Harald Anlauf <anlauf@gmx.de> + Steven G. Kargl <kargl@gcc.gnu.org> + + PR fortran/105633 + * expr.cc (find_array_section): Move check for NULL pointers so + that both subscript triplets and vector subscripts are covered. + 2022-10-17 Steve Kargl <kargl@gcc.gnu.org> PR fortran/104330 diff --git a/gcc/fortran/expr.cc b/gcc/fortran/expr.cc index 290ddf3..69d0b57 100644 --- a/gcc/fortran/expr.cc +++ b/gcc/fortran/expr.cc @@ -1552,6 +1552,12 @@ find_array_section (gfc_expr *expr, gfc_ref *ref) lower = ref->u.ar.as->lower[d]; upper = ref->u.ar.as->upper[d]; + if (!lower || !upper) + { + t = false; + goto cleanup; + } + if (ref->u.ar.dimen_type[d] == DIMEN_VECTOR) /* Vector subscript. */ { gfc_constructor *ci; @@ -1594,9 +1600,7 @@ find_array_section (gfc_expr *expr, gfc_ref *ref) { if ((begin && begin->expr_type != EXPR_CONSTANT) || (finish && finish->expr_type != EXPR_CONSTANT) - || (step && step->expr_type != EXPR_CONSTANT) - || !lower - || !upper) + || (step && step->expr_type != EXPR_CONSTANT)) { t = false; goto cleanup; diff --git a/gcc/gengtype.cc b/gcc/gengtype.cc index 4236343..28bf05e 100644 --- a/gcc/gengtype.cc +++ b/gcc/gengtype.cc @@ -2403,7 +2403,7 @@ struct write_types_data enum write_types_kinds kind; }; -static void output_escaped_param (struct walk_type_data *d, +static void output_escaped_param (const struct walk_type_data *d, const char *, const char *); static void output_mangled_typename (outf_p, const_type_p); static void walk_type (type_p t, struct walk_type_data *d); @@ -2537,7 +2537,7 @@ output_mangled_typename (outf_p of, const_type_p t) print error messages. */ static void -output_escaped_param (struct walk_type_data *d, const char *param, +output_escaped_param (const struct walk_type_data *d, const char *param, const char *oname) { const char *p; @@ -2576,7 +2576,7 @@ const char * get_string_option (options_p opt, const char *key) { for (; opt; opt = opt->next) - if (strcmp (opt->name, key) == 0) + if (opt->kind == OPTION_STRING && strcmp (opt->name, key) == 0) return opt->info.string; return NULL; } @@ -2700,6 +2700,8 @@ walk_type (type_p t, struct walk_type_data *d) ; else if (strcmp (oo->name, "callback") == 0) ; + else if (strcmp (oo->name, "string_length") == 0) + ; else error_at_line (d->line, "unknown option `%s'\n", oo->name); @@ -3251,7 +3253,22 @@ write_types_process_field (type_p f, const struct walk_type_data *d) { oprintf (d->of, "%*sgt_%s_", d->indent, "", wtd->prefix); output_mangled_typename (d->of, f); - oprintf (d->of, " (%s%s);\n", cast, d->val); + + /* Check if we need to call the special pch note version + for strings that takes an explicit length. */ + const auto length_override + = (f->kind == TYPE_STRING && !strcmp (wtd->prefix, "pch_n") + ? get_string_option (d->opt, "string_length") + : nullptr); + if (length_override) + { + oprintf (d->of, "2 (%s%s, ", cast, d->val); + output_escaped_param (d, length_override, "string_length"); + } + else + oprintf (d->of, " (%s%s", cast, d->val); + + oprintf (d->of, ");\n"); if (d->reorder_fn && wtd->reorder_note_routine) oprintf (d->of, "%*s%s (%s%s, %s%s, %s);\n", d->indent, "", wtd->reorder_note_routine, cast, d->val, cast, d->val, diff --git a/gcc/ggc-common.cc b/gcc/ggc-common.cc index 8b3389e..62da09d 100644 --- a/gcc/ggc-common.cc +++ b/gcc/ggc-common.cc @@ -253,7 +253,8 @@ static vec<void *> reloc_addrs_vec; int gt_pch_note_object (void *obj, void *note_ptr_cookie, - gt_note_pointers note_ptr_fn) + gt_note_pointers note_ptr_fn, + size_t length_override) { struct ptr_data **slot; @@ -273,7 +274,9 @@ gt_pch_note_object (void *obj, void *note_ptr_cookie, (*slot)->obj = obj; (*slot)->note_ptr_fn = note_ptr_fn; (*slot)->note_ptr_cookie = note_ptr_cookie; - if (note_ptr_fn == gt_pch_p_S) + if (length_override != (size_t)-1) + (*slot)->size = length_override; + else if (note_ptr_fn == gt_pch_p_S) (*slot)->size = strlen ((const char *)obj) + 1; else (*slot)->size = ggc_get_size (obj); @@ -44,7 +44,8 @@ typedef void (*gt_handle_reorder) (void *, void *, gt_pointer_operator, void *); /* Used by the gt_pch_n_* routines. Register an object in the hash table. */ -extern int gt_pch_note_object (void *, void *, gt_note_pointers); +extern int gt_pch_note_object (void *, void *, gt_note_pointers, + size_t length_override = (size_t)-1); /* Used by the gt_pch_p_* routines. Register address of a callback pointer. */ @@ -101,6 +102,7 @@ extern int ggc_marked_p (const void *); /* PCH and GGC handling for strings, mostly trivial. */ extern void gt_pch_n_S (const void *); +extern void gt_pch_n_S2 (const void *, size_t); extern void gt_ggc_m_S (const void *); /* End of GTY machinery API. */ diff --git a/gcc/gimple-range-cache.cc b/gcc/gimple-range-cache.cc index 0b9aa36..f279371 100644 --- a/gcc/gimple-range-cache.cc +++ b/gcc/gimple-range-cache.cc @@ -1546,7 +1546,6 @@ ranger_cache::range_from_dom (vrange &r, tree name, basic_block start_bb, void ranger_cache::apply_inferred_ranges (gimple *s) { - int_range_max r; bool update = true; basic_block bb = gimple_bb (s); @@ -1572,6 +1571,7 @@ ranger_cache::apply_inferred_ranges (gimple *s) m_exit.add_range (name, bb, infer.range (x)); if (update) { + Value_Range r (TREE_TYPE (name)); if (!m_on_entry.get_bb_range (r, name, bb)) exit_range (r, name, bb, RFD_READ_ONLY); if (r.intersect (infer.range (x))) diff --git a/gcc/gimple-range-gori.h b/gcc/gimple-range-gori.h index c7a3216..6cc533b 100644 --- a/gcc/gimple-range-gori.h +++ b/gcc/gimple-range-gori.h @@ -165,15 +165,15 @@ public: bool has_edge_range_p (tree name, basic_block bb = NULL); bool has_edge_range_p (tree name, edge e); void dump (FILE *f); + bool compute_operand_range (vrange &r, gimple *stmt, const vrange &lhs, + tree name, class fur_source &src, + value_relation *rel = NULL); private: bool refine_using_relation (tree op1, vrange &op1_range, tree op2, vrange &op2_range, fur_source &src, relation_kind k); bool may_recompute_p (tree name, edge e); bool may_recompute_p (tree name, basic_block bb = NULL); - bool compute_operand_range (vrange &r, gimple *stmt, const vrange &lhs, - tree name, class fur_source &src, - value_relation *rel = NULL); bool compute_operand_range_switch (vrange &r, gswitch *s, const vrange &lhs, tree name, fur_source &src); bool compute_operand1_range (vrange &r, gimple_range_op_handler &handler, diff --git a/gcc/gimple-range-infer.cc b/gcc/gimple-range-infer.cc index f0d66d0..010b34a 100644 --- a/gcc/gimple-range-infer.cc +++ b/gcc/gimple-range-infer.cc @@ -35,6 +35,7 @@ along with GCC; see the file COPYING3. If not see #include "gimple-iterator.h" #include "gimple-walk.h" #include "cfganal.h" +#include "tree-dfa.h" // Adapted from infer_nonnull_range_by_dereference and check_loadstore // to process nonnull ssa_name OP in S. DATA contains a pointer to a @@ -56,6 +57,54 @@ non_null_loadstore (gimple *, tree op, tree, void *data) return false; } +// Process an ASSUME call to see if there are any inferred ranges available. + +void +gimple_infer_range::check_assume_func (gcall *call) +{ + tree arg; + unsigned i; + tree assume_id = TREE_OPERAND (gimple_call_arg (call, 0), 0); + if (!assume_id) + return; + struct function *fun = DECL_STRUCT_FUNCTION (assume_id); + if (!fun) + return; + // Loop over arguments, matching them to the assume paramters. + for (arg = DECL_ARGUMENTS (assume_id), i = 1; + arg && i < gimple_call_num_args (call); + i++, arg = DECL_CHAIN (arg)) + { + tree op = gimple_call_arg (call, i); + tree type = TREE_TYPE (op); + if (gimple_range_ssa_p (op) && Value_Range::supports_type_p (type)) + { + tree default_def = ssa_default_def (fun, arg); + if (!default_def || type != TREE_TYPE (default_def)) + continue; + // Query the global range of the default def in the assume function. + Value_Range assume_range (type); + global_ranges.range_of_expr (assume_range, default_def); + // If there is a non-varying result, add it as an inferred range. + if (!assume_range.varying_p ()) + { + add_range (op, assume_range); + if (dump_file) + { + print_generic_expr (dump_file, assume_id, TDF_SLIM); + fprintf (dump_file, " assume inferred range of "); + print_generic_expr (dump_file, op, TDF_SLIM); + fprintf (dump_file, " (param "); + print_generic_expr (dump_file, arg, TDF_SLIM); + fprintf (dump_file, ") = "); + assume_range.dump (dump_file); + fputc ('\n', dump_file); + } + } + } + } +} + // Add NAME and RANGE to the range inference summary. void @@ -111,6 +160,11 @@ gimple_infer_range::gimple_infer_range (gimple *s) // Fallthru and walk load/store ops now. } + // Check for inferred ranges from ASSUME calls. + if (is_a<gcall *> (s) && gimple_call_internal_p (s) + && gimple_call_internal_fn (s) == IFN_ASSUME) + check_assume_func (as_a<gcall *> (s)); + // Look for possible non-null values. if (flag_delete_null_pointer_checks && gimple_code (s) != GIMPLE_ASM && !gimple_clobber_p (s)) diff --git a/gcc/gimple-range-infer.h b/gcc/gimple-range-infer.h index 468b7d11..adfe1fd 100644 --- a/gcc/gimple-range-infer.h +++ b/gcc/gimple-range-infer.h @@ -40,6 +40,7 @@ public: void add_range (tree name, vrange &range); void add_nonzero (tree name); private: + void check_assume_func (gcall *call); unsigned num_args; static const int size_limit = 10; tree m_names[size_limit]; diff --git a/gcc/gimple-range.cc b/gcc/gimple-range.cc index d67d649..0584397 100644 --- a/gcc/gimple-range.cc +++ b/gcc/gimple-range.cc @@ -645,3 +645,193 @@ disable_ranger (struct function *fun) delete fun->x_range_query; fun->x_range_query = NULL; } + +// ------------------------------------------------------------------------ + +// If there is a non-varying value associated with NAME, return true and the +// range in R. + +bool +assume_query::assume_range_p (vrange &r, tree name) +{ + if (global.get_global_range (r, name)) + return !r.varying_p (); + return false; +} + +// Query used by GORI to pick up any known value on entry to a block. + +bool +assume_query::range_of_expr (vrange &r, tree expr, gimple *stmt) +{ + if (!gimple_range_ssa_p (expr)) + return get_tree_range (r, expr, stmt); + + if (!global.get_global_range (r, expr)) + r.set_varying (TREE_TYPE (expr)); + return true; +} + +// If the current function returns an integral value, and has a single return +// statement, it will calculate any SSA_NAMES is can determine ranges forr +// assuming the function returns 1. + +assume_query::assume_query () +{ + basic_block exit_bb = EXIT_BLOCK_PTR_FOR_FN (cfun); + if (single_pred_p (exit_bb)) + { + basic_block bb = single_pred (exit_bb); + gimple_stmt_iterator gsi = gsi_last_nondebug_bb (bb); + if (gsi_end_p (gsi)) + return; + gimple *s = gsi_stmt (gsi); + if (!is_a<greturn *> (s)) + return; + greturn *gret = as_a<greturn *> (s); + tree op = gimple_return_retval (gret); + if (!gimple_range_ssa_p (op)) + return; + tree lhs_type = TREE_TYPE (op); + if (!irange::supports_p (lhs_type)) + return; + + unsigned prec = TYPE_PRECISION (lhs_type); + int_range<2> lhs_range (lhs_type, wi::one (prec), wi::one (prec)); + global.set_global_range (op, lhs_range); + + gimple *def = SSA_NAME_DEF_STMT (op); + if (!def || gimple_get_lhs (def) != op) + return; + fur_stmt src (gret, this); + calculate_stmt (def, lhs_range, src); + } +} + +// Evaluate operand OP on statement S, using the provided LHS range. +// If successful, set the range in the global table, then visit OP's def stmt. + +void +assume_query::calculate_op (tree op, gimple *s, vrange &lhs, fur_source &src) +{ + Value_Range op_range (TREE_TYPE (op)); + if (m_gori.compute_operand_range (op_range, s, lhs, op, src) + && !op_range.varying_p ()) + { + Value_Range range (TREE_TYPE (op)); + if (global.get_global_range (range, op)) + op_range.intersect (range); + global.set_global_range (op, op_range); + gimple *def_stmt = SSA_NAME_DEF_STMT (op); + if (def_stmt && gimple_get_lhs (def_stmt) == op) + calculate_stmt (def_stmt, op_range, src); + } +} + +// Evaluate PHI statement, using the provided LHS range. +// Check each constant argument predecessor if it can be taken +// provide LHS to any symbolic argmeuents, and process their def statements. + +void +assume_query::calculate_phi (gphi *phi, vrange &lhs_range, fur_source &src) +{ + for (unsigned x= 0; x < gimple_phi_num_args (phi); x++) + { + tree arg = gimple_phi_arg_def (phi, x); + Value_Range arg_range (TREE_TYPE (arg)); + if (gimple_range_ssa_p (arg)) + { + // A symbol arg will be the LHS value. + arg_range = lhs_range; + range_cast (arg_range, TREE_TYPE (arg)); + if (!global.get_global_range (arg_range, arg)) + { + global.set_global_range (arg, arg_range); + gimple *def_stmt = SSA_NAME_DEF_STMT (arg); + if (def_stmt && gimple_get_lhs (def_stmt) == arg) + calculate_stmt (def_stmt, arg_range, src); + } + } + else if (get_tree_range (arg_range, arg, NULL)) + { + // If this is a constant value that differs from LHS, this + // edge cannot be taken. + arg_range.intersect (lhs_range); + if (arg_range.undefined_p ()) + continue; + // Otherwise check the condition feeding this edge. + edge e = gimple_phi_arg_edge (phi, x); + check_taken_edge (e, src); + } + } +} + +// If an edge is known to be taken, examine the outgoing edge to see +// if it carries any range information that can also be evaluated. + +void +assume_query::check_taken_edge (edge e, fur_source &src) +{ + gimple *stmt = gimple_outgoing_range_stmt_p (e->src); + if (stmt && is_a<gcond *> (stmt)) + { + int_range<2> cond; + gcond_edge_range (cond, e); + calculate_stmt (stmt, cond, src); + } +} + +// Evaluate statement S which produces range LHS_RANGE. + +void +assume_query::calculate_stmt (gimple *s, vrange &lhs_range, fur_source &src) +{ + gimple_range_op_handler handler (s); + if (handler) + { + tree op = gimple_range_ssa_p (handler.operand1 ()); + if (op) + calculate_op (op, s, lhs_range, src); + op = gimple_range_ssa_p (handler.operand2 ()); + if (op) + calculate_op (op, s, lhs_range, src); + } + else if (is_a<gphi *> (s)) + { + calculate_phi (as_a<gphi *> (s), lhs_range, src); + // Don't further check predecessors of blocks with PHIs. + return; + } + + // Even if the walk back terminates before the top, if this is a single + // predecessor block, see if the predecessor provided any ranges to get here. + if (single_pred_p (gimple_bb (s))) + check_taken_edge (single_pred_edge (gimple_bb (s)), src); +} + +// Show everything that was calculated. + +void +assume_query::dump (FILE *f) +{ + fprintf (f, "Assumption details calculated:\n"); + for (unsigned i = 0; i < num_ssa_names; i++) + { + tree name = ssa_name (i); + if (!name || !gimple_range_ssa_p (name)) + continue; + tree type = TREE_TYPE (name); + if (!Value_Range::supports_type_p (type)) + continue; + + Value_Range assume_range (type); + if (assume_range_p (assume_range, name)) + { + print_generic_expr (f, name, TDF_SLIM); + fprintf (f, " -> "); + assume_range.dump (f); + fputc ('\n', f); + } + } + fprintf (f, "------------------------------\n"); +} diff --git a/gcc/gimple-range.h b/gcc/gimple-range.h index 8b2ff56..4800bfb 100644 --- a/gcc/gimple-range.h +++ b/gcc/gimple-range.h @@ -80,4 +80,22 @@ extern gimple_ranger *enable_ranger (struct function *m, bool use_imm_uses = true); extern void disable_ranger (struct function *); +class assume_query : public range_query +{ +public: + assume_query (); + bool assume_range_p (vrange &r, tree name); + virtual bool range_of_expr (vrange &r, tree expr, gimple * = NULL); + void dump (FILE *f); +protected: + void calculate_stmt (gimple *s, vrange &lhs_range, fur_source &src); + void calculate_op (tree op, gimple *s, vrange &lhs, fur_source &src); + void calculate_phi (gphi *phi, vrange &lhs_range, fur_source &src); + void check_taken_edge (edge e, fur_source &src); + + ssa_global_cache global; + gori_compute m_gori; +}; + + #endif // GCC_GIMPLE_RANGE_H diff --git a/gcc/ipa-visibility.cc b/gcc/ipa-visibility.cc index 8a27e7b..3ed2b7c 100644 --- a/gcc/ipa-visibility.cc +++ b/gcc/ipa-visibility.cc @@ -873,6 +873,25 @@ function_and_variable_visibility (bool whole_program) } } + if (symtab->state >= IPA_SSA) + { + FOR_EACH_VARIABLE (vnode) + { + tree decl = vnode->decl; + + /* Upgrade TLS access model based on optimized visibility status, + unless it was specified explicitly or no references remain. */ + if (DECL_THREAD_LOCAL_P (decl) + && !lookup_attribute ("tls_model", DECL_ATTRIBUTES (decl)) + && vnode->ref_list.referring.length ()) + { + enum tls_model new_model = decl_default_tls_model (decl); + gcc_checking_assert (new_model >= decl_tls_model (decl)); + set_decl_tls_model (decl, new_model); + } + } + } + if (dump_file) { fprintf (dump_file, "\nMarking local functions:"); diff --git a/gcc/match.pd b/gcc/match.pd index d07c0e4..194ba8f 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -8118,7 +8118,16 @@ and, vec_perm_indices sel2 (builder2, 2, nelts); tree op0 = NULL_TREE; - if (can_vec_perm_const_p (result_mode, op_mode, sel2, false)) + /* If the new VEC_PERM_EXPR can't be handled but both + original VEC_PERM_EXPRs can, punt. + If one or both of the original VEC_PERM_EXPRs can't be + handled and the new one can't be either, don't increase + number of VEC_PERM_EXPRs that can't be handled. */ + if (can_vec_perm_const_p (result_mode, op_mode, sel2, false) + || (single_use (@0) + ? (!can_vec_perm_const_p (result_mode, op_mode, sel0, false) + || !can_vec_perm_const_p (result_mode, op_mode, sel1, false)) + : !can_vec_perm_const_p (result_mode, op_mode, sel1, false))) op0 = vec_perm_indices_to_tree (TREE_TYPE (@4), sel2); } (if (op0) diff --git a/gcc/passes.cc b/gcc/passes.cc index 3bbf525..347214e 100644 --- a/gcc/passes.cc +++ b/gcc/passes.cc @@ -1559,7 +1559,7 @@ pass_manager::register_pass (struct register_pass_info *pass_info) compile () ipa_passes () -> all_small_ipa_passes -> Analysis of all_regular_ipa_passes - * possible LTO streaming at copmilation time * + * possible LTO streaming at compilation time * -> Execution of all_regular_ipa_passes * possible LTO streaming at link time * -> all_late_ipa_passes diff --git a/gcc/range-op-float.cc b/gcc/range-op-float.cc index e733479..8777bc70 100644 --- a/gcc/range-op-float.cc +++ b/gcc/range-op-float.cc @@ -166,20 +166,12 @@ range_operator_float::op1_op2_relation (const frange &lhs ATTRIBUTE_UNUSED) cons return VREL_VARYING; } -// Return TRUE if OP1 is known to be free of NANs. +// Return TRUE if OP1 and OP2 may be a NAN. static inline bool -finite_operand_p (const frange &op1) +maybe_isnan (const frange &op1, const frange &op2) { - return flag_finite_math_only || !op1.maybe_isnan (); -} - -// Return TRUE if OP1 and OP2 are known to be free of NANs. - -static inline bool -finite_operands_p (const frange &op1, const frange &op2) -{ - return flag_finite_math_only || (!op1.maybe_isnan () && !op2.maybe_isnan ()); + return op1.maybe_isnan () || op2.maybe_isnan (); } // Floating version of relop_early_resolve that takes into account NAN @@ -196,7 +188,7 @@ frelop_early_resolve (irange &r, tree type, // We can fold relations from the oracle when we know both operands // are free of NANs, or when -ffinite-math-only. - return (finite_operands_p (op1, op2) + return (!maybe_isnan (op1, op2) && relop_early_resolve (r, type, op1, op2, rel, my_rel)); } @@ -239,7 +231,9 @@ frange_add_zeros (frange &r, tree type) } } -// Build a range that is <= VAL and store it in R. +// Build a range that is <= VAL and store it in R. Return TRUE if +// further changes may be needed for R, or FALSE if R is in its final +// form. static bool build_le (frange &r, tree type, const frange &val) @@ -255,7 +249,9 @@ build_le (frange &r, tree type, const frange &val) return true; } -// Build a range that is < VAL and store it in R. +// Build a range that is < VAL and store it in R. Return TRUE if +// further changes may be needed for R, or FALSE if R is in its final +// form. static bool build_lt (frange &r, tree type, const frange &val) @@ -277,7 +273,9 @@ build_lt (frange &r, tree type, const frange &val) return true; } -// Build a range that is >= VAL and store it in R. +// Build a range that is >= VAL and store it in R. Return TRUE if +// further changes may be needed for R, or FALSE if R is in its final +// form. static bool build_ge (frange &r, tree type, const frange &val) @@ -293,7 +291,9 @@ build_ge (frange &r, tree type, const frange &val) return true; } -// Build a range that is > VAL and store it in R. +// Build a range that is > VAL and store it in R. Return TRUE if +// further changes may be needed for R, or FALSE if R is in its final +// form. static bool build_gt (frange &r, tree type, const frange &val) @@ -383,7 +383,7 @@ foperator_equal::fold_range (irange &r, tree type, else r = range_false (type); } - else if (finite_operands_p (op1, op2)) + else if (!maybe_isnan (op1, op2)) { // If ranges do not intersect, we know the range is not equal, // otherwise we don't know anything for sure. @@ -433,7 +433,7 @@ foperator_equal::op1_range (frange &r, tree type, // If the result is false, the only time we know anything is // if OP2 is a constant. else if (op2.singleton_p () - || (finite_operand_p (op2) && op2.zero_p ())) + || (!op2.maybe_isnan () && op2.zero_p ())) { REAL_VALUE_TYPE tmp = op2.lower_bound (); r.set (type, tmp, tmp, VR_ANTI_RANGE); @@ -486,7 +486,7 @@ foperator_not_equal::fold_range (irange &r, tree type, else r = range_false (type); } - else if (finite_operands_p (op1, op2)) + else if (!maybe_isnan (op1, op2)) { // If ranges do not intersect, we know the range is not equal, // otherwise we don't know anything for sure. @@ -582,7 +582,7 @@ foperator_lt::fold_range (irange &r, tree type, if (op1.known_isnan () || op2.known_isnan ()) r = range_false (type); - else if (finite_operands_p (op1, op2)) + else if (!maybe_isnan (op1, op2)) { if (real_less (&op1.upper_bound (), &op2.lower_bound ())) r = range_true (type); @@ -698,7 +698,7 @@ foperator_le::fold_range (irange &r, tree type, if (op1.known_isnan () || op2.known_isnan ()) r = range_false (type); - else if (finite_operands_p (op1, op2)) + else if (!maybe_isnan (op1, op2)) { if (real_compare (LE_EXPR, &op1.upper_bound (), &op2.lower_bound ())) r = range_true (type); @@ -806,7 +806,7 @@ foperator_gt::fold_range (irange &r, tree type, if (op1.known_isnan () || op2.known_isnan ()) r = range_false (type); - else if (finite_operands_p (op1, op2)) + else if (!maybe_isnan (op1, op2)) { if (real_compare (GT_EXPR, &op1.lower_bound (), &op2.upper_bound ())) r = range_true (type); @@ -922,7 +922,7 @@ foperator_ge::fold_range (irange &r, tree type, if (op1.known_isnan () || op2.known_isnan ()) r = range_false (type); - else if (finite_operands_p (op1, op2)) + else if (!maybe_isnan (op1, op2)) { if (real_compare (GE_EXPR, &op1.lower_bound (), &op2.upper_bound ())) r = range_true (type); @@ -979,11 +979,8 @@ foperator_ge::op2_range (frange &r, tree type, // The TRUE side of NAN >= x is unreachable. if (op1.known_isnan ()) r.set_undefined (); - else - { - build_le (r, type, op1); - r.clear_nan (); - } + else if (build_le (r, type, op1)) + r.clear_nan (); break; case BRS_FALSE: @@ -1283,6 +1280,8 @@ foperator_abs::op1_range (frange &r, tree type, class foperator_unordered_lt : public range_operator_float { using range_operator_float::fold_range; + using range_operator_float::op1_range; + using range_operator_float::op2_range; public: bool fold_range (irange &r, tree type, const frange &op1, const frange &op2, @@ -1297,7 +1296,7 @@ public: return false; // The result is the same as the ordered version when the // comparison is true or when the operands cannot be NANs. - if (finite_operands_p (op1, op2) || r == range_true (type)) + if (!maybe_isnan (op1, op2) || r == range_true (type)) return true; else { @@ -1305,8 +1304,70 @@ public: return true; } } + bool op1_range (frange &r, tree type, + const irange &lhs, + const frange &op2, + relation_trio trio) const final override; + bool op2_range (frange &r, tree type, + const irange &lhs, + const frange &op1, + relation_trio trio) const final override; } fop_unordered_lt; +bool +foperator_unordered_lt::op1_range (frange &r, tree type, + const irange &lhs, + const frange &op2, + relation_trio) const +{ + switch (get_bool_state (r, lhs, type)) + { + case BRS_TRUE: + build_lt (r, type, op2); + break; + + case BRS_FALSE: + // A false UNORDERED_LT means both operands are !NAN, so it's + // impossible for op2 to be a NAN. + if (op2.known_isnan ()) + r.set_undefined (); + else if (build_ge (r, type, op2)) + r.clear_nan (); + break; + + default: + break; + } + return true; +} + +bool +foperator_unordered_lt::op2_range (frange &r, tree type, + const irange &lhs, + const frange &op1, + relation_trio) const +{ + switch (get_bool_state (r, lhs, type)) + { + case BRS_TRUE: + build_gt (r, type, op1); + break; + + case BRS_FALSE: + // A false UNORDERED_LT means both operands are !NAN, so it's + // impossible for op1 to be a NAN. + if (op1.known_isnan ()) + r.set_undefined (); + else if (build_le (r, type, op1)) + r.clear_nan (); + break; + + default: + break; + } + return true; +} + class foperator_unordered_le : public range_operator_float { using range_operator_float::fold_range; @@ -1326,7 +1387,7 @@ public: return false; // The result is the same as the ordered version when the // comparison is true or when the operands cannot be NANs. - if (finite_operands_p (op1, op2) || r == range_true (type)) + if (!maybe_isnan (op1, op2) || r == range_true (type)) return true; else { @@ -1354,8 +1415,12 @@ foperator_unordered_le::op1_range (frange &r, tree type, break; case BRS_FALSE: - build_gt (r, type, op2); - r.clear_nan (); + // A false UNORDERED_LE means both operands are !NAN, so it's + // impossible for op2 to be a NAN. + if (op2.known_isnan ()) + r.set_undefined (); + else if (build_gt (r, type, op2)) + r.clear_nan (); break; default: @@ -1378,8 +1443,12 @@ foperator_unordered_le::op2_range (frange &r, break; case BRS_FALSE: - build_lt (r, type, op1); - r.clear_nan (); + // A false UNORDERED_LE means both operands are !NAN, so it's + // impossible for op1 to be a NAN. + if (op1.known_isnan ()) + r.set_undefined (); + else if (build_lt (r, type, op1)) + r.clear_nan (); break; default: @@ -1407,7 +1476,7 @@ public: return false; // The result is the same as the ordered version when the // comparison is true or when the operands cannot be NANs. - if (finite_operands_p (op1, op2) || r == range_true (type)) + if (!maybe_isnan (op1, op2) || r == range_true (type)) return true; else { @@ -1437,8 +1506,12 @@ foperator_unordered_gt::op1_range (frange &r, break; case BRS_FALSE: - build_le (r, type, op2); - r.clear_nan (); + // A false UNORDERED_GT means both operands are !NAN, so it's + // impossible for op2 to be a NAN. + if (op2.known_isnan ()) + r.set_undefined (); + else if (build_le (r, type, op2)) + r.clear_nan (); break; default: @@ -1461,8 +1534,12 @@ foperator_unordered_gt::op2_range (frange &r, break; case BRS_FALSE: - build_ge (r, type, op1); - r.clear_nan (); + // A false UNORDERED_GT means both operands are !NAN, so it's + // impossible for op1 to be a NAN. + if (op1.known_isnan ()) + r.set_undefined (); + else if (build_ge (r, type, op1)) + r.clear_nan (); break; default: @@ -1490,7 +1567,7 @@ public: return false; // The result is the same as the ordered version when the // comparison is true or when the operands cannot be NANs. - if (finite_operands_p (op1, op2) || r == range_true (type)) + if (!maybe_isnan (op1, op2) || r == range_true (type)) return true; else { @@ -1520,8 +1597,12 @@ foperator_unordered_ge::op1_range (frange &r, break; case BRS_FALSE: - build_lt (r, type, op2); - r.clear_nan (); + // A false UNORDERED_GE means both operands are !NAN, so it's + // impossible for op2 to be a NAN. + if (op2.known_isnan ()) + r.set_undefined (); + else if (build_lt (r, type, op2)) + r.clear_nan (); break; default: @@ -1543,8 +1624,12 @@ foperator_unordered_ge::op2_range (frange &r, tree type, break; case BRS_FALSE: - build_gt (r, type, op1); - r.clear_nan (); + // A false UNORDERED_GE means both operands are !NAN, so it's + // impossible for op1 to be a NAN. + if (op1.known_isnan ()) + r.set_undefined (); + else if (build_gt (r, type, op1)) + r.clear_nan (); break; default: @@ -1572,7 +1657,7 @@ public: return false; // The result is the same as the ordered version when the // comparison is true or when the operands cannot be NANs. - if (finite_operands_p (op1, op2) || r == range_true (type)) + if (!maybe_isnan (op1, op2) || r == range_true (type)) return true; else { @@ -1609,10 +1694,17 @@ foperator_unordered_equal::op1_range (frange &r, tree type, break; case BRS_FALSE: - // The false side indictates !NAN and not equal. We can at least - // represent !NAN. - r.set_varying (type); - r.clear_nan (); + // A false UNORDERED_EQ means both operands are !NAN, so it's + // impossible for op2 to be a NAN. + if (op2.known_isnan ()) + r.set_undefined (); + else + { + // The false side indictates !NAN and not equal. We can at least + // represent !NAN. + r.set_varying (type); + r.clear_nan (); + } break; default: diff --git a/gcc/range.h b/gcc/range.h index 8138d6f..ba3a6b2 100644 --- a/gcc/range.h +++ b/gcc/range.h @@ -50,6 +50,8 @@ static inline int_range<1> range_true_and_false (tree type) { unsigned prec = TYPE_PRECISION (type); + if (prec == 1) + return int_range<2> (type); return int_range<2> (type, wi::zero (prec), wi::one (prec)); } diff --git a/gcc/stringpool.cc b/gcc/stringpool.cc index 57509d5..20dbef5 100644 --- a/gcc/stringpool.cc +++ b/gcc/stringpool.cc @@ -196,6 +196,13 @@ gt_pch_n_S (const void *x) >_pch_p_S); } +void +gt_pch_n_S2 (const void *x, size_t string_len) +{ + gt_pch_note_object (CONST_CAST (void *, x), CONST_CAST (void *, x), + >_pch_p_S, string_len); +} + /* User-callable entry point for marking string X. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 763e88a..a201268 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,175 @@ +2022-10-20 Harald Anlauf <anlauf@gmx.de> + Steven G. Kargl <kargl@gcc.gnu.org> + + PR fortran/105633 + * gfortran.dg/pr105633.f90: New test. + +2022-10-20 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> + Yvan ROUX <yvan.roux@foss.st.com> + + * lib/target-supports.exp + (check_effective_target_fenv_exceptions_double): New. + (check_effective_target_fenv_exceptions_long_double): New. + * gcc.dg/c2x-float-7.c: Split into 3 tests... + * gcc.dg/c2x-float-7a.c: Float part of c2x-float-7.c. + * gcc.dg/c2x-float-7b.c: Double part of c2x-float-7.c. + * gcc.dg/c2x-float-7c.c: Long double part of c2x-float-7.c. + * gcc.dg/pr95115.c: Switch to fenv_exceptions_double. + * gcc.dg/torture/float32x-nan-floath.c: Likewise. + * gcc.dg/torture/float32x-nan.c: Likewise. + * gcc.dg/torture/float64-nan-floath.c: Likewise. + * gcc.dg/torture/float64-nan.c: Likewise. + * gcc.dg/torture/inf-compare-1.c: Likewise. + * gcc.dg/torture/inf-compare-2.c: Likewise. + * gcc.dg/torture/inf-compare-3.c: Likewise. + * gcc.dg/torture/inf-compare-4.c: Likewise. + * gcc.dg/torture/inf-compare-5.c: Likewise. + * gcc.dg/torture/inf-compare-6.c: Likewise. + * gcc.dg/torture/inf-compare-7.c: Likewise. + * gcc.dg/torture/inf-compare-8.c: Likewise. + * gcc.dg/torture/pr52451.c: Likewise. + * gcc.dg/torture/pr82692.c: Likewise. + * gcc.dg/torture/inf-compare-1-float.c: New test. + * gcc.dg/torture/inf-compare-2-float.c: New test. + * gcc.dg/torture/inf-compare-3-float.c: New test. + * gcc.dg/torture/inf-compare-4-float.c: New test. + * gcc.dg/torture/inf-compare-5-float.c: New test. + * gcc.dg/torture/inf-compare-6-float.c: New test. + * gcc.dg/torture/inf-compare-7-float.c: New test. + * gcc.dg/torture/inf-compare-8-float.c: New test. + +2022-10-20 Patrick Palka <ppalka@redhat.com> + + * g++.dg/cpp2a/concepts-friend10.C: New test. + +2022-10-20 Artem Klimov <jakmobius@gmail.com> + Alexander Monakov <amonakov@gcc.gnu.org> + + PR middle-end/99619 + * gcc.dg/tls/vis-attr-gd.c: New test. + * gcc.dg/tls/vis-attr-hidden-gd.c: New test. + * gcc.dg/tls/vis-attr-hidden.c: New test. + * gcc.dg/tls/vis-flag-hidden-gd.c: New test. + * gcc.dg/tls/vis-flag-hidden.c: New test. + * gcc.dg/tls/vis-pragma-hidden-gd.c: New test. + * gcc.dg/tls/vis-pragma-hidden.c: New test. + +2022-10-20 Patrick Palka <ppalka@redhat.com> + + PR c++/102963 + * g++.dg/modules/concept-7_a.C: New test. + * g++.dg/modules/concept-7_b.C: New test. + +2022-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * gcc.dg/vect/pr107326.c: New test. + * gcc.dg/vect/vect-bitfield-read-7.c: New test. + +2022-10-20 Jakub Jelinek <jakub@redhat.com> + + * gcc.target/i386/pr107271.c: Add -Wno-psabi to dg-options. + * gcc.dg/debug/btf/btf-function-3.c: Likewise. + +2022-10-20 Richard Sandiford <richard.sandiford@arm.com> + + * gcc.target/aarch64/sve/acle/general/brka_1.c: Expect a separate + PTEST instruction. + * gcc.target/aarch64/sve/acle/general/brkb_1.c: Likewise. + +2022-10-20 Richard Sandiford <richard.sandiford@arm.com> + + * gcc.target/aarch64/sve/acle/general/brkn_1.c: Expect separate + PTEST instructions. + * gcc.target/aarch64/sve/acle/general/brkn_2.c: New test. + +2022-10-20 Richard Biener <rguenther@suse.de> + + PR c/107305 + PR c/107306 + * gcc.dg/gimplefe-error-15.c: New testcase. + +2022-10-20 Andrew MacLeod <amacleod@redhat.com> + + * g++.dg/cpp23/attr-assume-opt.C: New. + +2022-10-19 Joseph Myers <joseph@codesourcery.com> + + * gcc.dg/format/format.h (int_least8_t, int_least16_t) + (int_least32_t, int_least64_t, uint_least8_t, uint_least16_t) + (uint_least32_t, uint_least64_t, int_fast8_t, int_fast16_t) + (int_fast32_t, int_fast64_t, uint_fast8_t, uint_fast16_t) + (uint_fast32_t, uint_fast64_t): New typedefs. + * gcc.dg/format/c11-printf-1.c, gcc.dg/format/c11-scanf-1.c, + gcc.dg/format/c2x-printf-1.c, gcc.dg/format/c2x-scanf-1.c, + gcc.dg/format/ext-9.c: Add tests using wN and wfN length + modifiers. + +2022-10-19 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/105765 + * gcc.dg/analyzer/stdarg-1-ms_abi.c: New test, based on stdarg-1.c. + * gcc.dg/analyzer/stdarg-1-sysv_abi.c: Likewise. + +2022-10-19 Marek Polacek <polacek@redhat.com> + + PR c++/85043 + * g++.dg/warn/Wuseless-cast.C: Remove dg-warning. + * g++.dg/warn/Wuseless-cast3.C: New test. + +2022-10-19 Jakub Jelinek <jakub@redhat.com> + + * lib/g++-dg.exp (g++-dg-runtest): When using defaulted + std_list, if test has { dg-do * { target c++23 } } directive, + use { 23 } with which the test will run instead of { 98 14 17 20 } + which would make it UNSUPPORTED in all cases. + +2022-10-19 Jakub Jelinek <jakub@redhat.com> + + PR c/107311 + * gcc.dg/c2x-enum-1.c (enum e5): Expect e5a type inside of + enum to be int rather than long if long isn't wider than int. + +2022-10-19 Aldy Hernandez <aldyh@redhat.com> + + PR tree-optimization/107312 + * gcc.target/i386/pr107312.c: New test. + +2022-10-19 Lewis Hyatt <lhyatt@gmail.com> + + * g++.dg/pch/pch-string-nulls.C: New test. + * g++.dg/pch/pch-string-nulls.Hs: New test. + +2022-10-19 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/107206 + * g++.dg/tree-ssa/pr107206.C: New test. + +2022-10-19 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> + + * gcc.target/s390/pr106355.h: Common code for new tests. + * gcc.target/s390/pr106355-1.c: New test. + * gcc.target/s390/pr106355-2.c: New test. + * gcc.target/s390/pr106355-3.c: New test. + +2022-10-19 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/107262 + * gcc.dg/pr107262.c: New test. + +2022-10-19 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/106990 + * c-c++-common/ubsan/pr106990.c: New test. + +2022-10-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/106781 + * gcc.dg/pr106781.c: New testcase. + +2022-10-19 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/pr107271.c: New test. + 2022-10-18 Joseph Myers <joseph@codesourcery.com> PR c/107164 diff --git a/gcc/testsuite/g++.dg/cpp0x/dr2351-2.C b/gcc/testsuite/g++.dg/cpp0x/dr2351-2.C new file mode 100644 index 0000000..deb1718 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/dr2351-2.C @@ -0,0 +1,16 @@ +// DR2351 +// { dg-do compile { target c++11 } } + +void bar (int); + +template <typename T> +auto foo (T t) -> decltype (bar (t), void{}) +{ + return bar (t); +} + +int +main () +{ + foo (0); +} diff --git a/gcc/testsuite/g++.dg/cpp23/attr-assume-opt.C b/gcc/testsuite/g++.dg/cpp23/attr-assume-opt.C new file mode 100644 index 0000000..88d5e78 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp23/attr-assume-opt.C @@ -0,0 +1,42 @@ +// P1774R8 - Portable assumptions +// { dg-do compile { target c++11 } } +// { dg-options "-O2 -fdump-tree-vrp2" } +// Test the we can optimize based on conditions in assume. + +int +f1 (unsigned x, unsigned y, unsigned z) +{ + [[assume (x == 2 && y < 3 && z < 20)]]; + unsigned q = x + y + z; + if (q > 23) + return 0; + return 1; +} + + +int +f2 (int x, int y, int z) +{ + [[assume (x+12 == 14 && y >= 0 && y + 10 < 13 && z + 4 >= 4 && z - 2 < 18)]]; + unsigned q = x + y + z; + if (q*2 > 46) + return 0; + return 1; +} + +int +f3 (int x, int y, int z) +{ + [[assume (x + 12 == 14 && z / 2 > 0)]]; + [[assume (y >= 0 && z - 2 < 18)]]; + [[assume (y + 10 < 13 && z + 4 >= 2)]]; + int q = x + y + z; + if (q * 2 > 46) + return 0; + if (z < 0) + return 0; + return 1; +} + +/* { dg-final { scan-tree-dump-times "return 0" 0 "vrp2" } } */ +/* { dg-final { scan-tree-dump-times "return 1" 3 "vrp2" } } */ diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-friend10.C b/gcc/testsuite/g++.dg/cpp2a/concepts-friend10.C new file mode 100644 index 0000000..fc07120 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-friend10.C @@ -0,0 +1,24 @@ +// Verify we don't crash when matching constraints containing a +// TEMPLATE_ID_EXPR that names a template from the current instantiation. +// { dg-do compile { target c++20 } } + +template<class T> static constexpr bool False = false; + +template<class T> +struct A { + template<int N> static constexpr bool C = sizeof(T) > N; + friend constexpr void f(A) requires C<1> { } + friend constexpr void f(A) requires C<1> && False<T> { } +}; + +template<class T> +struct A<T*> { + template<int N> static constexpr bool D = sizeof(T) > N; + friend constexpr void g(A) requires D<1> { } + friend constexpr void g(A) requires D<1> && False<T> { } +}; + +int main() { + f(A<int>{}); + g(A<int*>{}); +} diff --git a/gcc/testsuite/g++.dg/modules/concept-7_a.C b/gcc/testsuite/g++.dg/modules/concept-7_a.C new file mode 100644 index 0000000..a39b31b --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/concept-7_a.C @@ -0,0 +1,7 @@ +// PR c++/102963 +// { dg-additional-options "-fmodules-ts -fconcepts" } +// { dg-module-cmi pr102963 } + +export module pr102963; + +export template<class T> concept C = __is_same(T, int); diff --git a/gcc/testsuite/g++.dg/modules/concept-7_b.C b/gcc/testsuite/g++.dg/modules/concept-7_b.C new file mode 100644 index 0000000..1f81208 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/concept-7_b.C @@ -0,0 +1,7 @@ +// PR c++/102963 +// { dg-additional-options "-fmodules-ts -fconcepts" } + +import pr102963; + +static_assert(C<int>); +static_assert(C<void>); // { dg-error "static assert" } diff --git a/gcc/testsuite/g++.dg/other/i386-2.C b/gcc/testsuite/g++.dg/other/i386-2.C index fba3d1a..ebd01fe 100644 --- a/gcc/testsuite/g++.dg/other/i386-2.C +++ b/gcc/testsuite/g++.dg/other/i386-2.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavx512fp16" } */ +/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavx512fp16 -mavxifma -mavxvnniint8" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, diff --git a/gcc/testsuite/g++.dg/other/i386-3.C b/gcc/testsuite/g++.dg/other/i386-3.C index 5cc0fa8..b66498f 100644 --- a/gcc/testsuite/g++.dg/other/i386-3.C +++ b/gcc/testsuite/g++.dg/other/i386-3.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavx512fp16" } */ +/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavx512fp16 -mavxifma -mavxvnniint8" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, diff --git a/gcc/testsuite/g++.dg/pch/pch-string-nulls.C b/gcc/testsuite/g++.dg/pch/pch-string-nulls.C new file mode 100644 index 0000000..dfeb21a --- /dev/null +++ b/gcc/testsuite/g++.dg/pch/pch-string-nulls.C @@ -0,0 +1,3 @@ +// { dg-do compile { target c++11 } } +#include "pch-string-nulls.H" +static_assert (X[4] == '[' && X[5] == '!' && X[6] == ']', "error"); diff --git a/gcc/testsuite/g++.dg/pch/pch-string-nulls.Hs b/gcc/testsuite/g++.dg/pch/pch-string-nulls.Hs Binary files differnew file mode 100644 index 0000000..02f4317 --- /dev/null +++ b/gcc/testsuite/g++.dg/pch/pch-string-nulls.Hs diff --git a/gcc/testsuite/g++.dg/warn/Wuseless-cast.C b/gcc/testsuite/g++.dg/warn/Wuseless-cast.C index 2fd6bc4..d7cb899 100644 --- a/gcc/testsuite/g++.dg/warn/Wuseless-cast.C +++ b/gcc/testsuite/g++.dg/warn/Wuseless-cast.C @@ -62,11 +62,11 @@ A prvalue(); void f() { - int n; + int n; - (int)(n); // { dg-warning "3:useless cast" } - static_cast<int>(n); // { dg-warning "3:useless cast" } - reinterpret_cast<int>(n); // { dg-warning "3:useless cast" } + (int)(n); + static_cast<int>(n); + reinterpret_cast<int>(n); (int*)(&n); // { dg-warning "3:useless cast" } const_cast<int*>(&n); // { dg-warning "3:useless cast" } @@ -100,8 +100,8 @@ void f() A a; - (A)(a); // { dg-warning "3:useless cast" } - static_cast<A>(a); // { dg-warning "3:useless cast" } + (A)(a); + static_cast<A>(a); (A*)(&a); // { dg-warning "3:useless cast" } const_cast<A*>(&a); // { dg-warning "3:useless cast" } diff --git a/gcc/testsuite/g++.dg/warn/Wuseless-cast3.C b/gcc/testsuite/g++.dg/warn/Wuseless-cast3.C new file mode 100644 index 0000000..43dd2eb --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wuseless-cast3.C @@ -0,0 +1,29 @@ +// PR c++/85043 +// { dg-do compile { target c++11 } } +// { dg-options "-Wuseless-cast" } + +struct S { int s; void bump () { s++; } }; + +void +foo () +{ + S s = { 1 }; + s.bump (); + S (s).bump (); // { dg-bogus "useless" } + ((S) s).bump (); // { dg-bogus "useless" } + static_cast<S> (s).bump (); // { dg-bogus "useless" } +} + +struct X { }; +void g(X&&); + +void +f (X&& arg) +{ + g(X(arg)); // { dg-bogus "useless" } + g(X(X{})); // { dg-warning "useless" } + g(static_cast<X&&>(arg)); + + int i = (int) 1; // { dg-warning "useless" } + const int &r = (int) i; // { dg-bogus "useless" } +} diff --git a/gcc/testsuite/g++.target/i386/mv29.C b/gcc/testsuite/g++.target/i386/mv29.C index c7723e3..a8dd8ac 100644 --- a/gcc/testsuite/g++.target/i386/mv29.C +++ b/gcc/testsuite/g++.target/i386/mv29.C @@ -49,6 +49,9 @@ int __attribute__ ((target("arch=znver3"))) foo () { return 9; } +int __attribute__ ((target("arch=znver4"))) foo () { + return 10; +} int main () { @@ -72,6 +75,8 @@ int main () assert (val == 8); else if (__builtin_cpu_is ("znver3")) assert (val == 9); + else if (__builtin_cpu_is ("znver4")) + assert (val == 10); else assert (val == 0); diff --git a/gcc/testsuite/gcc.dg/analyzer/stdarg-1-ms_abi.c b/gcc/testsuite/gcc.dg/analyzer/stdarg-1-ms_abi.c new file mode 100644 index 0000000..b0143a7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/stdarg-1-ms_abi.c @@ -0,0 +1,437 @@ +/* As per stdarg-1.c, but using the ms_abi versions of the builtins. */ + +/* { dg-do compile { target { x86_64-*-* && lp64 } } } */ + +#include "analyzer-decls.h" + +/* Unpacking a va_list. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_1 (int placeholder, ...) +{ + const char *s; + int i; + char c; + + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + i = __builtin_va_arg (ap, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + c = (char)__builtin_va_arg (ap, int); + __analyzer_eval (c == '@'); /* { dg-warning "TRUE" } */ + + __builtin_ms_va_end (ap); +} + +void test_1 (void) +{ + __analyzer_called_by_test_1 (42, "foo", 1066, '@'); +} + +/* Unpacking a va_list passed from an intermediate function. */ + +static void __attribute__((noinline)) +__analyzer_test_2_inner (__builtin_ms_va_list ap) +{ + const char *s; + int i; + char c; + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + i = __builtin_va_arg (ap, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + c = (char)__builtin_va_arg (ap, int); + __analyzer_eval (c == '@'); /* { dg-warning "TRUE" } */ +} + +static void __attribute__((noinline)) +__analyzer_test_2_middle (int placeholder, ...) +{ + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + __analyzer_test_2_inner (ap); + __builtin_ms_va_end (ap); +} + +void test_2 (void) +{ + __analyzer_test_2_middle (42, "foo", 1066, '@'); +} + +/* Not enough args. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_not_enough_args (int placeholder, ...) +{ + const char *s; + int i; + + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + i = __builtin_va_arg (ap, int); /* { dg-warning "'ap' has no more arguments \\(1 consumed\\) \\\[CWE-685\\\]" } */ + + __builtin_ms_va_end (ap); +} + +void test_not_enough_args (void) +{ + __analyzer_called_by_test_not_enough_args (42, "foo"); +} + +/* Not enough args, with an intermediate function. */ + +static void __attribute__((noinline)) +__analyzer_test_not_enough_args_2_inner (__builtin_ms_va_list ap) +{ + const char *s; + int i; + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + i = __builtin_va_arg (ap, int); /* { dg-warning "'ap' has no more arguments \\(1 consumed\\)" } */ +} + +static void __attribute__((noinline)) +__analyzer_test_not_enough_args_2_middle (int placeholder, ...) +{ + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + __analyzer_test_not_enough_args_2_inner (ap); + __builtin_ms_va_end (ap); +} + +void test_not_enough_args_2 (void) +{ + __analyzer_test_not_enough_args_2_middle (42, "foo"); +} + +/* Excess args (not a problem). */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_excess_args (int placeholder, ...) +{ + const char *s; + + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + __builtin_ms_va_end (ap); +} + +void test_excess_args (void) +{ + __analyzer_called_by_test_excess_args (42, "foo", "bar"); +} + +/* Missing va_start. */ + +void test_missing_va_start (int placeholder, ...) +{ + __builtin_ms_va_list ap; /* { dg-message "region created on stack here" } */ + int i = __builtin_va_arg (ap, int); /* { dg-warning "use of uninitialized value 'ap'" } */ +} + +/* Missing va_end. */ + +void test_missing_va_end (int placeholder, ...) +{ + int i; + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); /* { dg-message "\\(1\\) 'va_start' called here" } */ + i = __builtin_va_arg (ap, int); +} /* { dg-warning "missing call to 'va_end'" "warning" } */ +/* { dg-message "\\(2\\) missing call to 'va_end' to match 'va_start' at \\(1\\)" "final event" { target *-*-* } .-1 } */ + +/* Missing va_end due to error-handling. */ + +int test_missing_va_end_2 (int placeholder, ...) +{ + int i, j; + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); /* { dg-message "\\(1\\) 'va_start' called here" } */ + i = __builtin_va_arg (ap, int); + if (i == 42) + { + __builtin_ms_va_end (ap); + return -1; + } + j = __builtin_va_arg (ap, int); + if (j == 1066) /* { dg-message "branch" } */ + return -1; /* { dg-message "here" } */ + __builtin_ms_va_end (ap); + return 0; +} /* { dg-warning "missing call to 'va_end'" "warning" } */ + +/* va_arg after va_end. */ + +void test_va_arg_after_va_end (int placeholder, ...) +{ + int i; + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + __builtin_ms_va_end (ap); /* { dg-message "'va_end' called here" } */ + i = __builtin_va_arg (ap, int); /* { dg-warning "'va_arg' after 'va_end'" } */ +} + +/* Type mismatch: expect int, but passed a char *. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_type_mismatch_1 (int placeholder, ...) +{ + int i; + + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + + i = __builtin_va_arg (ap, int); /* { dg-warning "'va_arg' expected 'int' but received '\[^\n\r\]*' for variadic argument 1 of 'ap' \\\[CWE-686\\\]" } */ + + __builtin_ms_va_end (ap); +} + +void test_type_mismatch_1 (void) +{ + __analyzer_called_by_test_type_mismatch_1 (42, "foo"); +} + +/* Type mismatch: expect char *, but passed an int. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_type_mismatch_2 (int placeholder, ...) +{ + const char *str; + + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + + str = __builtin_va_arg (ap, const char *); /* { dg-warning "'va_arg' expected 'const char \\*' but received 'int' for variadic argument 1" } */ + + __builtin_ms_va_end (ap); +} + +void test_type_mismatch_2 (void) +{ + __analyzer_called_by_test_type_mismatch_2 (42, 1066); +} + +/* As above, but with an intermediate function. */ + +static void __attribute__((noinline)) +__analyzer_test_type_mismatch_3_inner (__builtin_ms_va_list ap) +{ + const char *str; + + str = __builtin_va_arg (ap, const char *); /* { dg-warning "'va_arg' expected 'const char \\*' but received 'int' for variadic argument 1 of 'ap'" } */ +} + +static void __attribute__((noinline)) +__analyzer_test_type_mismatch_3_middle (int placeholder, ...) +{ + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + + __analyzer_test_type_mismatch_3_inner (ap); + + __builtin_ms_va_end (ap); +} + +void test_type_mismatch_3 (void) +{ + __analyzer_test_type_mismatch_3_middle (42, 1066); +} + +/* Multiple traversals of the args. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_multiple_traversals (int placeholder, ...) +{ + __builtin_ms_va_list ap; + + /* First traversal. */ + { + int i, j; + + __builtin_ms_va_start (ap, placeholder); + + i = __builtin_va_arg (ap, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + j = __builtin_va_arg (ap, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + + __builtin_ms_va_end (ap); + } + + /* Second traversal. */ + { + int i, j; + + __builtin_ms_va_start (ap, placeholder); + + i = __builtin_va_arg (ap, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + j = __builtin_va_arg (ap, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + + __builtin_ms_va_end (ap); + } +} + +void test_multiple_traversals (void) +{ + __analyzer_called_by_test_multiple_traversals (0, 1066, 42); +} + +/* Multiple traversals, using va_copy. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_multiple_traversals_2 (int placeholder, ...) +{ + int i, j; + __builtin_ms_va_list args1; + __builtin_ms_va_list args2; + + __builtin_ms_va_start (args1, placeholder); + __builtin_ms_va_copy (args2, args1); + + /* First traversal. */ + i = __builtin_va_arg (args1, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + j = __builtin_va_arg (args1, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + __builtin_ms_va_end (args1); + + /* Traversal of copy. */ + i = __builtin_va_arg (args2, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + j = __builtin_va_arg (args2, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + __builtin_ms_va_end (args2); +} + +void test_multiple_traversals_2 (void) +{ + __analyzer_called_by_test_multiple_traversals_2 (0, 1066, 42); +} + +/* Multiple traversals, using va_copy after a va_arg. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_multiple_traversals_3 (int placeholder, ...) +{ + int i, j; + __builtin_ms_va_list args1; + __builtin_ms_va_list args2; + + __builtin_ms_va_start (args1, placeholder); + + /* First traversal. */ + i = __builtin_va_arg (args1, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + /* va_copy after the first va_arg. */ + __builtin_ms_va_copy (args2, args1); + + j = __builtin_va_arg (args1, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + __builtin_ms_va_end (args1); + + /* Traversal of copy. */ + j = __builtin_va_arg (args2, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + __builtin_ms_va_end (args2); +} + +void test_multiple_traversals_3 (void) +{ + __analyzer_called_by_test_multiple_traversals_3 (0, 1066, 42); +} + +/* va_copy after va_end. */ + +void test_va_copy_after_va_end (int placeholder, ...) +{ + __builtin_ms_va_list ap1, ap2; + __builtin_ms_va_start (ap1, placeholder); + __builtin_ms_va_end (ap1); /* { dg-message "'va_end' called here" } */ + __builtin_ms_va_copy (ap2, ap1); /* { dg-warning "'va_copy' after 'va_end'" } */ + __builtin_ms_va_end (ap2); +} + +/* leak of va_copy. */ + +void test_leak_of_va_copy (int placeholder, ...) +{ + __builtin_ms_va_list ap1, ap2; + __builtin_ms_va_start (ap1, placeholder); + __builtin_ms_va_copy (ap2, ap1); /* { dg-message "'va_copy' called here" } */ + __builtin_ms_va_end (ap1); +} /* { dg-warning "missing call to 'va_end'" "warning" } */ + /* { dg-message "missing call to 'va_end' to match 'va_copy' at \\(1\\)" "final event" { target *-*-* } .-1 } */ + +/* double va_end. */ + +void test_double_va_end (int placeholder, ...) +{ + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); + __builtin_ms_va_end (ap); /* { dg-message "'va_end' called here" } */ + __builtin_ms_va_end (ap); /* { dg-warning "'va_end' after 'va_end'" } */ +} + +/* double va_start. */ + +void test_double_va_start (int placeholder, ...) +{ + int i; + __builtin_ms_va_list ap; + __builtin_ms_va_start (ap, placeholder); /* { dg-message "'va_start' called here" } */ + __builtin_ms_va_start (ap, placeholder); /* { dg-warning "missing call to 'va_end'" "warning" } */ + /* { dg-message "missing call to 'va_end' to match 'va_start' at \\(1\\)" "final event" { target *-*-* } .-1 } */ + __builtin_ms_va_end (ap); +} + +/* va_copy before va_start. */ + +void test_va_copy_before_va_start (int placeholder, ...) +{ + __builtin_ms_va_list ap1; /* { dg-message "region created on stack here" } */ + __builtin_ms_va_list ap2; + __builtin_ms_va_copy (ap2, ap1); /* { dg-warning "use of uninitialized value 'ap1'" } */ + __builtin_ms_va_end (ap2); +} + +/* Verify that we complain about uses of a va_list after the function + in which va_start was called has returned. */ + +__builtin_ms_va_list global_ap; + +static void __attribute__((noinline)) +__analyzer_called_by_test_va_arg_after_return (int placeholder, ...) +{ + __builtin_ms_va_start (global_ap, placeholder); + __builtin_ms_va_end (global_ap); +} + +void test_va_arg_after_return (void) +{ + int i; + __analyzer_called_by_test_va_arg_after_return (42, 1066); + i = __builtin_va_arg (global_ap, int); /* { dg-warning "dereferencing pointer 'global_ap' to within stale stack frame" } */ +} diff --git a/gcc/testsuite/gcc.dg/analyzer/stdarg-1-sysv_abi.c b/gcc/testsuite/gcc.dg/analyzer/stdarg-1-sysv_abi.c new file mode 100644 index 0000000..1dc97ea3 --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/stdarg-1-sysv_abi.c @@ -0,0 +1,437 @@ +/* As per stdarg-1.c, but using the sysv_abi versions of the builtins. */ + +/* { dg-do compile { target { x86_64-*-* && lp64 } } } */ + +#include "analyzer-decls.h" + +/* Unpacking a va_list. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_1 (int placeholder, ...) +{ + const char *s; + int i; + char c; + + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + i = __builtin_va_arg (ap, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + c = (char)__builtin_va_arg (ap, int); + __analyzer_eval (c == '@'); /* { dg-warning "TRUE" } */ + + __builtin_sysv_va_end (ap); +} + +void test_1 (void) +{ + __analyzer_called_by_test_1 (42, "foo", 1066, '@'); +} + +/* Unpacking a va_list passed from an intermediate function. */ + +static void __attribute__((noinline)) +__analyzer_test_2_inner (__builtin_sysv_va_list ap) +{ + const char *s; + int i; + char c; + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + i = __builtin_va_arg (ap, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + c = (char)__builtin_va_arg (ap, int); + __analyzer_eval (c == '@'); /* { dg-warning "TRUE" } */ +} + +static void __attribute__((noinline)) +__analyzer_test_2_middle (int placeholder, ...) +{ + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + __analyzer_test_2_inner (ap); + __builtin_sysv_va_end (ap); +} + +void test_2 (void) +{ + __analyzer_test_2_middle (42, "foo", 1066, '@'); +} + +/* Not enough args. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_not_enough_args (int placeholder, ...) +{ + const char *s; + int i; + + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + i = __builtin_va_arg (ap, int); /* { dg-warning "'ap' has no more arguments \\(1 consumed\\) \\\[CWE-685\\\]" } */ + + __builtin_sysv_va_end (ap); +} + +void test_not_enough_args (void) +{ + __analyzer_called_by_test_not_enough_args (42, "foo"); +} + +/* Not enough args, with an intermediate function. */ + +static void __attribute__((noinline)) +__analyzer_test_not_enough_args_2_inner (__builtin_sysv_va_list ap) +{ + const char *s; + int i; + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + i = __builtin_va_arg (ap, int); /* { dg-warning "'ap' has no more arguments \\(1 consumed\\)" } */ +} + +static void __attribute__((noinline)) +__analyzer_test_not_enough_args_2_middle (int placeholder, ...) +{ + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + __analyzer_test_not_enough_args_2_inner (ap); + __builtin_sysv_va_end (ap); +} + +void test_not_enough_args_2 (void) +{ + __analyzer_test_not_enough_args_2_middle (42, "foo"); +} + +/* Excess args (not a problem). */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_excess_args (int placeholder, ...) +{ + const char *s; + + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + + s = __builtin_va_arg (ap, char *); + __analyzer_eval (s[0] == 'f'); /* { dg-warning "TRUE" } */ + + __builtin_sysv_va_end (ap); +} + +void test_excess_args (void) +{ + __analyzer_called_by_test_excess_args (42, "foo", "bar"); +} + +/* Missing va_start. */ + +void test_missing_va_start (int placeholder, ...) +{ + __builtin_sysv_va_list ap; /* { dg-message "region created on stack here" } */ + int i = __builtin_va_arg (ap, int); /* { dg-warning "use of uninitialized value 'ap'" } */ +} + +/* Missing va_end. */ + +void test_missing_va_end (int placeholder, ...) +{ + int i; + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); /* { dg-message "\\(1\\) 'va_start' called here" } */ + i = __builtin_va_arg (ap, int); +} /* { dg-warning "missing call to 'va_end'" "warning" } */ +/* { dg-message "\\(2\\) missing call to 'va_end' to match 'va_start' at \\(1\\)" "final event" { target *-*-* } .-1 } */ + +/* Missing va_end due to error-handling. */ + +int test_missing_va_end_2 (int placeholder, ...) +{ + int i, j; + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); /* { dg-message "\\(1\\) 'va_start' called here" } */ + i = __builtin_va_arg (ap, int); + if (i == 42) + { + __builtin_sysv_va_end (ap); + return -1; + } + j = __builtin_va_arg (ap, int); + if (j == 1066) /* { dg-message "branch" } */ + return -1; /* { dg-message "here" } */ + __builtin_sysv_va_end (ap); + return 0; +} /* { dg-warning "missing call to 'va_end'" "warning" } */ + +/* va_arg after va_end. */ + +void test_va_arg_after_va_end (int placeholder, ...) +{ + int i; + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + __builtin_sysv_va_end (ap); /* { dg-message "'va_end' called here" } */ + i = __builtin_va_arg (ap, int); /* { dg-warning "'va_arg' after 'va_end'" } */ +} + +/* Type mismatch: expect int, but passed a char *. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_type_mismatch_1 (int placeholder, ...) +{ + int i; + + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + + i = __builtin_va_arg (ap, int); /* { dg-warning "'va_arg' expected 'int' but received '\[^\n\r\]*' for variadic argument 1 of 'ap' \\\[CWE-686\\\]" } */ + + __builtin_sysv_va_end (ap); +} + +void test_type_mismatch_1 (void) +{ + __analyzer_called_by_test_type_mismatch_1 (42, "foo"); +} + +/* Type mismatch: expect char *, but passed an int. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_type_mismatch_2 (int placeholder, ...) +{ + const char *str; + + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + + str = __builtin_va_arg (ap, const char *); /* { dg-warning "'va_arg' expected 'const char \\*' but received 'int' for variadic argument 1" } */ + + __builtin_sysv_va_end (ap); +} + +void test_type_mismatch_2 (void) +{ + __analyzer_called_by_test_type_mismatch_2 (42, 1066); +} + +/* As above, but with an intermediate function. */ + +static void __attribute__((noinline)) +__analyzer_test_type_mismatch_3_inner (__builtin_sysv_va_list ap) +{ + const char *str; + + str = __builtin_va_arg (ap, const char *); /* { dg-warning "'va_arg' expected 'const char \\*' but received 'int' for variadic argument 1 of 'ap'" } */ +} + +static void __attribute__((noinline)) +__analyzer_test_type_mismatch_3_middle (int placeholder, ...) +{ + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + + __analyzer_test_type_mismatch_3_inner (ap); + + __builtin_sysv_va_end (ap); +} + +void test_type_mismatch_3 (void) +{ + __analyzer_test_type_mismatch_3_middle (42, 1066); +} + +/* Multiple traversals of the args. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_multiple_traversals (int placeholder, ...) +{ + __builtin_sysv_va_list ap; + + /* First traversal. */ + { + int i, j; + + __builtin_sysv_va_start (ap, placeholder); + + i = __builtin_va_arg (ap, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + j = __builtin_va_arg (ap, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + + __builtin_sysv_va_end (ap); + } + + /* Second traversal. */ + { + int i, j; + + __builtin_sysv_va_start (ap, placeholder); + + i = __builtin_va_arg (ap, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + j = __builtin_va_arg (ap, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + + __builtin_sysv_va_end (ap); + } +} + +void test_multiple_traversals (void) +{ + __analyzer_called_by_test_multiple_traversals (0, 1066, 42); +} + +/* Multiple traversals, using va_copy. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_multiple_traversals_2 (int placeholder, ...) +{ + int i, j; + __builtin_sysv_va_list args1; + __builtin_sysv_va_list args2; + + __builtin_sysv_va_start (args1, placeholder); + __builtin_sysv_va_copy (args2, args1); + + /* First traversal. */ + i = __builtin_va_arg (args1, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + j = __builtin_va_arg (args1, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + __builtin_sysv_va_end (args1); + + /* Traversal of copy. */ + i = __builtin_va_arg (args2, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + j = __builtin_va_arg (args2, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + __builtin_sysv_va_end (args2); +} + +void test_multiple_traversals_2 (void) +{ + __analyzer_called_by_test_multiple_traversals_2 (0, 1066, 42); +} + +/* Multiple traversals, using va_copy after a va_arg. */ + +static void __attribute__((noinline)) +__analyzer_called_by_test_multiple_traversals_3 (int placeholder, ...) +{ + int i, j; + __builtin_sysv_va_list args1; + __builtin_sysv_va_list args2; + + __builtin_sysv_va_start (args1, placeholder); + + /* First traversal. */ + i = __builtin_va_arg (args1, int); + __analyzer_eval (i == 1066); /* { dg-warning "TRUE" } */ + + /* va_copy after the first va_arg. */ + __builtin_sysv_va_copy (args2, args1); + + j = __builtin_va_arg (args1, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + __builtin_sysv_va_end (args1); + + /* Traversal of copy. */ + j = __builtin_va_arg (args2, int); + __analyzer_eval (j == 42); /* { dg-warning "TRUE" } */ + __builtin_sysv_va_end (args2); +} + +void test_multiple_traversals_3 (void) +{ + __analyzer_called_by_test_multiple_traversals_3 (0, 1066, 42); +} + +/* va_copy after va_end. */ + +void test_va_copy_after_va_end (int placeholder, ...) +{ + __builtin_sysv_va_list ap1, ap2; + __builtin_sysv_va_start (ap1, placeholder); + __builtin_sysv_va_end (ap1); /* { dg-message "'va_end' called here" } */ + __builtin_sysv_va_copy (ap2, ap1); /* { dg-warning "'va_copy' after 'va_end'" } */ + __builtin_sysv_va_end (ap2); +} + +/* leak of va_copy. */ + +void test_leak_of_va_copy (int placeholder, ...) +{ + __builtin_sysv_va_list ap1, ap2; + __builtin_sysv_va_start (ap1, placeholder); + __builtin_sysv_va_copy (ap2, ap1); /* { dg-message "'va_copy' called here" } */ + __builtin_sysv_va_end (ap1); +} /* { dg-warning "missing call to 'va_end'" "warning" } */ + /* { dg-message "missing call to 'va_end' to match 'va_copy' at \\(1\\)" "final event" { target *-*-* } .-1 } */ + +/* double va_end. */ + +void test_double_va_end (int placeholder, ...) +{ + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); + __builtin_sysv_va_end (ap); /* { dg-message "'va_end' called here" } */ + __builtin_sysv_va_end (ap); /* { dg-warning "'va_end' after 'va_end'" } */ +} + +/* double va_start. */ + +void test_double_va_start (int placeholder, ...) +{ + int i; + __builtin_sysv_va_list ap; + __builtin_sysv_va_start (ap, placeholder); /* { dg-message "'va_start' called here" } */ + __builtin_sysv_va_start (ap, placeholder); /* { dg-warning "missing call to 'va_end'" "warning" } */ + /* { dg-message "missing call to 'va_end' to match 'va_start' at \\(1\\)" "final event" { target *-*-* } .-1 } */ + __builtin_sysv_va_end (ap); +} + +/* va_copy before va_start. */ + +void test_va_copy_before_va_start (int placeholder, ...) +{ + __builtin_sysv_va_list ap1; /* { dg-message "region created on stack here" } */ + __builtin_sysv_va_list ap2; + __builtin_sysv_va_copy (ap2, ap1); /* { dg-warning "use of uninitialized value 'ap1'" } */ + __builtin_sysv_va_end (ap2); +} + +/* Verify that we complain about uses of a va_list after the function + in which va_start was called has returned. */ + +__builtin_sysv_va_list global_ap; + +static void __attribute__((noinline)) +__analyzer_called_by_test_va_arg_after_return (int placeholder, ...) +{ + __builtin_sysv_va_start (global_ap, placeholder); + __builtin_sysv_va_end (global_ap); +} + +void test_va_arg_after_return (void) +{ + int i; + __analyzer_called_by_test_va_arg_after_return (42, 1066); + i = __builtin_va_arg (global_ap, int); /* { dg-warning "dereferencing pointer 'global_ap' to within stale stack frame" } */ +} diff --git a/gcc/testsuite/gcc.dg/c2x-enum-1.c b/gcc/testsuite/gcc.dg/c2x-enum-1.c index c4371fa..984a4e7 100644 --- a/gcc/testsuite/gcc.dg/c2x-enum-1.c +++ b/gcc/testsuite/gcc.dg/c2x-enum-1.c @@ -82,7 +82,12 @@ enum e5 { e5a = __LONG_MAX__, e5b, e5c, e5d = ((typeof (e5b)) -1) < 0, e5e = (unsigned long) -1, e5f, e5g = ((typeof (e5e)) -1) > 0, - TYPE_CHECK (e5a, long), TYPE_CHECK (e5e, unsigned long) }; +#if __LONG_MAX__ > __INT_MAX__ + TYPE_CHECK (e5a, long), +#else + TYPE_CHECK (e5a, int), +#endif + TYPE_CHECK (e5e, unsigned long) }; extern enum e5 e5v; extern typeof (e5a) e5v; extern typeof (e5b) e5v; diff --git a/gcc/testsuite/gcc.dg/c2x-float-7.c b/gcc/testsuite/gcc.dg/c2x-float-7.c deleted file mode 100644 index 0c90ff2..0000000 --- a/gcc/testsuite/gcc.dg/c2x-float-7.c +++ /dev/null @@ -1,49 +0,0 @@ -/* Test SNAN macros. Runtime exceptions test, to verify NaN is - signaling. */ -/* { dg-do run } */ -/* { dg-require-effective-target fenv_exceptions } */ -/* { dg-options "-std=c2x -pedantic-errors -fsignaling-nans" } */ -/* { dg-add-options ieee } */ - -#include <fenv.h> -#include <float.h> - -/* These should be defined if and only if signaling NaNs are supported - for the given types. If the testsuite gains effective-target - support for targets not supporting signaling NaNs, or not - supporting them for all types, this test should be made - appropriately conditional. */ -#ifndef FLT_SNAN -#error "FLT_SNAN undefined" -#endif -#ifndef DBL_SNAN -#error "DBL_SNAN undefined" -#endif -#ifndef LDBL_SNAN -#error "LDBL_SNAN undefined" -#endif - -volatile float f = FLT_SNAN; -volatile double d = DBL_SNAN; -volatile long double ld = LDBL_SNAN; - -extern void abort (void); -extern void exit (int); - -int -main (void) -{ - feclearexcept (FE_ALL_EXCEPT); - f += f; - if (!fetestexcept (FE_INVALID)) - abort (); - feclearexcept (FE_ALL_EXCEPT); - d += d; - if (!fetestexcept (FE_INVALID)) - abort (); - feclearexcept (FE_ALL_EXCEPT); - ld += ld; - if (!fetestexcept (FE_INVALID)) - abort (); - exit (0); -} diff --git a/gcc/testsuite/gcc.dg/c2x-float-7a.c b/gcc/testsuite/gcc.dg/c2x-float-7a.c new file mode 100644 index 0000000..129e790 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-float-7a.c @@ -0,0 +1,32 @@ +/* Test SNAN macros. Runtime exceptions test, to verify NaN is + signaling. */ +/* { dg-do run } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-options "-std=c2x -pedantic-errors -fsignaling-nans" } */ +/* { dg-add-options ieee } */ + +#include <fenv.h> +#include <float.h> + +/* This should be defined if and only if signaling NaNs is supported + for the given type. If the testsuite gains effective-target + support for targets not supporting signaling NaNs, this test + should be made appropriately conditional. */ +#ifndef FLT_SNAN +#error "FLT_SNAN undefined" +#endif + +volatile float f = FLT_SNAN; + +extern void abort (void); +extern void exit (int); + +int +main (void) +{ + feclearexcept (FE_ALL_EXCEPT); + f += f; + if (!fetestexcept (FE_INVALID)) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/c2x-float-7b.c b/gcc/testsuite/gcc.dg/c2x-float-7b.c new file mode 100644 index 0000000..0ae9038 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-float-7b.c @@ -0,0 +1,32 @@ +/* Test SNAN macros. Runtime exceptions test, to verify NaN is + signaling. */ +/* { dg-do run } */ +/* { dg-require-effective-target fenv_exceptions_double } */ +/* { dg-options "-std=c2x -pedantic-errors -fsignaling-nans" } */ +/* { dg-add-options ieee } */ + +#include <fenv.h> +#include <float.h> + +/* This should be defined if and only if signaling NaNs is supported + for the given type. If the testsuite gains effective-target + support for targets not supporting signaling NaNs, this test + should be made appropriately conditional. */ +#ifndef DBL_SNAN +#error "DBL_SNAN undefined" +#endif + +volatile double d = DBL_SNAN; + +extern void abort (void); +extern void exit (int); + +int +main (void) +{ + feclearexcept (FE_ALL_EXCEPT); + d += d; + if (!fetestexcept (FE_INVALID)) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/c2x-float-7c.c b/gcc/testsuite/gcc.dg/c2x-float-7c.c new file mode 100644 index 0000000..038fd55 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-float-7c.c @@ -0,0 +1,32 @@ +/* Test SNAN macros. Runtime exceptions test, to verify NaN is + signaling. */ +/* { dg-do run } */ +/* { dg-require-effective-target fenv_exceptions_long_double } */ +/* { dg-options "-std=c2x -pedantic-errors -fsignaling-nans" } */ +/* { dg-add-options ieee } */ + +#include <fenv.h> +#include <float.h> + +/* This should be defined if and only if signaling NaNs is supported + for the given type. If the testsuite gains effective-target + support for targets not supporting signaling NaNs, this test + should be made appropriately conditional. */ +#ifndef LDBL_SNAN +#error "LDBL_SNAN undefined" +#endif + +volatile long double ld = LDBL_SNAN; + +extern void abort (void); +extern void exit (int); + +int +main (void) +{ + feclearexcept (FE_ALL_EXCEPT); + ld += ld; + if (!fetestexcept (FE_INVALID)) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-function-3.c b/gcc/testsuite/gcc.dg/debug/btf/btf-function-3.c index c83b823..884d25c 100644 --- a/gcc/testsuite/gcc.dg/debug/btf/btf-function-3.c +++ b/gcc/testsuite/gcc.dg/debug/btf/btf-function-3.c @@ -7,7 +7,7 @@ has type_id=0. */ /* { dg-do compile } */ -/* { dg-options "-O0 -gbtf -dA" } */ +/* { dg-options "-O0 -gbtf -dA -Wno-psabi" } */ /* { dg-final { scan-assembler-times "\[\t \]0xd000003\[\t \]+\[^\n\]*btt_info" 1 } } */ /* { dg-final { scan-assembler-times "farg_name" 3 } } */ diff --git a/gcc/testsuite/gcc.dg/format/c11-printf-1.c b/gcc/testsuite/gcc.dg/format/c11-printf-1.c index 7b8a992..05d242e 100644 --- a/gcc/testsuite/gcc.dg/format/c11-printf-1.c +++ b/gcc/testsuite/gcc.dg/format/c11-printf-1.c @@ -6,8 +6,33 @@ #include "format.h" void -foo (int i) +foo (int i, int_least8_t i8, int_least16_t i16, int_least32_t i32, + int_least64_t i64, uint_least8_t u8, uint_least16_t u16, + uint_least32_t u32, uint_least64_t u64, int_fast8_t if8, + int_fast16_t if16, int_fast32_t if32, int_fast64_t if64, uint_fast8_t uf8, + uint_fast16_t uf16, uint_fast32_t uf32, uint_fast64_t uf64) { printf ("%b", i); /* { dg-warning "C" } */ printf ("%B", i); /* { dg-warning "C" } */ + printf ("%w8d", i8); /* { dg-warning "C" } */ + printf ("%w16d", i16); /* { dg-warning "C" } */ + printf ("%w32d", i32); /* { dg-warning "C" } */ + printf ("%w64d", i64); /* { dg-warning "C" } */ + printf ("%wf8d", if8); /* { dg-warning "C" } */ + printf ("%wf16d", if16); /* { dg-warning "C" } */ + printf ("%wf32d", if32); /* { dg-warning "C" } */ + printf ("%wf64d", if64); /* { dg-warning "C" } */ + printf ("%w8u", u8); /* { dg-warning "C" } */ + printf ("%w16u", u16); /* { dg-warning "C" } */ + printf ("%w32u", u32); /* { dg-warning "C" } */ + printf ("%w64u", u64); /* { dg-warning "C" } */ + printf ("%wf8u", uf8); /* { dg-warning "C" } */ + printf ("%wf16u", uf16); /* { dg-warning "C" } */ + printf ("%wf32u", uf32); /* { dg-warning "C" } */ + printf ("%wf64u", uf64); /* { dg-warning "C" } */ + printf ("%w8i", i8); /* { dg-warning "C" } */ + printf ("%w8o", u8); /* { dg-warning "C" } */ + printf ("%w8x", u8); /* { dg-warning "C" } */ + printf ("%w8X", u8); /* { dg-warning "C" } */ + printf ("%w8n", &i8); /* { dg-warning "C" } */ } diff --git a/gcc/testsuite/gcc.dg/format/c11-scanf-1.c b/gcc/testsuite/gcc.dg/format/c11-scanf-1.c index d2b9bfb..4edd2a3 100644 --- a/gcc/testsuite/gcc.dg/format/c11-scanf-1.c +++ b/gcc/testsuite/gcc.dg/format/c11-scanf-1.c @@ -5,7 +5,33 @@ #include "format.h" void -foo (unsigned int *uip) +foo (unsigned int *uip, int_least8_t *i8, int_least16_t *i16, + int_least32_t *i32, int_least64_t *i64, uint_least8_t *u8, + uint_least16_t *u16, uint_least32_t *u32, uint_least64_t *u64, + int_fast8_t *if8, int_fast16_t *if16, int_fast32_t *if32, + int_fast64_t *if64, uint_fast8_t *uf8, uint_fast16_t *uf16, + uint_fast32_t *uf32, uint_fast64_t *uf64) { scanf ("%b", uip); /* { dg-warning "C" } */ + scanf ("%w8d", i8); /* { dg-warning "C" } */ + scanf ("%w16d", i16); /* { dg-warning "C" } */ + scanf ("%w32d", i32); /* { dg-warning "C" } */ + scanf ("%w64d", i64); /* { dg-warning "C" } */ + scanf ("%wf8d", if8); /* { dg-warning "C" } */ + scanf ("%wf16d", if16); /* { dg-warning "C" } */ + scanf ("%wf32d", if32); /* { dg-warning "C" } */ + scanf ("%wf64d", if64); /* { dg-warning "C" } */ + scanf ("%w8u", u8); /* { dg-warning "C" } */ + scanf ("%w16u", u16); /* { dg-warning "C" } */ + scanf ("%w32u", u32); /* { dg-warning "C" } */ + scanf ("%w64u", u64); /* { dg-warning "C" } */ + scanf ("%wf8u", uf8); /* { dg-warning "C" } */ + scanf ("%wf16u", uf16); /* { dg-warning "C" } */ + scanf ("%wf32u", uf32); /* { dg-warning "C" } */ + scanf ("%wf64u", uf64); /* { dg-warning "C" } */ + scanf ("%w8i", i8); /* { dg-warning "C" } */ + scanf ("%w8o", u8); /* { dg-warning "C" } */ + scanf ("%w8x", u8); /* { dg-warning "C" } */ + scanf ("%w8X", u8); /* { dg-warning "C" } */ + scanf ("%w8n", i8); /* { dg-warning "C" } */ } diff --git a/gcc/testsuite/gcc.dg/format/c2x-printf-1.c b/gcc/testsuite/gcc.dg/format/c2x-printf-1.c index 3ae7713..ca43d79 100644 --- a/gcc/testsuite/gcc.dg/format/c2x-printf-1.c +++ b/gcc/testsuite/gcc.dg/format/c2x-printf-1.c @@ -6,7 +6,12 @@ void foo (unsigned int u, unsigned short us, unsigned char uc, unsigned long ul, - unsigned long long ull, uintmax_t uj, size_t z, unsigned_ptrdiff_t ut) + unsigned long long ull, uintmax_t uj, size_t z, unsigned_ptrdiff_t ut, + int_least8_t i8, int_least16_t i16, int_least32_t i32, int_least64_t i64, + uint_least8_t u8, uint_least16_t u16, uint_least32_t u32, + uint_least64_t u64, int_fast8_t if8, int_fast16_t if16, int_fast32_t if32, + int_fast64_t if64, uint_fast8_t uf8, uint_fast16_t uf16, + uint_fast32_t uf32, uint_fast64_t uf64) { /* Use of %b with each length modifier and other valid features. */ printf ("%b %hb %hhb %lb %llb %jb %zb %tb\n", u, us, uc, ul, ull, uj, z, ut); @@ -23,4 +28,110 @@ foo (unsigned int u, unsigned short us, unsigned char uc, unsigned long ul, /* Use of 'L' and 'q' for long long is an extension. */ printf ("%Lb", ull); /* { dg-warning "does not support" } */ printf ("%qb", ull); /* { dg-warning "does not support" } */ + /* Use of %wN and %wfN with each valid conversion specifier. */ + printf ("%w8d %w16d %w32d %w64d %wf8d %wf16d %wf32d %wf64d", + i8, i16, i32, i64, if8, if16, if32, if64); + printf ("%w8i %w16i %w32i %w64i %wf8i %wf16i %wf32i %wf64i", + i8, i16, i32, i64, if8, if16, if32, if64); + printf ("%w8b %w16b %w32b %w64b %wf8b %wf16b %wf32b %wf64b", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + printf ("%w8o %w16o %w32o %w64o %wf8o %wf16o %wf32o %wf64o", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + printf ("%w8u %w16u %w32u %w64u %wf8u %wf16u %wf32u %wf64u", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + printf ("%w8x %w16x %w32x %w64x %wf8x %wf16x %wf32x %wf64x", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + printf ("%w8X %w16X %w32X %w64X %wf8X %wf16X %wf32X %wf64X", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + printf ("%w8n %w16n %w32n %w64n %wf8n %wf16n %wf32n %wf64n", + &i8, &i16, &i32, &i64, &if8, &if16, &if32, &if64); + /* Use of %wN and %wfN with bad conversion specifiers. */ + printf ("%w8a", i8); /* { dg-warning "length modifier" } */ + printf ("%w16a", i16); /* { dg-warning "length modifier" } */ + printf ("%w32a", i32); /* { dg-warning "length modifier" } */ + printf ("%w64a", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8a", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16a", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32a", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64a", if64); /* { dg-warning "length modifier" } */ + printf ("%w8A", i8); /* { dg-warning "length modifier" } */ + printf ("%w16A", i16); /* { dg-warning "length modifier" } */ + printf ("%w32A", i32); /* { dg-warning "length modifier" } */ + printf ("%w64A", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8A", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16A", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32A", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64A", if64); /* { dg-warning "length modifier" } */ + printf ("%w8c", i8); /* { dg-warning "length modifier" } */ + printf ("%w16c", i16); /* { dg-warning "length modifier" } */ + printf ("%w32c", i32); /* { dg-warning "length modifier" } */ + printf ("%w64c", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8c", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16c", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32c", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64c", if64); /* { dg-warning "length modifier" } */ + printf ("%w8e", i8); /* { dg-warning "length modifier" } */ + printf ("%w16e", i16); /* { dg-warning "length modifier" } */ + printf ("%w32e", i32); /* { dg-warning "length modifier" } */ + printf ("%w64e", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8e", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16e", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32e", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64e", if64); /* { dg-warning "length modifier" } */ + printf ("%w8E", i8); /* { dg-warning "length modifier" } */ + printf ("%w16E", i16); /* { dg-warning "length modifier" } */ + printf ("%w32E", i32); /* { dg-warning "length modifier" } */ + printf ("%w64E", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8E", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16E", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32E", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64E", if64); /* { dg-warning "length modifier" } */ + printf ("%w8f", i8); /* { dg-warning "length modifier" } */ + printf ("%w16f", i16); /* { dg-warning "length modifier" } */ + printf ("%w32f", i32); /* { dg-warning "length modifier" } */ + printf ("%w64f", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8f", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16f", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32f", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64f", if64); /* { dg-warning "length modifier" } */ + printf ("%w8F", i8); /* { dg-warning "length modifier" } */ + printf ("%w16F", i16); /* { dg-warning "length modifier" } */ + printf ("%w32F", i32); /* { dg-warning "length modifier" } */ + printf ("%w64F", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8F", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16F", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32F", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64F", if64); /* { dg-warning "length modifier" } */ + printf ("%w8g", i8); /* { dg-warning "length modifier" } */ + printf ("%w16g", i16); /* { dg-warning "length modifier" } */ + printf ("%w32g", i32); /* { dg-warning "length modifier" } */ + printf ("%w64g", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8g", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16g", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32g", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64g", if64); /* { dg-warning "length modifier" } */ + printf ("%w8G", i8); /* { dg-warning "length modifier" } */ + printf ("%w16G", i16); /* { dg-warning "length modifier" } */ + printf ("%w32G", i32); /* { dg-warning "length modifier" } */ + printf ("%w64G", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8G", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16G", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32G", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64G", if64); /* { dg-warning "length modifier" } */ + printf ("%w8p", i8); /* { dg-warning "length modifier" } */ + printf ("%w16p", i16); /* { dg-warning "length modifier" } */ + printf ("%w32p", i32); /* { dg-warning "length modifier" } */ + printf ("%w64p", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8p", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16p", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32p", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64p", if64); /* { dg-warning "length modifier" } */ + printf ("%w8s", i8); /* { dg-warning "length modifier" } */ + printf ("%w16s", i16); /* { dg-warning "length modifier" } */ + printf ("%w32s", i32); /* { dg-warning "length modifier" } */ + printf ("%w64s", i64); /* { dg-warning "length modifier" } */ + printf ("%wf8s", if8); /* { dg-warning "length modifier" } */ + printf ("%wf16s", if16); /* { dg-warning "length modifier" } */ + printf ("%wf32s", if32); /* { dg-warning "length modifier" } */ + printf ("%wf64s", if64); /* { dg-warning "length modifier" } */ } diff --git a/gcc/testsuite/gcc.dg/format/c2x-scanf-1.c b/gcc/testsuite/gcc.dg/format/c2x-scanf-1.c index f46a715..88fab12 100644 --- a/gcc/testsuite/gcc.dg/format/c2x-scanf-1.c +++ b/gcc/testsuite/gcc.dg/format/c2x-scanf-1.c @@ -7,11 +7,130 @@ void foo (unsigned int *uip, unsigned short int *uhp, unsigned char *uhhp, unsigned long int *ulp, unsigned long long *ullp, uintmax_t *ujp, - size_t *zp, unsigned_ptrdiff_t *utp) + size_t *zp, unsigned_ptrdiff_t *utp, int_least8_t *i8, int_least16_t *i16, + int_least32_t *i32, int_least64_t *i64, uint_least8_t *u8, + uint_least16_t *u16, uint_least32_t *u32, uint_least64_t *u64, + int_fast8_t *if8, int_fast16_t *if16, int_fast32_t *if32, + int_fast64_t *if64, uint_fast8_t *uf8, uint_fast16_t *uf16, + uint_fast32_t *uf32, uint_fast64_t *uf64) { scanf ("%*b"); scanf ("%2b", uip); scanf ("%hb%hhb%lb%llb%jb%zb%tb", uhp, uhhp, ulp, ullp, ujp, zp, utp); scanf ("%Lb", ullp); /* { dg-warning "does not support" } */ scanf ("%qb", ullp); /* { dg-warning "does not support" } */ + /* Use of %wN and %wfN with each valid conversion specifier. */ + scanf ("%w8d %w16d %w32d %w64d %wf8d %wf16d %wf32d %wf64d", + i8, i16, i32, i64, if8, if16, if32, if64); + scanf ("%w8i %w16i %w32i %w64i %wf8i %wf16i %wf32i %wf64i", + i8, i16, i32, i64, if8, if16, if32, if64); + scanf ("%w8b %w16b %w32b %w64b %wf8b %wf16b %wf32b %wf64b", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + scanf ("%w8o %w16o %w32o %w64o %wf8o %wf16o %wf32o %wf64o", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + scanf ("%w8u %w16u %w32u %w64u %wf8u %wf16u %wf32u %wf64u", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + scanf ("%w8x %w16x %w32x %w64x %wf8x %wf16x %wf32x %wf64x", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + scanf ("%w8X %w16X %w32X %w64X %wf8X %wf16X %wf32X %wf64X", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); + scanf ("%w8n %w16n %w32n %w64n %wf8n %wf16n %wf32n %wf64n", + i8, i16, i32, i64, if8, if16, if32, if64); + /* Use of %wN and %wfN with bad conversion specifiers. */ + scanf ("%w8a", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16a", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32a", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64a", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8a", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16a", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32a", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64a", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8A", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16A", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32A", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64A", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8A", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16A", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32A", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64A", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8c", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16c", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32c", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64c", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8c", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16c", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32c", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64c", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8e", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16e", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32e", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64e", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8e", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16e", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32e", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64e", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8E", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16E", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32E", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64E", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8E", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16E", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32E", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64E", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8f", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16f", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32f", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64f", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8f", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16f", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32f", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64f", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8F", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16F", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32F", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64F", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8F", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16F", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32F", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64F", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8g", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16g", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32g", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64g", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8g", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16g", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32g", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64g", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8G", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16G", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32G", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64G", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8G", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16G", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32G", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64G", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8p", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16p", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32p", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64p", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8p", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16p", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32p", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64p", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8s", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16s", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32s", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64s", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8s", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16s", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32s", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64s", if64); /* { dg-warning "length modifier" } */ + scanf ("%w8[abc]", i8); /* { dg-warning "length modifier" } */ + scanf ("%w16[abc]", i16); /* { dg-warning "length modifier" } */ + scanf ("%w32[abc]", i32); /* { dg-warning "length modifier" } */ + scanf ("%w64[abc]", i64); /* { dg-warning "length modifier" } */ + scanf ("%wf8[abc]", if8); /* { dg-warning "length modifier" } */ + scanf ("%wf16[abc]", if16); /* { dg-warning "length modifier" } */ + scanf ("%wf32[abc]", if32); /* { dg-warning "length modifier" } */ + scanf ("%wf64[abc]", if64); /* { dg-warning "length modifier" } */ } diff --git a/gcc/testsuite/gcc.dg/format/ext-9.c b/gcc/testsuite/gcc.dg/format/ext-9.c index 15f59e2..0aeb365 100644 --- a/gcc/testsuite/gcc.dg/format/ext-9.c +++ b/gcc/testsuite/gcc.dg/format/ext-9.c @@ -8,7 +8,12 @@ void foo (u_quad_t uq, unsigned int u, unsigned short us, unsigned char uc, unsigned long ul, unsigned long long ull, uintmax_t uj, size_t z, - unsigned_ptrdiff_t ut) + unsigned_ptrdiff_t ut, int_least8_t i8, int_least16_t i16, + int_least32_t i32, int_least64_t i64, uint_least8_t u8, + uint_least16_t u16, uint_least32_t u32, uint_least64_t u64, + int_fast8_t if8, int_fast16_t if16, int_fast32_t if32, int_fast64_t if64, + uint_fast8_t uf8, uint_fast16_t uf16, uint_fast32_t uf32, + uint_fast64_t uf64) { /* Deprecated length modifiers with %b and %B. */ printf ("%qb%qB", uq, uq); @@ -26,4 +31,7 @@ foo (u_quad_t uq, unsigned int u, unsigned short us, unsigned char uc, /* Flags ignored in certain combinations. */ printf ("%-08B\n", u); /* { dg-warning "ignored" } */ printf ("%08.5B\n", u); /* { dg-warning "ignored" } */ + /* Use of %wN and %wfN with %B. */ + printf ("%w8B %w16B %w32B %w64B %wf8B %wf16B %wf32B %wf64B", + u8, u16, u32, u64, uf8, uf16, uf32, uf64); } diff --git a/gcc/testsuite/gcc.dg/format/format.h b/gcc/testsuite/gcc.dg/format/format.h index a99927e..2863e7e 100644 --- a/gcc/testsuite/gcc.dg/format/format.h +++ b/gcc/testsuite/gcc.dg/format/format.h @@ -77,6 +77,24 @@ typedef ullong u_quad_t; __extension__ typedef __INTMAX_TYPE__ intmax_t; __extension__ typedef __UINTMAX_TYPE__ uintmax_t; +__extension__ typedef __INT_LEAST8_TYPE__ int_least8_t; +__extension__ typedef __INT_LEAST16_TYPE__ int_least16_t; +__extension__ typedef __INT_LEAST32_TYPE__ int_least32_t; +__extension__ typedef __INT_LEAST64_TYPE__ int_least64_t; +__extension__ typedef __UINT_LEAST8_TYPE__ uint_least8_t; +__extension__ typedef __UINT_LEAST16_TYPE__ uint_least16_t; +__extension__ typedef __UINT_LEAST32_TYPE__ uint_least32_t; +__extension__ typedef __UINT_LEAST64_TYPE__ uint_least64_t; + +__extension__ typedef __INT_FAST8_TYPE__ int_fast8_t; +__extension__ typedef __INT_FAST16_TYPE__ int_fast16_t; +__extension__ typedef __INT_FAST32_TYPE__ int_fast32_t; +__extension__ typedef __INT_FAST64_TYPE__ int_fast64_t; +__extension__ typedef __UINT_FAST8_TYPE__ uint_fast8_t; +__extension__ typedef __UINT_FAST16_TYPE__ uint_fast16_t; +__extension__ typedef __UINT_FAST32_TYPE__ uint_fast32_t; +__extension__ typedef __UINT_FAST64_TYPE__ uint_fast64_t; + #if __STDC_VERSION__ < 199901L && !defined(restrict) #define restrict /* "restrict" not in old C standard. */ #endif diff --git a/gcc/testsuite/gcc.dg/gimplefe-error-15.c b/gcc/testsuite/gcc.dg/gimplefe-error-15.c new file mode 100644 index 0000000..066cd84 --- /dev/null +++ b/gcc/testsuite/gcc.dg/gimplefe-error-15.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-fgimple" } */ + +unsigned a; +static double *d; +static _Bool b; +__GIMPLE int +foo (int n) +{ + b = __builtin_add_overflow (n, *d, &a); +} /* { dg-error "invalid argument" } */ + +/* { dg-message "" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.dg/pr54346.c b/gcc/testsuite/gcc.dg/pr54346.c index 63611ab..5ec0609 100755..100644 --- a/gcc/testsuite/gcc.dg/pr54346.c +++ b/gcc/testsuite/gcc.dg/pr54346.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -fdump-tree-dse1" } */ +/* { dg-options "-O -fdump-tree-dse1 -Wno-psabi" } */ typedef int veci __attribute__ ((vector_size (4 * sizeof (int)))); diff --git a/gcc/testsuite/gcc.dg/pr95115.c b/gcc/testsuite/gcc.dg/pr95115.c index 46a95df..69c4f83 100644 --- a/gcc/testsuite/gcc.dg/pr95115.c +++ b/gcc/testsuite/gcc.dg/pr95115.c @@ -1,7 +1,7 @@ /* { dg-do run } */ /* { dg-options "-O2 -ftrapping-math" } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include <fenv.h> #include <stdlib.h> diff --git a/gcc/testsuite/gcc.dg/tls/vis-attr-gd.c b/gcc/testsuite/gcc.dg/tls/vis-attr-gd.c new file mode 100644 index 0000000..89a248a --- /dev/null +++ b/gcc/testsuite/gcc.dg/tls/vis-attr-gd.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ +/* { dg-require-effective-target tls } */ +/* { dg-options "-O2 -fPIC -fdump-ipa-whole-program" } */ + +// tls_model should be global-dynamic due to explicitly specified attribute +__attribute__((tls_model("global-dynamic"))) +__thread int x; + +void reference() { x++; } + +/* { dg-final { scan-ipa-dump "Varpool flags: tls-global-dynamic" "whole-program" } } */ diff --git a/gcc/testsuite/gcc.dg/tls/vis-attr-hidden-gd.c b/gcc/testsuite/gcc.dg/tls/vis-attr-hidden-gd.c new file mode 100644 index 0000000..e325655 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tls/vis-attr-hidden-gd.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ +/* { dg-require-effective-target tls } */ +/* { dg-options "-O2 -fPIC -fdump-ipa-whole-program" } */ + +// tls_model should be global-dynamic due to explicitly specified attribute +__attribute__((visibility("hidden"))) +__attribute__((tls_model("global-dynamic"))) +__thread int x; + +void reference() { x++; } + +/* { dg-final { scan-ipa-dump "Varpool flags: tls-global-dynamic" "whole-program" } } */ diff --git a/gcc/testsuite/gcc.dg/tls/vis-attr-hidden.c b/gcc/testsuite/gcc.dg/tls/vis-attr-hidden.c new file mode 100644 index 0000000..0d43fc5 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tls/vis-attr-hidden.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ +/* { dg-require-effective-target tls } */ +/* { dg-options "-O2 -fPIC -fdump-ipa-whole-program" } */ + +//tls_model should be local-dynamic due to visibility("hidden") +__attribute__((visibility("hidden"))) +__thread int x; + +void reference() { x++; } + +/* { dg-final { scan-ipa-dump "Varpool flags: tls-local-dynamic" "whole-program" } } */ diff --git a/gcc/testsuite/gcc.dg/tls/vis-flag-hidden-gd.c b/gcc/testsuite/gcc.dg/tls/vis-flag-hidden-gd.c new file mode 100644 index 0000000..cad41e0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tls/vis-flag-hidden-gd.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ +/* { dg-require-effective-target tls } */ +/* { dg-options "-O2 -fPIC -fdump-ipa-whole-program -fvisibility=hidden" } */ + + +// tls_model should be global-dynamic due to explicitly specified attribute +__attribute__((tls_model("global-dynamic"))) +__thread int x; + +void reference() { x++; } + +/* { dg-final { scan-ipa-dump "Varpool flags: tls-global-dynamic" "whole-program" } } */ diff --git a/gcc/testsuite/gcc.dg/tls/vis-flag-hidden.c b/gcc/testsuite/gcc.dg/tls/vis-flag-hidden.c new file mode 100644 index 0000000..a15df09 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tls/vis-flag-hidden.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ +/* { dg-require-effective-target tls } */ +/* { dg-options "-O2 -fPIC -fdump-ipa-whole-program -fvisibility=hidden" } */ + + +// tls_model should be local-dynamic due to -fvisibility=hidden +__thread int x; + +void reference() { x++; } + +/* { dg-final { scan-ipa-dump "Varpool flags: tls-local-dynamic" "whole-program" } } */ diff --git a/gcc/testsuite/gcc.dg/tls/vis-pragma-hidden-gd.c b/gcc/testsuite/gcc.dg/tls/vis-pragma-hidden-gd.c new file mode 100644 index 0000000..3b35981 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tls/vis-pragma-hidden-gd.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ +/* { dg-require-effective-target tls } */ +/* { dg-options "-O2 -fPIC -fdump-ipa-whole-program" } */ + + +#pragma GCC visibility push(hidden) + +// tls_model should be global-dynamic due to explicitly specified attribute +__attribute__((tls_model("global-dynamic"))) +__thread int x; + +#pragma GCC visibility pop + +void reference() { x++; } + +/* { dg-final { scan-ipa-dump "Varpool flags: tls-global-dynamic" "whole-program" } } */ diff --git a/gcc/testsuite/gcc.dg/tls/vis-pragma-hidden.c b/gcc/testsuite/gcc.dg/tls/vis-pragma-hidden.c new file mode 100644 index 0000000..1be9764 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tls/vis-pragma-hidden.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ +/* { dg-require-effective-target tls } */ +/* { dg-options "-O2 -fPIC -fdump-ipa-whole-program" } */ + + +#pragma GCC visibility push(hidden) + +// tls_model should be local-dynamic due to a pragma +__thread int x; + +#pragma GCC visibility pop + +void reference() { x++; } + +/* { dg-final { scan-ipa-dump "Varpool flags: tls-local-dynamic" "whole-program" } } */ diff --git a/gcc/testsuite/gcc.dg/torture/float32x-nan-floath.c b/gcc/testsuite/gcc.dg/torture/float32x-nan-floath.c index 0aab4be..8d58b41 100644 --- a/gcc/testsuite/gcc.dg/torture/float32x-nan-floath.c +++ b/gcc/testsuite/gcc.dg/torture/float32x-nan-floath.c @@ -4,7 +4,7 @@ /* { dg-add-options float32x } */ /* { dg-add-options ieee } */ /* { dg-require-effective-target float32x_runtime } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #define WIDTH 32 #define EXT 1 diff --git a/gcc/testsuite/gcc.dg/torture/float32x-nan.c b/gcc/testsuite/gcc.dg/torture/float32x-nan.c index d976d37..46f35a4 100644 --- a/gcc/testsuite/gcc.dg/torture/float32x-nan.c +++ b/gcc/testsuite/gcc.dg/torture/float32x-nan.c @@ -4,7 +4,7 @@ /* { dg-add-options float32x } */ /* { dg-add-options ieee } */ /* { dg-require-effective-target float32x_runtime } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #define WIDTH 32 #define EXT 1 diff --git a/gcc/testsuite/gcc.dg/torture/float64-nan-floath.c b/gcc/testsuite/gcc.dg/torture/float64-nan-floath.c index 1f5298b..444f234 100644 --- a/gcc/testsuite/gcc.dg/torture/float64-nan-floath.c +++ b/gcc/testsuite/gcc.dg/torture/float64-nan-floath.c @@ -4,7 +4,7 @@ /* { dg-add-options float64 } */ /* { dg-add-options ieee } */ /* { dg-require-effective-target float64_runtime } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #define WIDTH 64 #define EXT 0 diff --git a/gcc/testsuite/gcc.dg/torture/float64-nan.c b/gcc/testsuite/gcc.dg/torture/float64-nan.c index 51a6437..11b70ed 100644 --- a/gcc/testsuite/gcc.dg/torture/float64-nan.c +++ b/gcc/testsuite/gcc.dg/torture/float64-nan.c @@ -4,7 +4,7 @@ /* { dg-add-options float64 } */ /* { dg-add-options ieee } */ /* { dg-require-effective-target float64_runtime } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #define WIDTH 64 #define EXT 0 diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-1-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-1-float.c new file mode 100644 index 0000000..6409878 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-1-float.c @@ -0,0 +1,21 @@ +/* { dg-do run { xfail { powerpc*-*-* } } } */ +/* remove the xfail for powerpc when pr58684 is fixed */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ + +#include <fenv.h> + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x > __builtin_inf (); + if (i != 0 || !fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-1.c b/gcc/testsuite/gcc.dg/torture/inf-compare-1.c index 70f255e..5e0a2d0 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-1.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-1.c @@ -1,7 +1,7 @@ /* { dg-do run { xfail { powerpc*-*-* } } } */ /* remove the xfail for powerpc when pr58684 is fixed */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-2-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-2-float.c new file mode 100644 index 0000000..3cb7df8 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-2-float.c @@ -0,0 +1,21 @@ +/* { dg-do run { xfail { powerpc*-*-* } } } */ +/* remove the xfail for powerpc when pr58684 is fixed */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ + +#include <fenv.h> + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x < -__builtin_inf (); + if (i != 0 || !fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-2.c b/gcc/testsuite/gcc.dg/torture/inf-compare-2.c index 011f992..6e396fb 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-2.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-2.c @@ -1,7 +1,7 @@ /* { dg-do run { xfail { powerpc*-*-* } } } */ /* remove the xfail for powerpc when pr58684 is fixed */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-3-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-3-float.c new file mode 100644 index 0000000..297aa0e --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-3-float.c @@ -0,0 +1,21 @@ +/* { dg-do run { xfail { powerpc*-*-* } } } */ +/* remove the xfail for powerpc when pr58684 is fixed */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ + +#include <fenv.h> + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x <= __builtin_inf (); + if (i != 0 || !fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-3.c b/gcc/testsuite/gcc.dg/torture/inf-compare-3.c index de5c478..cac8c68 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-3.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-3.c @@ -1,7 +1,7 @@ /* { dg-do run { xfail { powerpc*-*-* } } } */ /* remove the xfail for powerpc when pr58684 is fixed */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-4-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-4-float.c new file mode 100644 index 0000000..e719c37 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-4-float.c @@ -0,0 +1,21 @@ +/* { dg-do run { xfail { powerpc*-*-* } } } */ +/* remove the xfail for powerpc when pr58684 is fixed */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ + +#include <fenv.h> + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x >= -__builtin_inf (); + if (i != 0 || !fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-4.c b/gcc/testsuite/gcc.dg/torture/inf-compare-4.c index 685562d..43b2b2f 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-4.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-4.c @@ -1,7 +1,7 @@ /* { dg-do run { xfail { powerpc*-*-* } } } */ /* remove the xfail for powerpc when pr58684 is fixed */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-5-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-5-float.c new file mode 100644 index 0000000..0050644 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-5-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ + +#include <fenv.h> + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x == __builtin_inf (); + if (i != 0 || fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-5.c b/gcc/testsuite/gcc.dg/torture/inf-compare-5.c index d7f17e7..37289b4 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-5.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-5.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-6-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-6-float.c new file mode 100644 index 0000000..46e8758 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-6-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ + +#include <fenv.h> + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x == -__builtin_inf (); + if (i != 0 || fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-6.c b/gcc/testsuite/gcc.dg/torture/inf-compare-6.c index 2dd862b..7a8ff01 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-6.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-6.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-7-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-7-float.c new file mode 100644 index 0000000..11d987a --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-7-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ + +#include <fenv.h> + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x != __builtin_inf (); + if (i != 1 || fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-7.c b/gcc/testsuite/gcc.dg/torture/inf-compare-7.c index 36676b4..c0e080b 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-7.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-7.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-8-float.c b/gcc/testsuite/gcc.dg/torture/inf-compare-8-float.c new file mode 100644 index 0000000..5510c67 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-8-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-add-options ieee } */ +/* { dg-require-effective-target fenv_exceptions } */ + +#include <fenv.h> + +extern void abort (void); +extern void exit (int); + +volatile float x = __builtin_nan (""); +volatile int i; + +int +main (void) +{ + i = x != -__builtin_inf (); + if (i != 1 || fetestexcept (FE_INVALID)) + abort (); +} diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-8.c b/gcc/testsuite/gcc.dg/torture/inf-compare-8.c index cfda813..ebc0260 100644 --- a/gcc/testsuite/gcc.dg/torture/inf-compare-8.c +++ b/gcc/testsuite/gcc.dg/torture/inf-compare-8.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/torture/pr52451.c b/gcc/testsuite/gcc.dg/torture/pr52451.c index 3f1580d5..aa19c1b 100644 --- a/gcc/testsuite/gcc.dg/torture/pr52451.c +++ b/gcc/testsuite/gcc.dg/torture/pr52451.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_long_double } */ /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/torture/pr82692.c b/gcc/testsuite/gcc.dg/torture/pr82692.c index 254ace1..88a30b9 100644 --- a/gcc/testsuite/gcc.dg/torture/pr82692.c +++ b/gcc/testsuite/gcc.dg/torture/pr82692.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-add-options ieee } */ -/* { dg-require-effective-target fenv_exceptions } */ +/* { dg-require-effective-target fenv_exceptions_double } */ #include <fenv.h> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr107195-3.c b/gcc/testsuite/gcc.dg/tree-ssa/pr107195-3.c new file mode 100644 index 0000000..eba4218 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr107195-3.c @@ -0,0 +1,112 @@ +/* Inspired by 'libgomp.oacc-c-c++-common/nvptx-sese-1.c'. */ + +/* { dg-additional-options -O1 } */ +/* { dg-additional-options -fdump-tree-dom3-raw } */ + + +extern int +__attribute__((const)) +foo1 (int); + +int f1 (int r) +{ + if (foo1 (r)) /* If this first 'if' holds... */ + r *= 2; /* ..., 'r' now has a zero-value lower-most bit... */ + + if (r & 1) /* ..., so this second 'if' can never hold... */ + { /* ..., so this is unreachable. */ + /* In constrast, if the first 'if' does not hold ('foo1 (r) == 0'), the + second 'if' may hold, but we know ('foo1' being 'const') that + 'foo1 (r) == 0', so don't have to re-evaluate it here: */ + r += foo1 (r); + } + + return r; +} +/* Thus, if optimizing, we only ever expect one call of 'foo1'. + { dg-final { scan-tree-dump-times {gimple_call <foo1,} 1 dom3 } } */ + + +extern int +__attribute__((const)) +foo2 (int); + +int f2 (int r) +{ + if (foo2 (r)) + r *= 8; + + if (r & 7) + r += foo2 (r); + + return r; +} +/* { dg-final { scan-tree-dump-times {gimple_call <foo2,} 1 dom3 } } */ + + +extern int +__attribute__((const)) +foo3 (int); + +int f3 (int r) +{ + if (foo3 (r)) + r <<= 4; + + if ((r & 64) && ((r & 8) || (r & 4) || (r & 2) || (r & 1))) + r += foo3 (r); + + return r; +} +/* { dg-final { scan-tree-dump-times {gimple_call <foo3,} 1 dom3 } } */ + + +extern int +__attribute__((const)) +foo4 (int); + +int f4 (int r) +{ + if (foo4 (r)) + r *= 8; + + if ((r >> 1) & 2) + r += foo4 (r); + + return r; +} +/* { dg-final { scan-tree-dump-times {gimple_call <foo4,} 1 dom3 } } */ + + +extern int +__attribute__((const)) +foo5 (int); + +int f5 (int r) /* Works for both 'signed' and 'unsigned'. */ +{ + if (foo5 (r)) + r *= 2; + + if ((r % 2) != 0) + r += foo5 (r); + + return r; +} +/* { dg-final { scan-tree-dump-times {gimple_call <foo5,} 1 dom3 } } */ + + +extern int +__attribute__((const)) +foo6 (int); + +int f6 (unsigned int r) /* 'unsigned' is important here. */ +{ + if (foo6 (r)) + r *= 2; + + if ((r % 2) == 1) + r += foo6 (r); + + return r; +} +/* { dg-final { scan-tree-dump-times {gimple_call <foo6,} 1 dom3 } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr107323.c b/gcc/testsuite/gcc.dg/tree-ssa/pr107323.c new file mode 100644 index 0000000..1204b6e --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr107323.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fno-tree-vectorize" } */ + +int A[4]; +int B[4]; + +static const char *__attribute__((noipa)) foo() +{ + return "1"; +} + +int main() +{ + const char *s = foo(); + + A[0] = 1000; + for(int i = 1; i < 4; ++i) { + B[i] = 0; + A[i] = 0; + if(s[0]) + B[i] = 1; + A[i] = A[i - 1]; + } + + if (A[3] != 1000) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/vect/pr107326.c b/gcc/testsuite/gcc.dg/vect/pr107326.c new file mode 100644 index 0000000..333a515 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr107326.c @@ -0,0 +1,24 @@ +/* PR107326 */ +/* { dg-do compile } */ +struct Gsymtab { + unsigned int : 8; + unsigned int visited_somewhere : 1; +}; + +extern struct Gsymtab glob_symtab[]; + +int +visit_children (int i) +{ + int numvisited = 0; + + while (i < 1) + { + if (glob_symtab[i].visited_somewhere) + ++numvisited; + + ++i; + } + + return numvisited; +} diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-7.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-7.c new file mode 100644 index 0000000..3b505db --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-7.c @@ -0,0 +1,43 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { + unsigned i : 8; + char a : 4; +}; + +#define N 32 +#define ELT0 {0xFUL, 0} +#define ELT1 {0xFUL, 1} +#define ELT2 {0xFUL, 2} +#define ELT3 {0xFUL, 3} +#define RES 48 +struct s A[N] + = { ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3}; + +int __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + int res = 0; + for (int i = 0; i < n; ++i) + res += ptr[i].a; + return res; +} + +int main (void) +{ + check_vect (); + + if (f(&A[0], N) != RES) + abort (); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brka_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brka_1.c index 24aa8f3..6146ef8 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brka_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brka_1.c @@ -18,5 +18,6 @@ test2 (svbool_t pg, svbool_t x, svbool_t y, int *any) return svptest_any (pg, res); } -/* { dg-final { scan-assembler-times {\tbrkas\tp[0-9]+\.b, p[0-9]+/m,} 2 } } */ -/* { dg-final { scan-assembler-not {\tbrka\t} } } */ +/* { dg-final { scan-assembler-times {\tbrka\t} 2 } } */ +/* { dg-final { scan-assembler-times {\tptest\t} 2 } } */ +/* { dg-final { scan-assembler-not {\tbrkas\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkb_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkb_1.c index 07e3622..7f1c758 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkb_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkb_1.c @@ -18,5 +18,6 @@ test2 (svbool_t pg, svbool_t x, svbool_t y, int *any) return svptest_any (pg, res); } -/* { dg-final { scan-assembler-times {\tbrkbs\tp[0-9]+\.b, p[0-9]+/m,} 2 } } */ -/* { dg-final { scan-assembler-not {\tbrkb\t} } } */ +/* { dg-final { scan-assembler-times {\tbrkb\t} 2 } } */ +/* { dg-final { scan-assembler-times {\tptest\t} 2 } } */ +/* { dg-final { scan-assembler-not {\tbrkbs\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_1.c index 7fd9318..c548810 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_1.c @@ -18,5 +18,6 @@ test2 (svbool_t pg, svbool_t x, svbool_t y, int *any) return svptest_any (pg, res); } -/* { dg-final { scan-assembler-times {\tbrkns\t} 2 } } */ -/* { dg-final { scan-assembler-not {\tbrkn\t} } } */ +/* { dg-final { scan-assembler-times {\tbrkn\t} 2 } } */ +/* { dg-final { scan-assembler-times {\tptest\t} 2 } } */ +/* { dg-final { scan-assembler-not {\tbrkns\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_2.c new file mode 100644 index 0000000..74b6927 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/brkn_2.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#include <arm_sve.h> + +void +test1 (svbool_t pg, svbool_t x, svbool_t y, int *any, svbool_t *ptr) +{ + svbool_t res = svbrkn_z (pg, x, y); + *any = svptest_any (svptrue_b8 (), res); + *ptr = res; +} + +int +test2 (svbool_t pg, svbool_t x, svbool_t y, int *any) +{ + svbool_t res = svbrkn_z (pg, x, y); + return svptest_any (svptrue_b8 (), res); +} + +/* { dg-final { scan-assembler-times {\tbrkns\t} 2 } } */ +/* { dg-final { scan-assembler-not {\tbrkn\t} } } */ +/* { dg-final { scan-assembler-not {\tptest\t} } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx-check.h b/gcc/testsuite/gcc.target/i386/avx-check.h index 7ddca9d..77507ca 100644 --- a/gcc/testsuite/gcc.target/i386/avx-check.h +++ b/gcc/testsuite/gcc.target/i386/avx-check.h @@ -22,7 +22,14 @@ main () /* Run AVX test only if host has AVX support. */ if (((ecx & (bit_AVX | bit_OSXSAVE)) == (bit_AVX | bit_OSXSAVE)) - && avx_os_support ()) + && avx_os_support () +#ifdef AVXIFMA + && __builtin_cpu_supports ("avxifma") +#endif +#ifdef AVXVNNIINT8 + && __builtin_cpu_supports ("avxvnniint8") +#endif + ) { do_test (); #ifdef DEBUG diff --git a/gcc/testsuite/gcc.target/i386/avx-ifma-1.c b/gcc/testsuite/gcc.target/i386/avx-ifma-1.c new file mode 100644 index 0000000..a0cfc44 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ifma-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavxifma -O2" } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x,y,z; +volatile __m128i x_,y_,z_; + +void extern +avxifma_test (void) +{ + x = _mm256_madd52hi_epu64 (x, y, z); + x = _mm256_madd52lo_epu64 (x, y, z); + x_ = _mm_madd52hi_epu64 (x_, y_, z_); + x_ = _mm_madd52lo_epu64 (x_, y_, z_); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-ifma-2.c b/gcc/testsuite/gcc.target/i386/avx-ifma-2.c new file mode 100644 index 0000000..5f82ffe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ifma-2.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x,y,z; +volatile __m128i x_,y_,z_; + +__attribute__((target("avxifma"))) +void +avxifma_test (void) +{ + x = _mm256_madd52hi_epu64 (x, y, z); + x = _mm256_madd52lo_epu64 (x, y, z); + x_ = _mm_madd52hi_epu64 (x_, y_, z_); + x_ = _mm_madd52lo_epu64 (x_, y_, z_); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-ifma-3.c b/gcc/testsuite/gcc.target/i386/avx-ifma-3.c new file mode 100644 index 0000000..536c1de --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ifma-3.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64" } */ + +__attribute__ ((__gnu_inline__, __always_inline__, target("avxifma"))) +inline int +foo (void) /* { dg-error "inlining failed in call to 'always_inline' .* target specific option mismatch" } */ +{ + return 0; +} + +__attribute__ ((target("avx512ifma,avx512vl"))) +int +bar (void) +{ + return foo (); /* { dg-message "called from here" } */ +} diff --git a/gcc/testsuite/gcc.target/i386/avx-ifma-4.c b/gcc/testsuite/gcc.target/i386/avx-ifma-4.c new file mode 100644 index 0000000..62d2649 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ifma-4.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64" } */ + +__attribute__ ((__gnu_inline__, __always_inline__, target("avx512ifma,avx512vl"))) +inline int +foo (void) /* { dg-error "inlining failed in call to 'always_inline' .* target specific option mismatch" } */ +{ + return 0; +} + +__attribute__ ((target("avxifma"))) +int +bar (void) +{ + return foo (); /* { dg-message "called from here" } */ +} diff --git a/gcc/testsuite/gcc.target/i386/avx-ifma-5.c b/gcc/testsuite/gcc.target/i386/avx-ifma-5.c new file mode 100644 index 0000000..b6110e5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ifma-5.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavxifma -mavx512ifma -mavx512vl" } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ + +#include <immintrin.h> + +#include "avx-ifma-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx-ifma-6.c b/gcc/testsuite/gcc.target/i386/avx-ifma-6.c new file mode 100644 index 0000000..6388373 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ifma-6.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-mavxifma -O2" } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x,y,z; +volatile __m128i x_,y_,z_; + +void extern +avxifma_test (void) +{ + x = _mm256_madd52hi_avx_epu64 (x, y, z); + x = _mm256_madd52lo_avx_epu64 (x, y, z); + x_ = _mm_madd52hi_avx_epu64 (x_, y_, z_); + x_ = _mm_madd52lo_avx_epu64 (x_, y_, z_); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-ifma-vpmaddhuq-2.c b/gcc/testsuite/gcc.target/i386/avx-ifma-vpmaddhuq-2.c new file mode 100644 index 0000000..c9efee3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ifma-vpmaddhuq-2.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavxifma" } */ +/* { dg-require-effective-target avxifma } */ +#define AVXIFMA +#ifndef CHECK +#define CHECK "avx-check.h" +#endif + +#ifndef TEST +#define TEST avx_test +#endif + +#include CHECK + +void +CALC (long long *r, long long *s1, long long *s2, long long *s3, int size) +{ + int i; + long long a,b; + + for (i = 0; i < size; i++) + { + /* Simulate higher 52 bits out of 104 bit, + by shifting opernads with 0 in lower 26 bits. */ + a = s2[i] >> 26; + b = s3[i] >> 26; + r[i] = a * b + s1[i]; + } +} + +void +TEST (void) +{ + union256i_q src1_256, src2_256, dst_256; + union128i_q src1_128, src2_128, dst_128; + long long dst_ref_256[4], dst_ref_128[2]; + int i; + + for (i = 0; i < 4; i++) + { + src1_256.a[i] = 15 + 3467 * i; + src2_256.a[i] = 9217 + i; + src1_256.a[i] = src1_256.a[i] << 26; + src2_256.a[i] = src2_256.a[i] << 26; + src1_256.a[i] &= ((1LL << 52) - 1); + src2_256.a[i] &= ((1LL << 52) - 1); + dst_256.a[i] = -1; + } + + for (i = 0; i < 2; i++) + { + src1_128.a[i] = 16 + 3467 * i; + src2_128.a[i] = 9127 + i; + src1_128.a[i] = src1_128.a[i] << 26; + src2_128.a[i] = src2_128.a[i] << 26; + src1_128.a[i] &= ((1LL << 52) - 1); + src2_128.a[i] &= ((1LL << 52) - 1); + dst_128.a[i] = -1; + } + + CALC (dst_ref_256, dst_256.a, src1_256.a, src2_256.a, 4); + dst_256.x = _mm256_madd52hi_avx_epu64 (dst_256.x, src1_256.x, src2_256.x); + if (check_union256i_q (dst_256, dst_ref_256)) + abort (); + + CALC (dst_ref_128, dst_128.a, src1_128.a, src2_128.a, 2); + dst_128.x = _mm_madd52hi_avx_epu64 (dst_128.x, src1_128.x, src2_128.x); + if (check_union128i_q (dst_128, dst_ref_128)) + abort (); + +} + diff --git a/gcc/testsuite/gcc.target/i386/avx-ifma-vpmaddluq-2.c b/gcc/testsuite/gcc.target/i386/avx-ifma-vpmaddluq-2.c new file mode 100644 index 0000000..600978e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ifma-vpmaddluq-2.c @@ -0,0 +1,61 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavxifma" } */ +/* { dg-require-effective-target avxifma } */ +#define AVXIFMA +#ifndef CHECK +#define CHECK "avx-check.h" +#endif + +#ifndef TEST +#define TEST avx_test +#endif + +#include CHECK + +void +CALC (unsigned long long *r, unsigned long long *s1, + unsigned long long *s2, unsigned long long *s3, + int size) +{ + int i; + + for (i = 0; i < size; i++) + { + r[i] = s2[i] * s3[i] + s1[i]; + } +} + +void +TEST (void) +{ + union256i_q src1_256, src2_256, dst_256; + union128i_q src1_128, src2_128, dst_128; + unsigned long long dst_ref_256[4], dst_ref_128[2]; + int i; + + for (i = 0; i < 4; i++) + { + src1_256.a[i] = 3450 * i; + src2_256.a[i] = 7863 * i; + dst_256.a[i] = 117; + } + + for (i = 0; i < 2; i++) + { + src1_128.a[i] = 3540 * i; + src2_128.a[i] = 7683 * i; + dst_128.a[i] = 117; + } + + CALC (dst_ref_256, dst_256.a, src1_256.a, src2_256.a, 4); + dst_256.x = _mm256_madd52lo_avx_epu64 (dst_256.x, src1_256.x, src2_256.x); + if (check_union256i_q (dst_256, dst_ref_256)) + abort (); + + CALC (dst_ref_128, dst_128.a, src1_128.a, src2_128.a, 2); + dst_128.x = _mm_madd52lo_avx_epu64 (dst_128.x, src1_128.x, src2_128.x); + if (check_union128i_q (dst_128, dst_ref_128)) + abort (); + +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddhuq-1.c b/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddhuq-1a.c index 78e2b86..78e2b86 100644 --- a/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddhuq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddhuq-1a.c diff --git a/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddhuq-1b.c b/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddhuq-1b.c new file mode 100644 index 0000000..67e94ba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddhuq-1b.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512ifma -mavx512vl -mavxifma -O2" } */ +/* { dg-final { scan-assembler-times "vpmadd52huq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 3 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52huq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52huq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52huq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 3 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52huq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52huq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52huq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52huq\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+" 3 } } */ +/* { dg-final { scan-assembler-times "vpmadd52huq\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52huq\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i _x1, _y1, _z1; +volatile __m256i _x2, _y2, _z2; +volatile __m128i _x3, _y3, _z3; + +void extern +avx512ifma_test (void) +{ + _x3 = _mm_madd52hi_epu64 (_x3, _y3, _z3); + _x3 = _mm_mask_madd52hi_epu64 (_x3, 2, _y3, _z3); + _x3 = _mm_maskz_madd52hi_epu64 (2, _x3, _y3, _z3); + _x2 = _mm256_madd52hi_epu64 (_x2, _y2, _z2); + _x2 = _mm256_mask_madd52hi_epu64 (_x2, 3, _y2, _z2); + _x2 = _mm256_maskz_madd52hi_epu64 (3, _x2, _y2, _z2); + _x1 = _mm512_madd52hi_epu64 (_x1, _y1, _z1); + _x1 = _mm512_mask_madd52hi_epu64 (_x1, 3, _y1, _z1); + _x1 = _mm512_maskz_madd52hi_epu64 (3, _x1, _y1, _z1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddluq-1.c b/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddluq-1a.c index 1f76613..1f76613 100644 --- a/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddluq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddluq-1a.c diff --git a/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddluq-1b.c b/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddluq-1b.c new file mode 100644 index 0000000..4b8ea27 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512ifma-vpmaddluq-1b.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512ifma -mavx512vl -mavxifma -O2" } */ +/* { dg-final { scan-assembler-times "vpmadd52luq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 3 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52luq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52luq\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52luq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 3 } } */ +/* { dg-final { scan-assembler-times "\{vex\} vpmadd52luq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52luq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52luq\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52luq\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+" 3 } } */ +/* { dg-final { scan-assembler-times "vpmadd52luq\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpmadd52luq\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}" 1 } } */ + +#include <immintrin.h> + +volatile __m512i _x1, _y1, _z1; +volatile __m256i _x2, _y2, _z2; +volatile __m128i _x3, _y3, _z3; + +void extern +avx512ifma_test (void) +{ + _x3 = _mm_madd52lo_epu64 (_x3, _y3, _z3); + _x3 = _mm_mask_madd52lo_epu64 (_x3, 2, _y3, _z3); + _x3 = _mm_maskz_madd52lo_epu64 (2, _x3, _y3, _z3); + _x2 = _mm256_madd52lo_epu64 (_x2, _y2, _z2); + _x2 = _mm256_mask_madd52lo_epu64 (_x2, 3, _y2, _z2); + _x2 = _mm256_maskz_madd52lo_epu64 (3, _x2, _y2, _z2); + _x1 = _mm512_madd52lo_epu64 (_x1, _y1, _z1); + _x1 = _mm512_mask_madd52lo_epu64 (_x1, 3, _y1, _z1); + _x1 = _mm512_maskz_madd52lo_epu64 (3, _x1, _y1, _z1); +} diff --git a/gcc/testsuite/gcc.target/i386/avxvnniint8-1.c b/gcc/testsuite/gcc.target/i386/avxvnniint8-1.c new file mode 100644 index 0000000..d6942f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avxvnniint8-1.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-mavxvnniint8 -O2" } */ +/* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbssds\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbssds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbsud\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbsud\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbsuds\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbsuds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbuud\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbuud\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbuuds\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpbuuds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ + + +#include <immintrin.h> + +volatile __m256i x,y,z; +volatile __m128i x_,y_,z_; +volatile __mmask8 m; + +void extern +avxvnniint8_test (void) +{ + x = _mm256_dpbssd_epi32 (x, y, z); + x_ = _mm_dpbssd_epi32 (x_, y_, z_); + + x = _mm256_dpbssds_epi32 (x, y, z); + x_ = _mm_dpbssds_epi32 (x_, y_, z_); + + x = _mm256_dpbsud_epi32 (x, y, z); + x_ = _mm_dpbsud_epi32 (x_, y_, z_); + + x = _mm256_dpbsuds_epi32 (x, y, z); + x_ = _mm_dpbsuds_epi32 (x_, y_, z_); + + x = _mm256_dpbuud_epi32 (x, y, z); + x_ = _mm_dpbuud_epi32 (x_, y_, z_); + + x = _mm256_dpbuuds_epi32 (x, y, z); + x_ = _mm_dpbuuds_epi32 (x_, y_, z_); +} diff --git a/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbssd-2.c b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbssd-2.c new file mode 100644 index 0000000..5016de3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbssd-2.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavxvnniint8" } */ +/* { dg-require-effective-target avxvnniint8 } */ +#define AVXVNNIINT8 +#ifndef CHECK +#define CHECK "avx-check.h" +#endif + +#ifndef TEST +#define TEST avx_test +#endif + +#include CHECK + +static void +CALC (int *r, int *dst, char *s1, char *s2, int size) +{ + short tempres[32]; + for (int i = 0; i < size; i++) { + tempres[i] = (short) s1[i] * (short) s2[i]; + } + for (int i = 0; i < size / 4; i++) { + long long test = (long long) dst[i] + tempres[i * 4] + tempres[i * 4 + 1] + + tempres[i * 4 + 2] + tempres[i * 4 + 3]; + r[i] = test; + } +} + +void +TEST (void) +{ + int i; + union256i_d res_256; + union256i_b src2_256; + union256i_b src1_256; + int res_ref_256[8]; + + for (i = 0; i < 32; i++) + { + int sign = i % 2 ? 1 : -1; + src1_256.a[i] = 10 + 3 * i + sign; + src2_256.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 8; i++) + res_256.a[i] = 0x7fffffff; + + CALC (res_ref_256, res_256.a, src1_256.a, src2_256.a, 32); + res_256.x = _mm256_dpbssd_epi32 (res_256.x, src1_256.x, src2_256.x); + if (check_union256i_d (res_256, res_ref_256)) + abort (); + + union128i_d res_128; + union128i_b src2_128; + union128i_b src1_128; + int res_ref_128[4]; + + for (i = 0; i < 16; i++) + { + int sign = i % 2 ? 1 : -1; + src1_128.a[i] = 10 + 3 * i * i + sign; + src2_128.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 4; i++) + res_128.a[i] = 0x7fffffff; + + CALC (res_ref_128, res_128.a, src1_128.a, src2_128.a, 16); + res_128.x = _mm_dpbssd_epi32 (res_128.x, src1_128.x, src2_128.x); + if (check_union128i_d (res_128, res_ref_128)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbssds-2.c b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbssds-2.c new file mode 100644 index 0000000..6de5062 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbssds-2.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavxvnniint8" } */ +/* { dg-require-effective-target avxvnniint8 } */ +#define AVXVNNIINT8 +#ifndef CHECK +#define CHECK "avx-check.h" +#endif + +#ifndef TEST +#define TEST avx_test +#endif + +#include CHECK + +static void +CALC (int *r, int *dst, char *s1, char *s2, int size) +{ + short tempres[32]; + for (int i = 0; i < size; i++) { + tempres[i] = (short) s1[i] * (short) s2[i]; + } + for (int i = 0; i < size / 4; i++) { + long long test = (long long) dst[i] + tempres[i * 4] + tempres[i * 4 + 1] + + tempres[i * 4 + 2] + tempres[i * 4 + 3]; + r[i] = test > 0x7FFFFFFF ? 0x7FFFFFFF : test; + } +} + +void +TEST (void) +{ + int i; + union256i_d res_256; + union256i_b src2_256; + union256i_b src1_256; + int res_ref_256[8]; + + for (i = 0; i < 32; i++) + { + int sign = i % 2 ? 1 : -1; + src1_256.a[i] = 10 + 3 * i + sign; + src2_256.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 8; i++) + res_256.a[i] = 0x7fffffff; + + CALC (res_ref_256, res_256.a, src1_256.a, src2_256.a, 32); + res_256.x = _mm256_dpbssds_epi32 (res_256.x, src1_256.x, src2_256.x); + if (check_union256i_d (res_256, res_ref_256)) + abort (); + + union128i_d res_128; + union128i_b src2_128; + union128i_b src1_128; + int res_ref_128[4]; + + for (i = 0; i < 16; i++) + { + int sign = i % 2 ? 1 : -1; + src1_128.a[i] = 10 + 3 * i * i + sign; + src2_128.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 4; i++) + res_128.a[i] = 0x7fffffff; + + CALC (res_ref_128, res_128.a, src1_128.a, src2_128.a, 16); + res_128.x = _mm_dpbssds_epi32 (res_128.x, src1_128.x, src2_128.x); + if (check_union128i_d (res_128, res_ref_128)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbsud-2.c b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbsud-2.c new file mode 100644 index 0000000..6e4ffd1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbsud-2.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavxvnniint8" } */ +/* { dg-require-effective-target avxvnniint8 } */ +#define AVXVNNIINT8 +#ifndef CHECK +#define CHECK "avx-check.h" +#endif + +#ifndef TEST +#define TEST avx_test +#endif + +#include CHECK + +static void +CALC (int *r, int *dst, char *s1, unsigned char *s2, int size) +{ + short tempres[32]; + for (int i = 0; i < size; i++) { + tempres[i] = (short) s1[i] * (unsigned short) s2[i]; + } + for (int i = 0; i < size / 4; i++) { + long long test = (long long) dst[i] + tempres[i * 4] + tempres[i * 4 + 1] + + tempres[i * 4 + 2] + tempres[i * 4 + 3]; + r[i] = test; + } +} + +void +TEST (void) +{ + int i; + union256i_d res_256; + union256i_b src1_256; + union256i_ub src2_256; + int res_ref_256[8]; + + for (i = 0; i < 32; i++) + { + int sign = i % 2 ? 1 : -1; + src1_256.a[i] = 10 + 3 * i + sign; + src2_256.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 8; i++) + res_256.a[i] = 0x7fffffff; + + CALC (res_ref_256, res_256.a, src1_256.a, src2_256.a, 32); + res_256.x = _mm256_dpbsud_epi32 (res_256.x, src1_256.x, src2_256.x); + if (check_union256i_d (res_256, res_ref_256)) + abort (); + + union128i_d res_128; + union128i_b src1_128; + union128i_ub src2_128; + int res_ref_128[4]; + + for (i = 0; i < 16; i++) + { + int sign = i % 2 ? 1 : -1; + src1_128.a[i] = 10 + 3 * i * i + sign; + src2_128.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 4; i++) + res_128.a[i] = 0x7fffffff; + + CALC (res_ref_128, res_128.a, src1_128.a, src2_128.a, 16); + res_128.x = _mm_dpbsud_epi32 (res_128.x, src1_128.x, src2_128.x); + if (check_union128i_d (res_128, res_ref_128)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbsuds-2.c b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbsuds-2.c new file mode 100644 index 0000000..ad4b604 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbsuds-2.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavxvnniint8" } */ +/* { dg-require-effective-target avxvnniint8 } */ +#define AVXVNNIINT8 +#ifndef CHECK +#define CHECK "avx-check.h" +#endif + +#ifndef TEST +#define TEST avx_test +#endif + +#include CHECK + +static void +CALC (int *r, int *dst, char *s1, unsigned char *s2, int size) +{ + short tempres[32]; + for (int i = 0; i < size; i++) { + tempres[i] = (short) s1[i] * (unsigned short) s2[i]; + } + for (int i = 0; i < size / 4; i++) { + long long test = (long long) dst[i] + tempres[i * 4] + tempres[i * 4 + 1] + + tempres[i * 4 + 2] + tempres[i * 4 + 3]; + r[i] = test > 0x7FFFFFFF ? 0x7FFFFFFF : test; + } +} + +void +TEST (void) +{ + int i; + union256i_d res_256; + union256i_b src1_256; + union256i_ub src2_256; + int res_ref_256[8]; + + for (i = 0; i < 32; i++) + { + int sign = i % 2 ? 1 : -1; + src1_256.a[i] = 10 + 3 * i + sign; + src2_256.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 8; i++) + res_256.a[i] = 0x7fffffff; + + CALC (res_ref_256, res_256.a, src1_256.a, src2_256.a, 32); + res_256.x = _mm256_dpbsuds_epi32 (res_256.x, src1_256.x, src2_256.x); + if (check_union256i_d (res_256, res_ref_256)) + abort (); + + union128i_d res_128; + union128i_b src1_128; + union128i_ub src2_128; + int res_ref_128[4]; + + for (i = 0; i < 16; i++) + { + int sign = i % 2 ? 1 : -1; + src1_128.a[i] = 10 + 3 * i * i + sign; + src2_128.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 4; i++) + res_128.a[i] = 0x7fffffff; + + CALC (res_ref_128, res_128.a, src1_128.a, src2_128.a, 16); + res_128.x = _mm_dpbsuds_epi32 (res_128.x, src1_128.x, src2_128.x); + if (check_union128i_d (res_128, res_ref_128)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbuud-2.c b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbuud-2.c new file mode 100644 index 0000000..6590915 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbuud-2.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavxvnniint8" } */ +/* { dg-require-effective-target avxvnniint8 } */ +#define AVXVNNIINT8 +#ifndef CHECK +#define CHECK "avx-check.h" +#endif + +#ifndef TEST +#define TEST avx_test +#endif + +#include CHECK + +static void +CALC (unsigned int *r, unsigned int *dst, unsigned char *s1, unsigned char *s2, int size) +{ + unsigned short tempres[32]; + for (int i = 0; i < size; i++) { + tempres[i] = (unsigned short) s1[i] * (unsigned short) s2[i]; + } + for (int i = 0; i < size / 4; i++) { + unsigned int test = (unsigned int) dst[i] + tempres[i * 4] + tempres[i * 4 + 1] + + tempres[i * 4 + 2] + tempres[i * 4 + 3]; + r[i] = test; + } +} + +void +TEST (void) +{ + int i; + union256i_ud res_256; + union256i_ub src2_256; + union256i_ub src1_256; + unsigned int res_ref_256[8]; + + for (i = 0; i < 32; i++) + { + int sign = i % 2 ? 1 : -1; + src1_256.a[i] = 10 + 3 * i + sign; + src2_256.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 8; i++) + res_256.a[i] = 0x7fffffff; + + CALC (res_ref_256, res_256.a, src1_256.a, src2_256.a, 32); + res_256.x = _mm256_dpbuud_epi32 (res_256.x, src1_256.x, src2_256.x); + if (check_union256i_ud (res_256, res_ref_256)) + abort (); + + union128i_ud res_128; + union128i_ub src2_128; + union128i_ub src1_128; + unsigned int res_ref_128[4]; + + for (i = 0; i < 16; i++) + { + int sign = i % 2 ? 1 : -1; + src1_128.a[i] = 10 + 3 * i * i + sign; + src2_128.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 4; i++) + res_128.a[i] = 0x7fffffff; + + CALC (res_ref_128, res_128.a, src1_128.a, src2_128.a, 16); + res_128.x = _mm_dpbuud_epi32 (res_128.x, src1_128.x, src2_128.x); + if (check_union128i_ud (res_128, res_ref_128)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbuuds-2.c b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbuuds-2.c new file mode 100644 index 0000000..970e4a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avxvnniint8-vpdpbuuds-2.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavxvnniint8" } */ +/* { dg-require-effective-target avxvnniint8 } */ +#define AVXVNNIINT8 +#ifndef CHECK +#define CHECK "avx-check.h" +#endif + +#ifndef TEST +#define TEST avx_test +#endif + +#include CHECK + +static void +CALC (unsigned int *r, unsigned int *dst, unsigned char *s1, unsigned char *s2, int size) +{ + unsigned short tempres[32]; + for (int i = 0; i < size; i++) { + tempres[i] = (unsigned short) s1[i] * (unsigned short) s2[i]; + } + for (int i = 0; i < size / 4; i++) { + unsigned int test = (unsigned int) dst[i] + tempres[i * 4] + tempres[i * 4 + 1] + + tempres[i * 4 + 2] + tempres[i * 4 + 3]; + r[i] = test > 0xFFFFFFFF ? 0xFFFFFFFF : test; + } +} + +void +TEST (void) +{ + int i; + union256i_ud res_256; + union256i_ub src2_256; + union256i_ub src1_256; + unsigned int res_ref_256[8]; + + for (i = 0; i < 32; i++) + { + int sign = i % 2 ? 1 : -1; + src1_256.a[i] = 10 + 3 * i + sign; + src2_256.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 8; i++) + res_256.a[i] = 0x7fffffff; + + CALC (res_ref_256, res_256.a, src1_256.a, src2_256.a, 32); + res_256.x = _mm256_dpbuuds_epi32 (res_256.x, src1_256.x, src2_256.x); + if (check_union256i_ud (res_256, res_ref_256)) + abort (); + + union128i_ud res_128; + union128i_ub src2_128; + union128i_ub src1_128; + unsigned int res_ref_128[4]; + + for (i = 0; i < 16; i++) + { + int sign = i % 2 ? 1 : -1; + src1_128.a[i] = 10 + 3 * i * i + sign; + src2_128.a[i] = sign * 10 * i * i; + } + + for (i = 0; i < 4; i++) + res_128.a[i] = 0x7fffffff; + + CALC (res_ref_128, res_128.a, src1_128.a, src2_128.a, 16); + res_128.x = _mm_dpbuuds_epi32 (res_128.x, src1_128.x, src2_128.x); + if (check_union128i_ud (res_128, res_ref_128)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc index b76dddb..fada66b 100644 --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc @@ -80,6 +80,8 @@ extern void test_keylocker (void) __attribute__((__target__("kl"))); extern void test_widekl (void) __attribute__((__target__("widekl"))); extern void test_avxvnni (void) __attribute__((__target__("avxvnni"))); extern void test_avx512fp16 (void) __attribute__((__target__("avx512fp16"))); +extern void test_avxifma (void) __attribute__((__target__("avxifma"))); +extern void test_avxvnniint8 (void) __attribute__((__target__("avxvnniint8"))); extern void test_no_sgx (void) __attribute__((__target__("no-sgx"))); extern void test_no_avx5124fmaps(void) __attribute__((__target__("no-avx5124fmaps"))); @@ -161,6 +163,8 @@ extern void test_no_keylocker (void) __attribute__((__target__("no-kl"))); extern void test_no_widekl (void) __attribute__((__target__("no-widekl"))); extern void test_no_avxvnni (void) __attribute__((__target__("no-avxvnni"))); extern void test_no_avx512fp16 (void) __attribute__((__target__("no-avx512fp16"))); +extern void test_no_avxifma (void) __attribute__((__target__("no-avxifma"))); +extern void test_no_avxvnniint8 (void) __attribute__((__target__("no-avxvnniint8"))); extern void test_arch_nocona (void) __attribute__((__target__("arch=nocona"))); extern void test_arch_core2 (void) __attribute__((__target__("arch=core2"))); @@ -200,6 +204,7 @@ extern void test_arch_bdver3 (void) __attribute__((__target__("arch=bdver3"))); extern void test_arch_znver1 (void) __attribute__((__target__("arch=znver1"))); extern void test_arch_znver2 (void) __attribute__((__target__("arch=znver2"))); extern void test_arch_znver3 (void) __attribute__((__target__("arch=znver3"))); +extern void test_arch_znver4 (void) __attribute__((__target__("arch=znver4"))); extern void test_tune_nocona (void) __attribute__((__target__("tune=nocona"))); extern void test_tune_core2 (void) __attribute__((__target__("tune=core2"))); @@ -223,6 +228,7 @@ extern void test_tune_generic (void) __attribute__((__target__("tune=generic")) extern void test_tune_znver1 (void) __attribute__((__target__("tune=znver1"))); extern void test_tune_znver2 (void) __attribute__((__target__("tune=znver2"))); extern void test_tune_znver3 (void) __attribute__((__target__("tune=znver3"))); +extern void test_tune_znver4 (void) __attribute__((__target__("tune=znver4"))); extern void test_fpmath_sse (void) __attribute__((__target__("sse2,fpmath=sse"))); extern void test_fpmath_387 (void) __attribute__((__target__("sse2,fpmath=387"))); diff --git a/gcc/testsuite/gcc.target/i386/pr107271.c b/gcc/testsuite/gcc.target/i386/pr107271.c index fe89c9a..3e11152 100644 --- a/gcc/testsuite/gcc.target/i386/pr107271.c +++ b/gcc/testsuite/gcc.target/i386/pr107271.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0" } */ +/* { dg-options "-O0 -Wno-psabi" } */ typedef int __attribute__((__vector_size__ (16))) V; diff --git a/gcc/testsuite/gcc.target/i386/pr107312.c b/gcc/testsuite/gcc.target/i386/pr107312.c new file mode 100644 index 0000000..b4180e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr107312.c @@ -0,0 +1,11 @@ +// { dg-do compile } +// { dg-options "-mavx512vbmi -O1 -ftree-loop-vectorize" } + +void +foo (_Float16 *r, short int *a) +{ + int i; + + for (i = 0; i < 32; ++i) + r[i] = !!a[i]; +} diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c index 375d4d1..ddde2df 100644 --- a/gcc/testsuite/gcc.target/i386/sse-12.c +++ b/gcc/testsuite/gcc.target/i386/sse-12.c @@ -3,7 +3,7 @@ popcntintrin.h gfniintrin.h and mm_malloc.h are usable with -O -std=c89 -pedantic-errors. */ /* { dg-do compile } */ -/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni" } */ +/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8" } */ #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c index e285c30..2b29321 100644 --- a/gcc/testsuite/gcc.target/i386/sse-13.c +++ b/gcc/testsuite/gcc.target/i386/sse-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavx512fp16" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavx512fp16 -mavxifma -mavxvnniint8" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c index f41493b..78b5104 100644 --- a/gcc/testsuite/gcc.target/i386/sse-14.c +++ b/gcc/testsuite/gcc.target/i386/sse-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavx512fp16" } */ +/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavx512fp16 -mavxifma -mavxvnniint8" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c index 31492ef..cc1c8cf 100644 --- a/gcc/testsuite/gcc.target/i386/sse-22.c +++ b/gcc/testsuite/gcc.target/i386/sse-22.c @@ -103,7 +103,7 @@ #ifndef DIFFERENT_PRAGMAS -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512vbmi2,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avx512fp16") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512vbmi2,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avx512fp16,avxifma,avxvnniint8") #endif /* Following intrinsics require immediate arguments. They @@ -220,7 +220,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1) /* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */ #ifdef DIFFERENT_PRAGMAS -#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx512vbmi2,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avx512fp16") +#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx512vbmi2,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avx512fp16,avxifma,avxvnniint8") #endif #include <immintrin.h> test_1 (_cvtss_sh, unsigned short, float, 1) diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c index f71a7b2..270f448 100644 --- a/gcc/testsuite/gcc.target/i386/sse-23.c +++ b/gcc/testsuite/gcc.target/i386/sse-23.c @@ -843,6 +843,6 @@ #define __builtin_ia32_vpclmulqdq_v2di(A, B, C) __builtin_ia32_vpclmulqdq_v2di(A, B, 1) #define __builtin_ia32_vpclmulqdq_v8di(A, B, C) __builtin_ia32_vpclmulqdq_v8di(A, B, 1) -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg,pconfig,wbnoinvd,avx512bf16,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avx512fp16") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg,pconfig,wbnoinvd,avx512bf16,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avx512fp16,avxifma,avxvnniint8") #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-1.c b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-1.c new file mode 100644 index 0000000..9cadab6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavxvnniint8 -O2" } */ +/* { dg-final { scan-assembler "vpdpbssd\t" } } */ +/* { dg-final { scan-assembler "vpdpbuud\t" } } */ + +int __attribute__((noinline, noclone, optimize("tree-vectorize"))) +sdot_prod_qi (char * restrict a, char * restrict b, + int c, int n) +{ + int i; + for (i = 0; i < n; i++) + { + c += ((int) a[i] * (int) b[i]); + } + return c; +} + +int __attribute__((noinline, noclone, optimize("tree-vectorize"))) +udot_prod_qi (unsigned char * restrict a, unsigned char *restrict b, + int c, int n) +{ + int i; + for (i = 0; i < n; i++) + { + c += ((int) a[i] * (int) b[i]); + } + return c; +} diff --git a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-2.c b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-2.c new file mode 100644 index 0000000..99853e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-2.c @@ -0,0 +1,75 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavxvnniint8" } */ +/* { dg-require-effective-target avxvnniint8 } */ + +#define AVXVNNIINT8 +#ifndef CHECK +#define CHECK "avx-check.h" +#endif + +#ifndef TEST +#define TEST avx_test +#endif + +#include CHECK +#include "vnniint8-auto-vectorize-1.c" + +#define N 256 +char a_i8[N], b_i8[N]; +unsigned char c_u8[N], d_u8[N]; +int i8_exp, i8_ref; + +int __attribute__((noipa, optimize("no-tree-vectorize"))) +sdot_prod_qi_scalar (char * restrict a, char * restrict b, + int c, int n) +{ + int i; + for (i = 0; i < n; i++) + { + c += ((int) a[i] * (int) b[i]); + } + return c; +} + +int __attribute__((noipa, optimize("no-tree-vectorize"))) +udot_prod_qi_scalar (unsigned char * restrict a, unsigned char *restrict b, + int c, int n) +{ + int i; + for (i = 0; i < n; i++) + { + c += ((int) a[i] * (int) b[i]); + } + return c; +} + +void init () +{ + int i; + + i8_exp = i8_ref = 127; + + for (i = 0; i < N; i++) + { + a_i8[i] = (-i + 4) % 128; + b_i8[i] = (i + 1) % 128; + c_u8[i] = (i + 3) % 256; + d_u8[i] = (i + 5) % 256; + } +} + +void +TEST (void) +{ + init (); + i8_exp = sdot_prod_qi (a_i8, b_i8, i8_exp, N); + i8_ref = sdot_prod_qi_scalar (a_i8, b_i8, i8_ref, N); + if (i8_exp != i8_ref) + abort (); + + init (); + i8_exp = udot_prod_qi (c_u8, d_u8, i8_exp, N); + i8_ref = udot_prod_qi_scalar (c_u8, d_u8, i8_ref, N); + if (i8_exp != i8_ref) + abort (); +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c new file mode 100644 index 0000000..661f2c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c @@ -0,0 +1,750 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */ + +#include <stddef.h> +#include <riscv_vector.h> + +size_t test_vsetvl_e8mf8_imm0() +{ + size_t vl = vsetvl_e8mf8(0); + return vl; +} + +size_t test_vsetvl_e8mf8_imm31() +{ + size_t vl = vsetvl_e8mf8(31); + return vl; +} + +size_t test_vsetvl_e8mf8_imm32() +{ + size_t vl = vsetvl_e8mf8(32); + return vl; +} + +size_t test_vsetvl_e8mf8(size_t avl) +{ + size_t vl = vsetvl_e8mf8(avl); + return vl; +} + +size_t test_vsetvlmax_e8mf8() +{ + size_t vl = vsetvlmax_e8mf8(); + return vl; +} + +size_t test_vsetvl_e8mf4_imm0() +{ + size_t vl = vsetvl_e8mf4(0); + return vl; +} + +size_t test_vsetvl_e8mf4_imm31() +{ + size_t vl = vsetvl_e8mf4(31); + return vl; +} + +size_t test_vsetvl_e8mf4_imm32() +{ + size_t vl = vsetvl_e8mf4(32); + return vl; +} + +size_t test_vsetvl_e8mf4(size_t avl) +{ + size_t vl = vsetvl_e8mf4(avl); + return vl; +} + +size_t test_vsetvlmax_e8mf4() +{ + size_t vl = vsetvlmax_e8mf4(); + return vl; +} + +size_t test_vsetvl_e8mf2_imm0() +{ + size_t vl = vsetvl_e8mf2(0); + return vl; +} + +size_t test_vsetvl_e8mf2_imm31() +{ + size_t vl = vsetvl_e8mf2(31); + return vl; +} + +size_t test_vsetvl_e8mf2_imm32() +{ + size_t vl = vsetvl_e8mf2(32); + return vl; +} + +size_t test_vsetvl_e8mf2(size_t avl) +{ + size_t vl = vsetvl_e8mf2(avl); + return vl; +} + +size_t test_vsetvlmax_e8mf2() +{ + size_t vl = vsetvlmax_e8mf2(); + return vl; +} + +size_t test_vsetvl_e8m1_imm0() +{ + size_t vl = vsetvl_e8m1(0); + return vl; +} + +size_t test_vsetvl_e8m1_imm31() +{ + size_t vl = vsetvl_e8m1(31); + return vl; +} + +size_t test_vsetvl_e8m1_imm32() +{ + size_t vl = vsetvl_e8m1(32); + return vl; +} + +size_t test_vsetvl_e8m1(size_t avl) +{ + size_t vl = vsetvl_e8m1(avl); + return vl; +} + +size_t test_vsetvlmax_e8m1() +{ + size_t vl = vsetvlmax_e8m1(); + return vl; +} + +size_t test_vsetvl_e8m2_imm0() +{ + size_t vl = vsetvl_e8m2(0); + return vl; +} + +size_t test_vsetvl_e8m2_imm31() +{ + size_t vl = vsetvl_e8m2(31); + return vl; +} + +size_t test_vsetvl_e8m2_imm32() +{ + size_t vl = vsetvl_e8m2(32); + return vl; +} + +size_t test_vsetvl_e8m2(size_t avl) +{ + size_t vl = vsetvl_e8m2(avl); + return vl; +} + +size_t test_vsetvlmax_e8m2() +{ + size_t vl = vsetvlmax_e8m2(); + return vl; +} + +size_t test_vsetvl_e8m4_imm0() +{ + size_t vl = vsetvl_e8m4(0); + return vl; +} + +size_t test_vsetvl_e8m4_imm31() +{ + size_t vl = vsetvl_e8m4(31); + return vl; +} + +size_t test_vsetvl_e8m4_imm32() +{ + size_t vl = vsetvl_e8m4(32); + return vl; +} +size_t test_vsetvl_e8m4(size_t avl) +{ + size_t vl = vsetvl_e8m4(avl); + return vl; +} + +size_t test_vsetvlmax_e8m4() +{ + size_t vl = vsetvlmax_e8m4(); + return vl; +} + +size_t test_vsetvl_e8m8_imm0() +{ + size_t vl = vsetvl_e8m8(0); + return vl; +} + +size_t test_vsetvl_e8m8_imm31() +{ + size_t vl = vsetvl_e8m8(31); + return vl; +} + +size_t test_vsetvl_e8m8_imm32() +{ + size_t vl = vsetvl_e8m8(32); + return vl; +} + +size_t test_vsetvl_e8m8(size_t avl) +{ + size_t vl = vsetvl_e8m8(avl); + return vl; +} + +size_t test_vsetvlmax_e8m8() +{ + size_t vl = vsetvlmax_e8m8(); + return vl; +} + +size_t test_vsetvl_e16mf4_imm0() +{ + size_t vl = vsetvl_e16mf4(0); + return vl; +} + +size_t test_vsetvl_e16mf4_imm31() +{ + size_t vl = vsetvl_e16mf4(31); + return vl; +} + +size_t test_vsetvl_e16mf4_imm32() +{ + size_t vl = vsetvl_e16mf4(32); + return vl; +} + +size_t test_vsetvl_e16mf4(size_t avl) +{ + size_t vl = vsetvl_e16mf4(avl); + return vl; +} + +size_t test_vsetvlmax_e16mf4() +{ + size_t vl = vsetvlmax_e16mf4(); + return vl; +} + +size_t test_vsetvl_e16mf2_imm0() +{ + size_t vl = vsetvl_e16mf2(0); + return vl; +} + +size_t test_vsetvl_e16mf2_imm31() +{ + size_t vl = vsetvl_e16mf2(31); + return vl; +} + +size_t test_vsetvl_e16mf2_imm32() +{ + size_t vl = vsetvl_e16mf2(32); + return vl; +} + +size_t test_vsetvl_e16mf2(size_t avl) +{ + size_t vl = vsetvl_e16mf2(avl); + return vl; +} + +size_t test_vsetvlmax_e16mf2() +{ + size_t vl = vsetvlmax_e16mf2(); + return vl; +} + +size_t test_vsetvl_e16m1_imm0() +{ + size_t vl = vsetvl_e16m1(0); + return vl; +} + +size_t test_vsetvl_e16m1_imm31() +{ + size_t vl = vsetvl_e16m1(31); + return vl; +} + +size_t test_vsetvl_e16m1_imm32() +{ + size_t vl = vsetvl_e16m1(32); + return vl; +} + +size_t test_vsetvl_e16m1(size_t avl) +{ + size_t vl = vsetvl_e16m1(avl); + return vl; +} + +size_t test_vsetvlmax_e16m1() +{ + size_t vl = vsetvlmax_e16m1(); + return vl; +} + +size_t test_vsetvl_e16m2_imm0() +{ + size_t vl = vsetvl_e16m2(0); + return vl; +} + +size_t test_vsetvl_e16m2_imm31() +{ + size_t vl = vsetvl_e16m2(31); + return vl; +} + +size_t test_vsetvl_e16m2_imm32() +{ + size_t vl = vsetvl_e16m2(32); + return vl; +} + +size_t test_vsetvl_e16m2(size_t avl) +{ + size_t vl = vsetvl_e16m2(avl); + return vl; +} + +size_t test_vsetvlmax_e16m2() +{ + size_t vl = vsetvlmax_e16m2(); + return vl; +} + +size_t test_vsetvl_e16m4_imm0() +{ + size_t vl = vsetvl_e16m4(0); + return vl; +} + +size_t test_vsetvl_e16m4_imm31() +{ + size_t vl = vsetvl_e16m4(31); + return vl; +} + +size_t test_vsetvl_e16m4_imm32() +{ + size_t vl = vsetvl_e16m4(32); + return vl; +} + +size_t test_vsetvl_e16m4(size_t avl) +{ + size_t vl = vsetvl_e16m4(avl); + return vl; +} + +size_t test_vsetvlmax_e16m4() +{ + size_t vl = vsetvlmax_e16m4(); + return vl; +} + +size_t test_vsetvl_e16m8_imm0() +{ + size_t vl = vsetvl_e16m8(0); + return vl; +} + +size_t test_vsetvl_e16m8_imm31() +{ + size_t vl = vsetvl_e16m8(31); + return vl; +} + +size_t test_vsetvl_e16m8_imm32() +{ + size_t vl = vsetvl_e16m8(32); + return vl; +} + +size_t test_vsetvl_e16m8(size_t avl) +{ + size_t vl = vsetvl_e16m8(avl); + return vl; +} + +size_t test_vsetvlmax_e16m8() +{ + size_t vl = vsetvlmax_e16m8(); + return vl; +} + +size_t test_vsetvl_e32mf2_imm0() +{ + size_t vl = vsetvl_e32mf2(0); + return vl; +} + +size_t test_vsetvl_e32mf2_imm31() +{ + size_t vl = vsetvl_e32mf2(31); + return vl; +} + +size_t test_vsetvl_e32mf2_imm32() +{ + size_t vl = vsetvl_e32mf2(32); + return vl; +} + +size_t test_vsetvl_e32mf2(size_t avl) +{ + size_t vl = vsetvl_e32mf2(avl); + return vl; +} + +size_t test_vsetvlmax_e32mf2() +{ + size_t vl = vsetvlmax_e32mf2(); + return vl; +} + +size_t test_vsetvl_e32m1_imm0() +{ + size_t vl = vsetvl_e32m1(0); + return vl; +} + +size_t test_vsetvl_e32m1_imm31() +{ + size_t vl = vsetvl_e32m1(31); + return vl; +} + +size_t test_vsetvl_e32m1_imm32() +{ + size_t vl = vsetvl_e32m1(32); + return vl; +} + +size_t test_vsetvl_e32m1(size_t avl) +{ + size_t vl = vsetvl_e32m1(avl); + return vl; +} + +size_t test_vsetvlmax_e32m1() +{ + size_t vl = vsetvlmax_e32m1(); + return vl; +} + +size_t test_vsetvl_e32m2_imm0() +{ + size_t vl = vsetvl_e32m2(0); + return vl; +} + +size_t test_vsetvl_e32m2_imm31() +{ + size_t vl = vsetvl_e32m2(31); + return vl; +} + +size_t test_vsetvl_e32m2_imm32() +{ + size_t vl = vsetvl_e32m2(32); + return vl; +} + +size_t test_vsetvl_e32m2(size_t avl) +{ + size_t vl = vsetvl_e32m2(avl); + return vl; +} + +size_t test_vsetvlmax_e32m2() +{ + size_t vl = vsetvlmax_e32m2(); + return vl; +} + +size_t test_vsetvl_e32m4_imm0() +{ + size_t vl = vsetvl_e32m4(0); + return vl; +} + +size_t test_vsetvl_e32m4_imm31() +{ + size_t vl = vsetvl_e32m4(31); + return vl; +} + +size_t test_vsetvl_e32m4_imm32() +{ + size_t vl = vsetvl_e32m4(32); + return vl; +} + +size_t test_vsetvl_e32m4(size_t avl) +{ + size_t vl = vsetvl_e32m4(avl); + return vl; +} + +size_t test_vsetvlmax_e32m4() +{ + size_t vl = vsetvlmax_e32m4(); + return vl; +} + +size_t test_vsetvl_e32m8_imm0() +{ + size_t vl = vsetvl_e32m8(0); + return vl; +} + +size_t test_vsetvl_e32m8_imm31() +{ + size_t vl = vsetvl_e32m8(31); + return vl; +} + +size_t test_vsetvl_e32m8_imm32() +{ + size_t vl = vsetvl_e32m8(32); + return vl; +} +size_t test_vsetvl_e32m8(size_t avl) +{ + size_t vl = vsetvl_e32m8(avl); + return vl; +} + +size_t test_vsetvlmax_e32m8() +{ + size_t vl = vsetvlmax_e32m8(); + return vl; +} + +size_t test_vsetvl_e64m1_imm0() +{ + size_t vl = vsetvl_e64m1(0); + return vl; +} + +size_t test_vsetvl_e64m1_imm31() +{ + size_t vl = vsetvl_e64m1(31); + return vl; +} + +size_t test_vsetvl_e64m1_imm32() +{ + size_t vl = vsetvl_e64m1(32); + return vl; +} + +size_t test_vsetvl_e64m1(size_t avl) +{ + size_t vl = vsetvl_e64m1(avl); + return vl; +} + +size_t test_vsetvlmax_e64m1() +{ + size_t vl = vsetvlmax_e64m1(); + return vl; +} + +size_t test_vsetvl_e64m2_imm0() +{ + size_t vl = vsetvl_e64m2(0); + return vl; +} + +size_t test_vsetvl_e64m2_imm31() +{ + size_t vl = vsetvl_e64m2(31); + return vl; +} + +size_t test_vsetvl_e64m2_imm32() +{ + size_t vl = vsetvl_e64m2(32); + return vl; +} +size_t test_vsetvl_e64m2(size_t avl) +{ + size_t vl = vsetvl_e64m2(avl); + return vl; +} + +size_t test_vsetvlmax_e64m2() +{ + size_t vl = vsetvlmax_e64m2(); + return vl; +} + +size_t test_vsetvl_e64m4_imm0() +{ + size_t vl = vsetvl_e64m4(0); + return vl; +} + +size_t test_vsetvl_e64m4_imm31() +{ + size_t vl = vsetvl_e64m4(31); + return vl; +} + +size_t test_vsetvl_e64m4_imm32() +{ + size_t vl = vsetvl_e64m4(32); + return vl; +} + +size_t test_vsetvl_e64m4(size_t avl) +{ + size_t vl = vsetvl_e64m4(avl); + return vl; +} + +size_t test_vsetvlmax_e64m4() +{ + size_t vl = vsetvlmax_e64m4(); + return vl; +} + +size_t test_vsetvl_e64m8_imm0() +{ + size_t vl = vsetvl_e64m8(0); + return vl; +} + +size_t test_vsetvl_e64m8_imm31() +{ + size_t vl = vsetvl_e64m8(31); + return vl; +} + +size_t test_vsetvl_e64m8_imm32() +{ + size_t vl = vsetvl_e64m8(32); + return vl; +} +size_t test_vsetvl_e64m8(size_t avl) +{ + size_t vl = vsetvl_e64m8(avl); + return vl; +} + +size_t test_vsetvlmax_e64m8() +{ + size_t vl = vsetvlmax_e64m8(); + return vl; +} + +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*mf8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*mf8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*mf8,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*mf4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*mf4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*mf4,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*mf2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*mf2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*mf2,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*m1,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*m2,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*m4,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*m8,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*mf4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*mf4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*mf4,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*mf2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*mf2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*mf2,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*m1,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*m2,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*m4,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*m8,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*mf2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*mf2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*mf2,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*m1,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*m2,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*m4,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*m8,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e64,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e64,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e64,\s*m1,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e64,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e64,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e64,\s*m2,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e64,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e64,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e64,\s*m4,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m4,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e64,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e64,\s*m8,\s*ta,\s*mu} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e64,\s*m8,\s*ta,\s*mu} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*ta,\s*mu} 1 } } */ diff --git a/gcc/testsuite/gfortran.dg/pr105633.f90 b/gcc/testsuite/gfortran.dg/pr105633.f90 new file mode 100644 index 0000000..f2dbc5e --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr105633.f90 @@ -0,0 +1,8 @@ +! { dg-do compile } +! PR fortran/105633 - ICE in find_array_section +! Contributed by G.Steinmetz + +program p + integer, parameter :: a(:) = [1,2] ! { dg-error "deferred shape" } + print *, [a([1,2])] +end diff --git a/gcc/testsuite/lib/g++-dg.exp b/gcc/testsuite/lib/g++-dg.exp index 59e8081..9bf63a1 100644 --- a/gcc/testsuite/lib/g++-dg.exp +++ b/gcc/testsuite/lib/g++-dg.exp @@ -53,7 +53,16 @@ proc g++-dg-runtest { testcases flags default-extra-flags } { if { [llength $gpp_std_list] > 0 } { set std_list $gpp_std_list } else { - set std_list { 98 14 17 20 } + # If the test requires a newer C++ version than which + # is tested by default, use that C++ version for that + # single test. This should be updated or commented + # out whenever the default std_list is updated or newer + # C++ effective target is added. + if [search_for $test "{ dg-do * { target c++23 } }"] { + set std_list { 23 } + } else { + set std_list { 98 14 17 20 } + } } set option_list { } foreach x $std_list { diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 8d45bc2..7824a44 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -9522,6 +9522,30 @@ proc check_effective_target_avxvnni { } { } "-mavxvnni" ] } +# Return 1 if avxifma instructions can be compiled. +proc check_effective_target_avxifma { } { + return [check_no_compiler_messages avxifma object { + typedef long long __v4di __attribute__ ((__vector_size__ (32))); + __v4di + _mm256_maddlo_epu64 (__v4di __A, __v4di __B, __v4di __C) + { + return __builtin_ia32_vpmadd52luq256 (__A, __B, __C); + } + } "-O0 -mavxifma" ] +} + +# Return 1 if avxvnniint8 instructions can be compiled. +proc check_effective_target_avxvnniint8 { } { + return [check_no_compiler_messages avxvnniint8 object { + typedef int __v8si __attribute__ ((__vector_size__ (32))); + __v8si + _mm256_dpbssd_epi32 (__v8si __A, __v8si __B, __v8si __C) + { + return __builtin_ia32_vpdpbssd256 (__A, __B, __C); + } + } "-O0 -mavxvnniint8" ] +} + # Return 1 if sse instructions can be compiled. proc check_effective_target_sse { } { return [check_no_compiler_messages sse object { @@ -10852,6 +10876,80 @@ proc check_effective_target_fenv_exceptions_dfp {} { } [add_options_for_ieee "-std=gnu99"]] } +# Return 1 if <fenv.h> is available with all the standard IEEE +# exceptions and floating-point exceptions are raised by arithmetic +# operations. (If the target requires special options for "inexact" +# exceptions, those need to be specified in the testcases.) + +proc check_effective_target_fenv_exceptions_double {} { + return [check_runtime fenv_exceptions_double { + #include <fenv.h> + #include <stdlib.h> + #ifndef FE_DIVBYZERO + # error Missing FE_DIVBYZERO + #endif + #ifndef FE_INEXACT + # error Missing FE_INEXACT + #endif + #ifndef FE_INVALID + # error Missing FE_INVALID + #endif + #ifndef FE_OVERFLOW + # error Missing FE_OVERFLOW + #endif + #ifndef FE_UNDERFLOW + # error Missing FE_UNDERFLOW + #endif + volatile double a = 0.0f, r; + int + main (void) + { + r = a / a; + if (fetestexcept (FE_INVALID)) + exit (0); + else + abort (); + } + } [add_options_for_ieee "-std=gnu99"]] +} + +# Return 1 if <fenv.h> is available with all the standard IEEE +# exceptions and floating-point exceptions are raised by arithmetic +# operations. (If the target requires special options for "inexact" +# exceptions, those need to be specified in the testcases.) + +proc check_effective_target_fenv_exceptions_long_double {} { + return [check_runtime fenv_exceptions_long_double { + #include <fenv.h> + #include <stdlib.h> + #ifndef FE_DIVBYZERO + # error Missing FE_DIVBYZERO + #endif + #ifndef FE_INEXACT + # error Missing FE_INEXACT + #endif + #ifndef FE_INVALID + # error Missing FE_INVALID + #endif + #ifndef FE_OVERFLOW + # error Missing FE_OVERFLOW + #endif + #ifndef FE_UNDERFLOW + # error Missing FE_UNDERFLOW + #endif + volatile long double a = 0.0f, r; + int + main (void) + { + r = a / a; + if (fetestexcept (FE_INVALID)) + exit (0); + else + abort (); + } + } [add_options_for_ieee "-std=gnu99"]] +} + # Return 1 if -fexceptions is supported. proc check_effective_target_exceptions {} { diff --git a/gcc/tree-cfg.cc b/gcc/tree-cfg.cc index 9b2c0f6..d982988 100644 --- a/gcc/tree-cfg.cc +++ b/gcc/tree-cfg.cc @@ -5300,13 +5300,15 @@ verify_gimple_transaction (gtransaction *stmt) /* Verify the GIMPLE statements inside the statement list STMTS. */ -DEBUG_FUNCTION void -verify_gimple_in_seq (gimple_seq stmts) +DEBUG_FUNCTION bool +verify_gimple_in_seq (gimple_seq stmts, bool ice) { timevar_push (TV_TREE_STMT_VERIFY); - if (verify_gimple_in_seq_2 (stmts)) + bool res = verify_gimple_in_seq_2 (stmts); + if (res && ice) internal_error ("%<verify_gimple%> failed"); timevar_pop (TV_TREE_STMT_VERIFY); + return res; } /* Return true when the T can be shared. */ @@ -5496,8 +5498,8 @@ collect_subblocks (hash_set<tree> *blocks, tree block) /* Verify the GIMPLE statements in the CFG of FN. */ -DEBUG_FUNCTION void -verify_gimple_in_cfg (struct function *fn, bool verify_nothrow) +DEBUG_FUNCTION bool +verify_gimple_in_cfg (struct function *fn, bool verify_nothrow, bool ice) { basic_block bb; bool err = false; @@ -5652,11 +5654,13 @@ verify_gimple_in_cfg (struct function *fn, bool verify_nothrow) eh_table->traverse<hash_set<gimple *> *, verify_eh_throw_stmt_node> (&visited_throwing_stmts); - if (err || eh_error_found) + if (ice && (err || eh_error_found)) internal_error ("verify_gimple failed"); verify_histograms (); timevar_pop (TV_TREE_STMT_VERIFY); + + return (err || eh_error_found); } diff --git a/gcc/tree-cfg.h b/gcc/tree-cfg.h index 95ec93e..8c22c3d 100644 --- a/gcc/tree-cfg.h +++ b/gcc/tree-cfg.h @@ -63,8 +63,8 @@ extern gphi *get_virtual_phi (basic_block); extern gimple *first_stmt (basic_block); extern gimple *last_stmt (basic_block); extern gimple *last_and_only_stmt (basic_block); -extern void verify_gimple_in_seq (gimple_seq); -extern void verify_gimple_in_cfg (struct function *, bool); +extern bool verify_gimple_in_seq (gimple_seq, bool = true); +extern bool verify_gimple_in_cfg (struct function *, bool, bool = true); extern tree gimple_block_label (basic_block); extern void add_phi_args_after_copy_bb (basic_block); extern void add_phi_args_after_copy (basic_block *, unsigned, edge); diff --git a/gcc/tree-loop-distribution.cc b/gcc/tree-loop-distribution.cc index e1948fb..ed3dd73 100644 --- a/gcc/tree-loop-distribution.cc +++ b/gcc/tree-loop-distribution.cc @@ -2201,8 +2201,6 @@ struct pg_edge_callback_data bitmap sccs_to_merge; /* Array constains component information for all vertices. */ int *vertices_component; - /* Array constains postorder information for all vertices. */ - int *vertices_post; /* Vector to record all data dependence relations which are needed to break strong connected components by runtime alias checks. */ vec<ddr_p> *alias_ddrs; @@ -2452,6 +2450,33 @@ pg_collect_alias_ddrs (struct graph *g, struct graph_edge *e, void *data) cbdata->alias_ddrs->safe_splice (edata->alias_ddrs); } +/* Callback function for traversing edge E. DATA is private + callback data. */ + +static void +pg_unmark_merged_alias_ddrs (struct graph *, struct graph_edge *e, void *data) +{ + int i, j, component; + struct pg_edge_callback_data *cbdata; + struct pg_edata *edata = (struct pg_edata *) e->data; + + if (edata == NULL || edata->alias_ddrs.length () == 0) + return; + + cbdata = (struct pg_edge_callback_data *) data; + i = e->src; + j = e->dest; + component = cbdata->vertices_component[i]; + /* Make sure to not skip vertices inside SCCs we are going to merge. */ + if (component == cbdata->vertices_component[j] + && bitmap_bit_p (cbdata->sccs_to_merge, component)) + { + edata->alias_ddrs.release (); + delete edata; + e->data = NULL; + } +} + /* This is the main function breaking strong conected components in PARTITIONS giving reduced depdendence graph RDG. Store data dependence relations for runtime alias check in ALIAS_DDRS. */ @@ -2511,7 +2536,6 @@ loop_distribution::break_alias_scc_partitions (struct graph *rdg, cbdata.sccs_to_merge = sccs_to_merge; cbdata.alias_ddrs = alias_ddrs; cbdata.vertices_component = XNEWVEC (int, pg->n_vertices); - cbdata.vertices_post = XNEWVEC (int, pg->n_vertices); /* Record the component information which will be corrupted by next graph scc finding call. */ for (i = 0; i < pg->n_vertices; ++i) @@ -2520,17 +2544,18 @@ loop_distribution::break_alias_scc_partitions (struct graph *rdg, /* Collect data dependences for runtime alias checks to break SCCs. */ if (bitmap_count_bits (sccs_to_merge) != (unsigned) num_sccs) { - /* Record the postorder information which will be corrupted by next - graph SCC finding call. */ - for (i = 0; i < pg->n_vertices; ++i) - cbdata.vertices_post[i] = pg->vertices[i].post; + /* For SCCs we want to merge clear all alias_ddrs for edges + inside the component. */ + for_each_edge (pg, pg_unmark_merged_alias_ddrs, &cbdata); /* Run SCC finding algorithm again, with alias dependence edges skipped. This is to topologically sort partitions according to compilation time known dependence. Note the topological order is stored in the form of pg's post order number. */ num_sccs_no_alias = graphds_scc (pg, NULL, pg_skip_alias_edge); - gcc_assert (partitions->length () == (unsigned) num_sccs_no_alias); + /* We cannot assert partitions->length () == num_sccs_no_alias + since we are not ignoring alias edges in cycles we are + going to merge. That's required to compute correct postorder. */ /* With topological order, we can construct two subgraphs L and R. L contains edge <x, y> where x < y in terms of post order, while R contains edge <x, y> where x > y. Edges for compilation time @@ -2565,16 +2590,14 @@ loop_distribution::break_alias_scc_partitions (struct graph *rdg, first->type = PTYPE_SEQUENTIAL; } } - /* Restore the postorder information if it's corrupted in finding SCC - with alias dependence edges skipped. If reduction partition's SCC is - broken by runtime alias checks, we force a negative post order to it - making sure it will be scheduled in the last. */ + /* If reduction partition's SCC is broken by runtime alias checks, + we force a negative post order to it making sure it will be scheduled + in the last. */ if (num_sccs_no_alias > 0) { j = -1; for (i = 0; i < pg->n_vertices; ++i) { - pg->vertices[i].post = cbdata.vertices_post[i]; struct pg_vdata *data = (struct pg_vdata *)pg->vertices[i].data; if (data->partition && partition_reduction_p (data->partition)) { @@ -2587,7 +2610,6 @@ loop_distribution::break_alias_scc_partitions (struct graph *rdg, } free (cbdata.vertices_component); - free (cbdata.vertices_post); } sort_partitions_by_post_order (pg, partitions); diff --git a/gcc/tree-vect-loop.cc b/gcc/tree-vect-loop.cc index 92790bd..d5c2bff 100644 --- a/gcc/tree-vect-loop.cc +++ b/gcc/tree-vect-loop.cc @@ -543,6 +543,7 @@ vect_phi_first_order_recurrence_p (loop_vec_info loop_vinfo, class loop *loop, tree ldef = PHI_ARG_DEF_FROM_EDGE (phi, latch); if (TREE_CODE (ldef) != SSA_NAME || SSA_NAME_IS_DEFAULT_DEF (ldef) + || is_a <gphi *> (SSA_NAME_DEF_STMT (ldef)) || !flow_bb_inside_loop_p (loop, gimple_bb (SSA_NAME_DEF_STMT (ldef)))) return false; @@ -8486,14 +8487,8 @@ vectorizable_recurr (loop_vec_info loop_vinfo, stmt_vec_info stmt_info, vectorized the latch definition. */ edge le = loop_latch_edge (LOOP_VINFO_LOOP (loop_vinfo)); gimple *latch_def = SSA_NAME_DEF_STMT (PHI_ARG_DEF_FROM_EDGE (phi, le)); - gimple_stmt_iterator gsi2; - if (is_a <gphi *> (latch_def)) - gsi2 = gsi_after_labels (gimple_bb (latch_def)); - else - { - gsi2 = gsi_for_stmt (latch_def); - gsi_next (&gsi2); - } + gimple_stmt_iterator gsi2 = gsi_for_stmt (latch_def); + gsi_next (&gsi2); for (unsigned i = 0; i < ncopies; ++i) { diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc index 6afd57a..777ba2f 100644 --- a/gcc/tree-vect-patterns.cc +++ b/gcc/tree-vect-patterns.cc @@ -1922,7 +1922,8 @@ vect_recog_bitfield_ref_pattern (vec_info *vinfo, stmt_vec_info stmt_info, tree ret = gimple_assign_lhs (first_stmt); tree ret_type = TREE_TYPE (ret); bool shift_first = true; - tree vectype = get_vectype_for_scalar_type (vinfo, TREE_TYPE (container)); + tree container_type = TREE_TYPE (container); + tree vectype = get_vectype_for_scalar_type (vinfo, container_type); /* We move the conversion earlier if the loaded type is smaller than the return type to enable the use of widening loads. */ @@ -1933,15 +1934,15 @@ vect_recog_bitfield_ref_pattern (vec_info *vinfo, stmt_vec_info stmt_info, = gimple_build_assign (vect_recog_temp_ssa_var (ret_type), NOP_EXPR, container); container = gimple_get_lhs (pattern_stmt); - append_pattern_def_seq (vinfo, stmt_info, pattern_stmt); + container_type = TREE_TYPE (container); + vectype = get_vectype_for_scalar_type (vinfo, container_type); + append_pattern_def_seq (vinfo, stmt_info, pattern_stmt, vectype); } else if (!useless_type_conversion_p (TREE_TYPE (container), ret_type)) /* If we are doing the conversion last then also delay the shift as we may be able to combine the shift and conversion in certain cases. */ shift_first = false; - tree container_type = TREE_TYPE (container); - /* If the only use of the result of this BIT_FIELD_REF + CONVERT is a PLUS_EXPR then do the shift last as some targets can combine the shift and add into a single instruction. */ @@ -2098,11 +2099,12 @@ vect_recog_bit_insert_pattern (vec_info *vinfo, stmt_vec_info stmt_info, tree shifted = value; if (shift_n) { - pattern_stmt - = gimple_build_assign (vect_recog_temp_ssa_var (container_type), - LSHIFT_EXPR, value, shift); - append_pattern_def_seq (vinfo, stmt_info, pattern_stmt); - shifted = gimple_get_lhs (pattern_stmt); + gimple_seq stmts = NULL; + shifted + = gimple_build (&stmts, LSHIFT_EXPR, container_type, value, shift); + if (!gimple_seq_empty_p (stmts)) + append_pattern_def_seq (vinfo, stmt_info, + gimple_seq_first_stmt (stmts)); } tree mask_t diff --git a/gcc/tree-vrp.cc b/gcc/tree-vrp.cc index 1adb15c..e5a292b 100644 --- a/gcc/tree-vrp.cc +++ b/gcc/tree-vrp.cc @@ -50,6 +50,7 @@ along with GCC; see the file COPYING3. If not see #include "gimple-range-path.h" #include "value-pointer-equiv.h" #include "gimple-fold.h" +#include "tree-dfa.h" /* Set of SSA names found live during the RPO traversal of the function for still active basic-blocks. */ @@ -4465,6 +4466,39 @@ public: bool gate (function *fun) final override { return fun->assume_function; } unsigned int execute (function *) final override { + assume_query query; + if (dump_file) + fprintf (dump_file, "Assumptions :\n--------------\n"); + + for (tree arg = DECL_ARGUMENTS (cfun->decl); arg; arg = DECL_CHAIN (arg)) + { + tree name = ssa_default_def (cfun, arg); + if (!name || !gimple_range_ssa_p (name)) + continue; + tree type = TREE_TYPE (name); + if (!Value_Range::supports_type_p (type)) + continue; + Value_Range assume_range (type); + if (query.assume_range_p (assume_range, name)) + { + // Set the global range of NAME to anything calculated. + set_range_info (name, assume_range); + if (dump_file) + { + print_generic_expr (dump_file, name, TDF_SLIM); + fprintf (dump_file, " -> "); + assume_range.dump (dump_file); + fputc ('\n', dump_file); + } + } + } + if (dump_file) + { + fputc ('\n', dump_file); + gimple_dump_cfg (dump_file, dump_flags & ~TDF_DETAILS); + if (dump_flags & TDF_DETAILS) + query.dump (dump_file); + } return TODO_discard_function; } diff --git a/gcc/value-query.cc b/gcc/value-query.cc index 296784b..e8988ed 100644 --- a/gcc/value-query.cc +++ b/gcc/value-query.cc @@ -343,7 +343,7 @@ get_range_global (vrange &r, tree name) && ((cfun && nonnull_arg_p (sym)) || get_ssa_name_ptr_info_nonnull (name))) r.set_nonzero (type); - else if (INTEGRAL_TYPE_P (type)) + else if (!POINTER_TYPE_P (type)) { get_ssa_name_range_info (r, name); if (r.undefined_p ()) diff --git a/gcc/value-range.cc b/gcc/value-range.cc index 90d5e66..bcda498 100644 --- a/gcc/value-range.cc +++ b/gcc/value-range.cc @@ -388,7 +388,7 @@ frange::normalize_kind () && frange_val_is_min (m_min, m_type) && frange_val_is_max (m_max, m_type)) { - if (m_pos_nan && m_neg_nan) + if (!HONOR_NANS (m_type) || (m_pos_nan && m_neg_nan)) { set_varying (m_type); return true; @@ -396,7 +396,7 @@ frange::normalize_kind () } else if (m_kind == VR_VARYING) { - if (!m_pos_nan || !m_neg_nan) + if (HONOR_NANS (m_type) && (!m_pos_nan || !m_neg_nan)) { m_kind = VR_RANGE; m_min = frange_val_min (m_type); @@ -712,14 +712,19 @@ frange::supports_type_p (const_tree type) const void frange::verify_range () { + if (flag_finite_math_only) + gcc_checking_assert (!maybe_isnan ()); switch (m_kind) { case VR_UNDEFINED: gcc_checking_assert (!m_type); return; case VR_VARYING: + if (flag_finite_math_only) + gcc_checking_assert (!m_pos_nan && !m_neg_nan); + else + gcc_checking_assert (m_pos_nan && m_neg_nan); gcc_checking_assert (m_type); - gcc_checking_assert (m_pos_nan && m_neg_nan); gcc_checking_assert (frange_val_is_min (m_min, m_type)); gcc_checking_assert (frange_val_is_max (m_max, m_type)); return; @@ -3437,6 +3442,8 @@ range_tests_misc () max.union_ (min); ASSERT_TRUE (max.varying_p ()); } + // Test that we can set a range of true+false for a 1-bit signed int. + r0 = range_true_and_false (one_bit_type); // Test inversion of 1-bit signed integers. { diff --git a/gcc/value-range.h b/gcc/value-range.h index 60b989b..b48542a 100644 --- a/gcc/value-range.h +++ b/gcc/value-range.h @@ -1103,8 +1103,16 @@ frange::set_varying (tree type) m_type = type; m_min = frange_val_min (type); m_max = frange_val_max (type); - m_pos_nan = true; - m_neg_nan = true; + if (HONOR_NANS (m_type)) + { + m_pos_nan = true; + m_neg_nan = true; + } + else + { + m_pos_nan = false; + m_neg_nan = false; + } } inline void diff --git a/gcc/varasm.cc b/gcc/varasm.cc index a111845..d0beac8 100644 --- a/gcc/varasm.cc +++ b/gcc/varasm.cc @@ -6658,6 +6658,36 @@ init_varasm_once (void) #endif } +/* Determine whether SYMBOL is used in any optimized function. */ + +static bool +have_optimized_refs (struct symtab_node *symbol) +{ + struct ipa_ref *ref; + + for (int i = 0; symbol->iterate_referring (i, ref); i++) + { + cgraph_node *cnode = dyn_cast <cgraph_node *> (ref->referring); + + if (cnode && opt_for_fn (cnode->decl, optimize)) + return true; + } + + return false; +} + +/* Check if promoting general-dynamic TLS access model to local-dynamic is + desirable for DECL. */ + +static bool +optimize_dyn_tls_for_decl_p (const_tree decl) +{ + if (cfun) + return optimize; + return symtab->state >= IPA && have_optimized_refs (symtab_node::get (decl)); +} + + enum tls_model decl_default_tls_model (const_tree decl) { @@ -6675,7 +6705,7 @@ decl_default_tls_model (const_tree decl) /* Local dynamic is inefficient when we're not combining the parts of the address. */ - else if (optimize && is_local) + else if (is_local && optimize_dyn_tls_for_decl_p (decl)) kind = TLS_MODEL_LOCAL_DYNAMIC; else kind = TLS_MODEL_GLOBAL_DYNAMIC; |