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| author | Olivier Hainque <hainque@adacore.com> | 2021-03-20 21:10:49 +0000 |
|---|---|---|
| committer | Pierre-Marie de Rodat <derodat@adacore.com> | 2021-06-18 04:36:52 -0400 |
| commit | 548280b996ea7e6283193d6c8a3c03d44ef36681 (patch) | |
| tree | ab833f3eee86ac11b62e799b3cf4eec79f90a2e7 /gcc | |
| parent | c37c13e15e2a8e9f2716c29fe89cc2300d4457ce (diff) | |
| download | gcc-548280b996ea7e6283193d6c8a3c03d44ef36681.zip gcc-548280b996ea7e6283193d6c8a3c03d44ef36681.tar.gz gcc-548280b996ea7e6283193d6c8a3c03d44ef36681.tar.bz2 | |
[Ada] Fix inaccuracies in signal handler trampoline for aarch64-vxworks
gcc/ada/
* sigtramp-vxworks-target.inc (__aarch64__): Sync
REGNO_PC_OFFSET with the back-end DWARF_ALT_FRAME_RETURN_COLUMN.
In CFI_COMMON_REGS, leave r18 alone, VxWorks private.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ada/sigtramp-vxworks-target.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/ada/sigtramp-vxworks-target.inc b/gcc/ada/sigtramp-vxworks-target.inc index 13601c6..5a37b87 100644 --- a/gcc/ada/sigtramp-vxworks-target.inc +++ b/gcc/ada/sigtramp-vxworks-target.inc @@ -100,7 +100,7 @@ #define FUNCTION "%function" #ifdef __aarch64__ -#define REGNO_PC_OFFSET 80 /* aka V16, a scratch register */ +#define REGNO_PC_OFFSET 96 /* DWARF_ALT_FRAME_RETURN_COLUMN */ #else #define REGNO_PC_OFFSET 15 /* PC_REGNUM */ #endif @@ -375,7 +375,7 @@ TCR(COMMON_CFI(G_REG_OFFSET(14))) \ TCR(COMMON_CFI(G_REG_OFFSET(15))) \ TCR(COMMON_CFI(G_REG_OFFSET(16))) \ TCR(COMMON_CFI(G_REG_OFFSET(17))) \ -TCR(COMMON_CFI(G_REG_OFFSET(18))) \ +CR("# Leave alone R18, VxWorks reserved\n") \ TCR(COMMON_CFI(G_REG_OFFSET(19))) \ TCR(COMMON_CFI(G_REG_OFFSET(20))) \ TCR(COMMON_CFI(G_REG_OFFSET(21))) \ |