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| author | Alexander Ivchenko <alexander.ivchenko@intel.com> | 2013-10-11 13:50:18 +0000 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2013-10-11 13:50:18 +0000 |
| commit | 5348cff8673d19287910f82cda9a8b3445104f54 (patch) | |
| tree | 2c1ae53dbe0ef5f536dbb8e8aca4dc4f373a6777 /gcc | |
| parent | f5f41d884c7cf801a5637a4eed5f850055d8b5ee (diff) | |
| download | gcc-5348cff8673d19287910f82cda9a8b3445104f54.zip gcc-5348cff8673d19287910f82cda9a8b3445104f54.tar.gz gcc-5348cff8673d19287910f82cda9a8b3445104f54.tar.bz2 | |
sse.md (VI48_AVX512F): New.
* config/i386/sse.md (VI48_AVX512F): New.
(VI48_AVX2): Changed to ...
(VI48_AVX2_48_AVX512F): This.
(avx2_ashrv<mode>): Changed to ...
(<avx2_avx512f>_ashrv<mode>): This.
(avx2_<shift_insn>v<mode>): Changed to ...
(<avx2_avx512f>_<shift_insn>v<mode>): This.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>
From-SVN: r203435
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 18 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 36 |
2 files changed, 38 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 22ffaa5..c83919b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -8,6 +8,24 @@ Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> + * config/i386/sse.md (VI48_AVX512F): New. + (VI48_AVX2): Changed to ... + (VI48_AVX2_48_AVX512F): This. + (avx2_ashrv<mode>): Changed to ... + (<avx2_avx512f>_ashrv<mode>): This. + (avx2_<shift_insn>v<mode>): Changed to ... + (<avx2_avx512f>_<shift_insn>v<mode>): This. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + * config/i386/sse.md (VI4_AVX512F): New. (VI8_AVX2_AVX512F): Ditto. (mul<mode>3): Extended with wider modes. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 127ecf2..49124ba 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -210,6 +210,10 @@ (define_mode_iterator VI4_AVX512F [(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI]) +(define_mode_iterator VI48_AVX512F + [(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI + (V8DI "TARGET_AVX512F")]) + (define_mode_iterator VI8_AVX2 [(V4DI "TARGET_AVX2") V2DI]) @@ -247,9 +251,9 @@ (V8SI "TARGET_AVX2") V4SI (V4DI "TARGET_AVX2") V2DI]) -(define_mode_iterator VI48_AVX2 - [(V8SI "TARGET_AVX2") V4SI - (V4DI "TARGET_AVX2") V2DI]) +(define_mode_iterator VI48_AVX2_48_AVX512F + [(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI + (V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX2") V2DI]) (define_mode_iterator V48_AVX2 [V4SF V2DF @@ -11404,26 +11408,26 @@ DONE; }) -(define_insn "avx2_ashrv<mode>" - [(set (match_operand:VI4_AVX2 0 "register_operand" "=v") - (ashiftrt:VI4_AVX2 - (match_operand:VI4_AVX2 1 "register_operand" "v") - (match_operand:VI4_AVX2 2 "nonimmediate_operand" "vm")))] +(define_insn "<avx2_avx512f>_ashrv<mode>" + [(set (match_operand:VI48_AVX512F 0 "register_operand" "=v") + (ashiftrt:VI48_AVX512F + (match_operand:VI48_AVX512F 1 "register_operand" "v") + (match_operand:VI48_AVX512F 2 "nonimmediate_operand" "vm")))] "TARGET_AVX2" - "vpsravd\t{%2, %1, %0|%0, %1, %2}" + "vpsrav<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseishft") - (set_attr "prefix" "vex") + (set_attr "prefix" "maybe_evex") (set_attr "mode" "<sseinsnmode>")]) -(define_insn "avx2_<shift_insn>v<mode>" - [(set (match_operand:VI48_AVX2 0 "register_operand" "=v") - (any_lshift:VI48_AVX2 - (match_operand:VI48_AVX2 1 "register_operand" "v") - (match_operand:VI48_AVX2 2 "nonimmediate_operand" "vm")))] +(define_insn "<avx2_avx512f>_<shift_insn>v<mode>" + [(set (match_operand:VI48_AVX2_48_AVX512F 0 "register_operand" "=v") + (any_lshift:VI48_AVX2_48_AVX512F + (match_operand:VI48_AVX2_48_AVX512F 1 "register_operand" "v") + (match_operand:VI48_AVX2_48_AVX512F 2 "nonimmediate_operand" "vm")))] "TARGET_AVX2" "vp<vshift>v<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseishft") - (set_attr "prefix" "vex") + (set_attr "prefix" "maybe_evex") (set_attr "mode" "<sseinsnmode>")]) ;; For avx_vec_concat<mode> insn pattern |