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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2017-06-06 13:26:46 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2017-06-06 13:26:46 +0000 |
| commit | 4ebcc903bf03705099cd4b50231dc8fe444d70b9 (patch) | |
| tree | c27196f3a87512de1b23e07932cf97bc567d0b4e /gcc | |
| parent | 9bd01837e4c9f8f4e005a95a59f0147a6bb1d7c7 (diff) | |
| download | gcc-4ebcc903bf03705099cd4b50231dc8fe444d70b9.zip gcc-4ebcc903bf03705099cd4b50231dc8fe444d70b9.tar.gz gcc-4ebcc903bf03705099cd4b50231dc8fe444d70b9.tar.bz2 | |
[AArch64] Allow const0_rtx operand for atomic compare-exchange patterns
* config/aarch64/atomics.md (atomic_compare_and_swap<mode> expander):
Use aarch64_reg_or_zero predicate for operand 4.
(aarch64_compare_and_swap<mode> define_insn_and_split):
Use aarch64_reg_or_zero predicate for operand 3. Add 'Z' constraint.
(aarch64_store_exclusive<mode>): Likewise for operand 2.
* gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c: New test.
From-SVN: r248921
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/aarch64/atomics.md | 8 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c | 12 |
4 files changed, 28 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ad09804..5b27621 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2017-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/atomics.md (atomic_compare_and_swap<mode> expander): + Use aarch64_reg_or_zero predicate for operand 4. + (aarch64_compare_and_swap<mode> define_insn_and_split): + Use aarch64_reg_or_zero predicate for operand 3. Add 'Z' constraint. + (aarch64_store_exclusive<mode>): Likewise for operand 2. + 2017-06-06 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (arm_compute_save_reg_mask): Rename into ... diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md index 09d4410..27fc193 100644 --- a/gcc/config/aarch64/atomics.md +++ b/gcc/config/aarch64/atomics.md @@ -25,7 +25,7 @@ (match_operand:ALLI 1 "register_operand" "") ;; val out (match_operand:ALLI 2 "aarch64_sync_memory_operand" "") ;; memory (match_operand:ALLI 3 "general_operand" "") ;; expected - (match_operand:ALLI 4 "register_operand" "") ;; desired + (match_operand:ALLI 4 "aarch64_reg_or_zero" "") ;; desired (match_operand:SI 5 "const_int_operand") ;; is_weak (match_operand:SI 6 "const_int_operand") ;; mod_s (match_operand:SI 7 "const_int_operand")] ;; mod_f @@ -45,7 +45,7 @@ (set (match_dup 1) (unspec_volatile:SHORT [(match_operand:SI 2 "aarch64_plus_operand" "rI") ;; expected - (match_operand:SHORT 3 "register_operand" "r") ;; desired + (match_operand:SHORT 3 "aarch64_reg_or_zero" "rZ") ;; desired (match_operand:SI 4 "const_int_operand") ;; is_weak (match_operand:SI 5 "const_int_operand") ;; mod_s (match_operand:SI 6 "const_int_operand")] ;; mod_f @@ -69,7 +69,7 @@ (set (match_dup 1) (unspec_volatile:GPI [(match_operand:GPI 2 "aarch64_plus_operand" "rI") ;; expect - (match_operand:GPI 3 "register_operand" "r") ;; desired + (match_operand:GPI 3 "aarch64_reg_or_zero" "rZ") ;; desired (match_operand:SI 4 "const_int_operand") ;; is_weak (match_operand:SI 5 "const_int_operand") ;; mod_s (match_operand:SI 6 "const_int_operand")] ;; mod_f @@ -534,7 +534,7 @@ (unspec_volatile:SI [(const_int 0)] UNSPECV_SX)) (set (match_operand:ALLI 1 "aarch64_sync_memory_operand" "=Q") (unspec_volatile:ALLI - [(match_operand:ALLI 2 "register_operand" "r") + [(match_operand:ALLI 2 "aarch64_reg_or_zero" "rZ") (match_operand:SI 3 "const_int_operand")] UNSPECV_SX))] "" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a23dc7a..663f21e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c: New test. + 2017-06-06 Richard Biener <rguenther@suse.de> PR tree-optimization/80974 diff --git a/gcc/testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c b/gcc/testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c new file mode 100644 index 0000000..15606b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int +foo (int *a) +{ + int x = 3; + return __atomic_compare_exchange_n (a, &x, 0, 1, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE); +} + +/* { dg-final { scan-assembler "stxr\\tw\[0-9\]+, wzr,.*" } } */ +/* { dg-final { scan-assembler-not "mov\\tw\[0-9\]+, 0" } } */ |