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author | Uros Bizjak <uros@kss-loka.si> | 2005-09-26 19:21:00 +0200 |
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committer | Ian Lance Taylor <ian@gcc.gnu.org> | 2005-09-26 17:21:00 +0000 |
commit | 4d06b0a2fefa7c2e8aea54c19f97ebd24ca9e59e (patch) | |
tree | 21c528d57f278957fca902c3ea7c5886c107809e /gcc | |
parent | 76dd592360fedddbf7a6573245ab84c8219b2ee1 (diff) | |
download | gcc-4d06b0a2fefa7c2e8aea54c19f97ebd24ca9e59e.zip gcc-4d06b0a2fefa7c2e8aea54c19f97ebd24ca9e59e.tar.gz gcc-4d06b0a2fefa7c2e8aea54c19f97ebd24ca9e59e.tar.bz2 |
re PR target/24055 ("could not split insn" with -O1 -ffast-math)
PR target/24055
* config/i386/i386.md ("*fistdi2_1"): New pattern.
("*fist<mode>2_1"): Use only HImode and SImode register operands.
("fist<mode>2_with_temp"): Use only register operands.
From-SVN: r104647
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/i386/i386.md | 41 |
2 files changed, 37 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a340f08..8cdc5e3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2005-09-26 Uros Bizjak <uros@kss-loka.si> + + PR target/24055 + * config/i386/i386.md ("*fistdi2_1"): New pattern. + ("*fist<mode>2_1"): Use only HImode and SImode register operands. + ("fist<mode>2_with_temp"): Use only register operands. + 2005-09-26 J"orn Rennecke <joern.rennecke@st.com> * rtlanal.c (reg_used_between_p): Don't check for CLOBBERs in diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 72f927c..8bfa037 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -16475,9 +16475,9 @@ DONE; }) -(define_insn_and_split "*fist<mode>2_1" - [(set (match_operand:X87MODEI 0 "nonimmediate_operand" "=m,?r") - (unspec:X87MODEI [(match_operand:XF 1 "register_operand" "f,f")] +(define_insn_and_split "*fistdi2_1" + [(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r") + (unspec:DI [(match_operand:XF 1 "register_operand" "f,f")] UNSPEC_FIST))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations @@ -16487,17 +16487,17 @@ [(const_int 0)] { if (memory_operand (operands[0], VOIDmode)) - emit_insn (gen_fist<mode>2 (operands[0], operands[1])); + emit_insn (gen_fistdi2 (operands[0], operands[1])); else { - operands[2] = assign_386_stack_local (<MODE>mode, SLOT_TEMP); - emit_insn (gen_fist<mode>2_with_temp (operands[0], operands[1], - operands[2])); + operands[2] = assign_386_stack_local (DImode, SLOT_TEMP); + emit_insn (gen_fistdi2_with_temp (operands[0], operands[1], + operands[2])); } DONE; } [(set_attr "type" "fpspc") - (set_attr "mode" "<MODE>")]) + (set_attr "mode" "DI")]) (define_insn "fistdi2" [(set (match_operand:DI 0 "memory_operand" "=m") @@ -16545,6 +16545,25 @@ (clobber (match_dup 3))])] "") +(define_insn_and_split "*fist<mode>2_1" + [(set (match_operand:X87MODEI12 0 "register_operand" "=r") + (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] + UNSPEC_FIST))] + "TARGET_USE_FANCY_MATH_387 + && flag_unsafe_math_optimizations + && !(reload_completed || reload_in_progress)" + "#" + "&& 1" + [(const_int 0)] +{ + operands[2] = assign_386_stack_local (<MODE>mode, SLOT_TEMP); + emit_insn (gen_fist<mode>2_with_temp (operands[0], operands[1], + operands[2])); + DONE; +} + [(set_attr "type" "fpspc") + (set_attr "mode" "<MODE>")]) + (define_insn "fist<mode>2" [(set (match_operand:X87MODEI12 0 "memory_operand" "=m") (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] @@ -16556,10 +16575,10 @@ (set_attr "mode" "<MODE>")]) (define_insn "fist<mode>2_with_temp" - [(set (match_operand:X87MODEI12 0 "nonimmediate_operand" "=m,?r") - (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f,f")] + [(set (match_operand:X87MODEI12 0 "register_operand" "=r") + (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] UNSPEC_FIST)) - (clobber (match_operand:X87MODEI12 2 "memory_operand" "=m,m"))] + (clobber (match_operand:X87MODEI12 2 "memory_operand" "=m"))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" "#" |