i386.md (*testdi_1): Match CCZmode for constants that might have the SImode sign bit set.

	* config/i386/i386.md (*testdi_1): Match CCZmode for
	constants that might have the SImode sign bit set.
	(*testqi_1_maybe_si): Remove "!" constraint modifier.
	Use correct constraints for pentium pairing.
	(*test<mode>_1): Ditto.

From-SVN: r273534

2 files changed, 36 insertions, 17 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2bce569..851f04a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2019-07-16  Uroš Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.md (*testdi_1): Match CCZmode for
+	constants that might have the SImode sign bit set.
+	(*testqi_1_maybe_si): Remove "!" constraint modifier.
+	Use correct constraints for pentium pairing.
+	(*test<mode>_1): Ditto.
+
 2019-07-16  Jeff Law  <law@redhat.com>
 
 	PR rtl-optimization/91173
@@ -6180,7 +6188,6 @@
 	(*call_indirect_pcrel): New insn.
 	(*call_value_indirect_pcrel): Likewise.
 
-
 2019-05-29  Uroš Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/sse.md (*save_multiple<mode>): Rename from
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 410731f..eb32d7c 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -8134,18 +8134,31 @@
 
 (define_expand "testqi_ccz_1"
   [(set (reg:CCZ FLAGS_REG)
-        (compare:CCZ (and:QI (match_operand:QI 0 "nonimmediate_operand")
-			     (match_operand:QI 1 "nonmemory_operand"))
-		 (const_int 0)))])
+	(compare:CCZ
+	  (and:QI
+	    (match_operand:QI 0 "nonimmediate_operand")
+	    (match_operand:QI 1 "nonmemory_operand"))
+	  (const_int 0)))])
 
 (define_insn "*testdi_1"
   [(set (reg FLAGS_REG)
 	(compare
-	 (and:DI
-	  (match_operand:DI 0 "nonimmediate_operand" "%r,rm")
-	  (match_operand:DI 1 "x86_64_szext_nonmemory_operand" "Z,re"))
+	  (and:DI
+	    (match_operand:DI 0 "nonimmediate_operand" "%r,rm")
+	    (match_operand:DI 1 "x86_64_szext_nonmemory_operand" "Z,re"))
 	 (const_int 0)))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)"
+  "TARGET_64BIT
+   && ix86_match_ccmode
+	(insn,
+	 /* If we are going to emit testl instead of testq, and the operands[1]
+	    constant might have the SImode sign bit set, make sure the sign
+	    flag isn't tested, because the instruction will set the sign flag
+	    based on bit 31 rather than bit 63.  If it isn't CONST_INT,
+	    conservatively assume it might have bit 31 set.  */
+	 (satisfies_constraint_Z (operands[1])
+	  && (!CONST_INT_P (operands[1])
+	      || val_signbit_known_set_p (SImode, INTVAL (operands[1]))))
+	 ? CCZmode : CCNOmode)"
   "@
    test{l}\t{%k1, %k0|%k0, %k1}
    test{q}\t{%1, %0|%0, %1}"
@@ -8154,12 +8167,11 @@
 
 (define_insn "*testqi_1_maybe_si"
   [(set (reg FLAGS_REG)
-        (compare
+	(compare
 	  (and:QI
-	    (match_operand:QI 0 "nonimmediate_operand" "%!*a,q,qm,r")
-	    (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n"))
+	    (match_operand:QI 0 "nonimmediate_operand" "%qm,*a,qm,r")
+	    (match_operand:QI 1 "nonmemory_operand" "q,n,n,n"))
 	  (const_int 0)))]
-
   "ix86_match_ccmode (insn,
 		      CONST_INT_P (operands[1])
 		      && INTVAL (operands[1]) >= 0 ? CCNOmode : CCZmode)"
@@ -8174,20 +8186,20 @@
 }
   [(set_attr "type" "test")
    (set_attr "mode" "QI,QI,QI,SI")
-   (set_attr "pent_pair" "uv,np,uv,np")])
+   (set_attr "pent_pair" "uv,uv,np,np")])
 
 (define_insn "*test<mode>_1"
   [(set (reg FLAGS_REG)
 	(compare
-	 (and:SWI124
-	  (match_operand:SWI124 0 "nonimmediate_operand" "%!*a,<r>,<r>m")
-	  (match_operand:SWI124 1 "<nonmemory_szext_operand>" "<i>,<i>,<r><i>"))
+	  (and:SWI124
+	    (match_operand:SWI124 0 "nonimmediate_operand" "%<r>m,*a,<r>m")
+	    (match_operand:SWI124 1 "<nonmemory_szext_operand>" "<r>,<i>,<i>"))
 	 (const_int 0)))]
   "ix86_match_ccmode (insn, CCNOmode)"
   "test{<imodesuffix>}\t{%1, %0|%0, %1}"
   [(set_attr "type" "test")
    (set_attr "mode" "<MODE>")
-   (set_attr "pent_pair" "uv,np,uv")])
+   (set_attr "pent_pair" "uv,uv,np")])
 
 (define_expand "testqi_ext_1_ccno"
   [(set (reg:CCNO FLAGS_REG)