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| author | Richard Kenner <kenner@gcc.gnu.org> | 1995-06-08 17:42:08 -0400 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 1995-06-08 17:42:08 -0400 |
| commit | 455350f4173515b40c7a9dd64bb90061f42a8ae6 (patch) | |
| tree | 4929f30be78d9efa1bb81168e420d9e0cbed6186 /gcc | |
| parent | 27f3162f4b0629f93767ef05fc826409254cd400 (diff) | |
| download | gcc-455350f4173515b40c7a9dd64bb90061f42a8ae6.zip gcc-455350f4173515b40c7a9dd64bb90061f42a8ae6.tar.gz gcc-455350f4173515b40c7a9dd64bb90061f42a8ae6.tar.bz2 | |
(aux_truncdfsf2): New pattern.
(movsf): Use it instead of invalid SUBREG and truncdfsf2.
From-SVN: r9902
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 19d53d4..da113ed 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2712,6 +2712,13 @@ "frsp %0,%1" [(set_attr "type" "fp")]) +(define_insn "aux_truncdfsf2" + [(set (match_operand:SF 0 "gpc_reg_operand" "=f") + (unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] 0))] + "! TARGET_POWERPC && TARGET_HARD_FLOAT" + "frsp %0,%1" + [(set_attr "type" "fp")]) + (define_insn "negsf2" [(set (match_operand:SF 0 "gpc_reg_operand" "=f") (neg:SF (match_operand:SF 1 "gpc_reg_operand" "f")))] @@ -4082,11 +4089,12 @@ /* If operands[1] is a register, it may have double-precision data in it, so truncate it to single precision. We need not do this for POWERPC. */ - if (! TARGET_POWERPC && GET_CODE (operands[1]) == REG) + if (! TARGET_POWERPC && TARGET_HARD_FLOAT + && GET_CODE (operands[1]) == REG) { - rtx newreg = reload_in_progress ? operands[1] : gen_reg_rtx (SFmode); - emit_insn (gen_truncdfsf2 (newreg, - gen_rtx (SUBREG, DFmode, operands[1], 0))); + rtx newreg + = reload_in_progress ? operands[1] : gen_reg_rtx (SFmode); + emit_insn (gen_aux_truncdfsf2 (newreg, operands[1])); operands[1] = newreg; } |