diff options
| author | Kewen Lin <linkw@linux.ibm.com> | 2020-07-08 02:44:02 -0500 |
|---|---|---|
| committer | Kewen Lin <linkw@linux.ibm.com> | 2020-07-08 02:48:01 -0500 |
| commit | 4070208f2384df01798d23e6ecba7b30296aa588 (patch) | |
| tree | 58fca72c9f795b02d03201d192c6748eb4eb4069 /gcc | |
| parent | d496134a6b1ef1314c18bd316d8c1900158beae9 (diff) | |
| download | gcc-4070208f2384df01798d23e6ecba7b30296aa588.zip gcc-4070208f2384df01798d23e6ecba7b30296aa588.tar.gz gcc-4070208f2384df01798d23e6ecba7b30296aa588.tar.bz2 | |
rs6000: Add len_load/len_store optab support
Define rs6000 specific len_load/len_store for the LEN_LOAD/LEN_STORE
internal function's expansion. As the doc description of the
len_load/len_store optab shows, we should use V16QI to wrap those
available vector modes.
gcc/ChangeLog:
* config/rs6000/vsx.md (len_load_v16qi): New define_expand.
(len_store_v16qi): Likewise.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 732a548..42a31a6 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -5100,6 +5100,34 @@ operands[3] = gen_reg_rtx (DImode); }) +;; Define optab for vector access with length vectorization exploitation. +(define_expand "len_load_v16qi" + [(match_operand:V16QI 0 "vlogical_operand") + (match_operand:V16QI 1 "memory_operand") + (match_operand:QI 2 "gpc_reg_operand")] + "TARGET_P9_VECTOR && TARGET_64BIT" +{ + rtx mem = XEXP (operands[1], 0); + mem = force_reg (DImode, mem); + rtx len = gen_lowpart (DImode, operands[2]); + emit_insn (gen_lxvl (operands[0], mem, len)); + DONE; +}) + +(define_expand "len_store_v16qi" + [(match_operand:V16QI 0 "memory_operand") + (match_operand:V16QI 1 "vlogical_operand") + (match_operand:QI 2 "gpc_reg_operand") + ] + "TARGET_P9_VECTOR && TARGET_64BIT" +{ + rtx mem = XEXP (operands[0], 0); + mem = force_reg (DImode, mem); + rtx len = gen_lowpart (DImode, operands[2]); + emit_insn (gen_stxvl (operands[1], mem, len)); + DONE; +}) + (define_insn "*stxvl" [(set (mem:V16QI (match_operand:DI 1 "gpc_reg_operand" "b")) (unspec:V16QI |