diff options
| author | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | 2022-10-24 10:05:24 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2022-10-24 10:21:03 +0800 |
| commit | 3eea8c6f4ba9356726879aa4e21b99ad1ad5662e (patch) | |
| tree | 58f933e52c528a38282d664262dd548870ce2c69 /gcc | |
| parent | 65908ac84b840ded3331e000d303d0a5b4b426c8 (diff) | |
| download | gcc-3eea8c6f4ba9356726879aa4e21b99ad1ad5662e.zip gcc-3eea8c6f4ba9356726879aa4e21b99ad1ad5662e.tar.gz gcc-3eea8c6f4ba9356726879aa4e21b99ad1ad5662e.tar.bz2 | |
RISC-V: Remove unused TI/TF vector modes.
gcc/ChangeLog:
* config/riscv/riscv-vector-switch.def (ENTRY): Remove unused TI/TF vector modes.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/riscv/riscv-vector-switch.def | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/gcc/config/riscv/riscv-vector-switch.def b/gcc/config/riscv/riscv-vector-switch.def index cacfccb..ee8ebd5 100644 --- a/gcc/config/riscv/riscv-vector-switch.def +++ b/gcc/config/riscv/riscv-vector-switch.def @@ -155,10 +155,6 @@ ENTRY (VNx4DF, TARGET_VECTOR_FP64) ENTRY (VNx2DF, TARGET_VECTOR_FP64) ENTRY (VNx1DF, TARGET_VECTOR_FP64) -/* SEW = 128. Disable all of them. */ -ENTRY (VNx2TI, false) -ENTRY (VNx2TF, false) - #undef TARGET_VECTOR_FP32 #undef TARGET_VECTOR_FP64 #undef ENTRY |