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| author | Richard Earnshaw <rearnsha@arm.com> | 2004-12-14 14:06:02 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2004-12-14 14:06:02 +0000 |
| commit | 3a42aebe0bc6555520bbd648f491b55079914f5d (patch) | |
| tree | df1a7fc36ddcfd069dbfd347ffcf22da41e9b13f /gcc | |
| parent | 370d199d82a663b0776a9ba4f9e5dfde7a557b0f (diff) | |
| download | gcc-3a42aebe0bc6555520bbd648f491b55079914f5d.zip gcc-3a42aebe0bc6555520bbd648f491b55079914f5d.tar.gz gcc-3a42aebe0bc6555520bbd648f491b55079914f5d.tar.bz2 | |
re PR target/18973 (-mcpu=arm926ejs should set FL_LDSCHED)
PR target/18973
arm-cores.def (arm926ej-s, arm1026ej-s, arm1136j-s, arm1136-jfs)
(arm1176jz-s, arm1176jzf-s, mpcorenovfp, mpcore): Add load-scheduling
property to flags.
From-SVN: r92135
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/arm/arm-cores.def | 16 |
2 files changed, 15 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ac417a9..81f345d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-12-14 Richard Earnshaw <rearnsha@arm.com> + + PR target/18973 + arm-cores.def (arm926ej-s, arm1026ej-s, arm1136j-s, arm1136-jfs) + (arm1176jz-s, arm1176jzf-s, mpcorenovfp, mpcore): Add load-scheduling + property to flags. + 2004-12-14 Diego Novillo <dnovillo@redhat.com> * tree-gimple.c (get_base_address): Update documentation. diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def index d01fc7a..abc5230 100644 --- a/gcc/config/arm/arm-cores.def +++ b/gcc/config/arm/arm-cores.def @@ -105,13 +105,13 @@ ARM_CORE("xscale", xscale, 5TE, FL_LDSCHED | FL_ ARM_CORE("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale) /* V5TEJ Architecture Processors */ -ARM_CORE("arm926ej-s", arm926ejs, 5TEJ, 0, 9e) -ARM_CORE("arm1026ej-s", arm1026ejs, 5TEJ, 0, 9e) +ARM_CORE("arm926ej-s", arm926ejs, 5TEJ, FL_LDSCHED, 9e) +ARM_CORE("arm1026ej-s", arm1026ejs, 5TEJ, FL_LDSCHED, 9e) /* V6 Architecture Processors */ -ARM_CORE("arm1136j-s", arm1136js, 6J, 0, 9e) -ARM_CORE("arm1136jf-s", arm1136jfs, 6J, FL_VFPV2, 9e) -ARM_CORE("arm1176jz-s", arm1176jzs, 6ZK, 0, 9e) -ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_VFPV2, 9e) -ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, 0, 9e) -ARM_CORE("mpcore", mpcore, 6K, FL_VFPV2, 9e) +ARM_CORE("arm1136j-s", arm1136js, 6J, FL_LDSCHED, 9e) +ARM_CORE("arm1136jf-s", arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e) +ARM_CORE("arm1176jz-s", arm1176jzs, 6ZK, FL_LDSCHED, 9e) +ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e) +ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e) +ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e) |