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authorJakub Jelinek <jakub@redhat.com>2015-02-27 16:01:57 +0100
committerAldy Hernandez <aldyh@gcc.gnu.org>2015-02-27 15:01:57 +0000
commit395df65e21e27cce615fb89747c553d4814c6b07 (patch)
treeb5917f8580c655b57a482ab30c88fa6f01700a97 /gcc
parent4fcfb584fe61bc537e45ea4bfffe738aa19f193b (diff)
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re PR rtl-optimization/65220 (integer division in stack alignment for VLA allocation)
PR rtl-optimization/65220 * config/i386/i386.md (*udivmod<mode>4_pow2): New. Co-Authored-By: Aldy Hernandez <aldyh@redhat.com> From-SVN: r221064
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/i386/i386.md26
-rw-r--r--gcc/testsuite/gcc.target/i386/pr65520.c20
3 files changed, 52 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 439b428..bae6265 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-02-26 Jakub Jelinek <jakub@redhat.com>
+ Aldy Hernandez <aldyh@redhat.com>
+
+ PR rtl-optimization/65220
+ * config/i386/i386.md (*udivmod<mode>4_pow2): New.
+
2015-02-27 Vladimir Makarov <vmakarov@redhat.com>
PR target/65032
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 2d3d075..8495284 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7331,6 +7331,32 @@
[(set_attr "type" "multi")
(set_attr "mode" "<MODE>")])
+;; Optimize division or modulo by constant power of 2, if the constant
+;; materializes only after expansion.
+(define_insn_and_split "*udivmod<mode>4_pow2"
+ [(set (match_operand:SWI48 0 "register_operand" "=r")
+ (udiv:SWI48 (match_operand:SWI48 2 "register_operand" "0")
+ (match_operand:SWI48 3 "const_int_operand" "n")))
+ (set (match_operand:SWI48 1 "register_operand" "=r")
+ (umod:SWI48 (match_dup 2) (match_dup 3)))
+ (clobber (reg:CC FLAGS_REG))]
+ "UINTVAL (operands[3]) - 2 < <MODE_SIZE> * BITS_PER_UNIT
+ && (UINTVAL (operands[3]) & (UINTVAL (operands[3]) - 1)) == 0"
+ "#"
+ "&& reload_completed"
+ [(set (match_dup 1) (match_dup 2))
+ (parallel [(set (match_dup 0) (lshiftrt:<MODE> (match_dup 2) (match_dup 4)))
+ (clobber (reg:CC FLAGS_REG))])
+ (parallel [(set (match_dup 1) (and:<MODE> (match_dup 1) (match_dup 5)))
+ (clobber (reg:CC FLAGS_REG))])]
+{
+ int v = exact_log2 (UINTVAL (operands[3]));
+ operands[4] = GEN_INT (v);
+ operands[5] = GEN_INT ((HOST_WIDE_INT_1U << v) - 1);
+}
+ [(set_attr "type" "multi")
+ (set_attr "mode" "<MODE>")])
+
(define_insn "*udivmod<mode>4_noext"
[(set (match_operand:SWIM248 0 "register_operand" "=a")
(udiv:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
diff --git a/gcc/testsuite/gcc.target/i386/pr65520.c b/gcc/testsuite/gcc.target/i386/pr65520.c
new file mode 100644
index 0000000..8a62c39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr65520.c
@@ -0,0 +1,20 @@
+/* PR target/65520 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int foo (void *);
+
+void
+bar (void)
+{
+ unsigned s = 128;
+ while (1)
+ {
+ unsigned b[s];
+ if (foo (b))
+ break;
+ s *= 2;
+ }
+}
+
+/* { dg-final { scan-assembler-not "div\[^\n\r]*%" } } */