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| author | Julia Koval <julia.koval@intel.com> | 2018-04-16 07:59:52 +0200 |
|---|---|---|
| committer | Julia Koval <jkoval@gcc.gnu.org> | 2018-04-16 07:59:52 +0200 |
| commit | 2cb0369c9e62f450a3dd9b227f0ae29659639a56 (patch) | |
| tree | 512fa56b191d42b17ea6d5baf77df8d9972ff00f /gcc | |
| parent | 23addc6180ec44ef5922a51c9c00efd4fad6ea49 (diff) | |
| download | gcc-2cb0369c9e62f450a3dd9b227f0ae29659639a56.zip gcc-2cb0369c9e62f450a3dd9b227f0ae29659639a56.tar.gz gcc-2cb0369c9e62f450a3dd9b227f0ae29659639a56.tar.bz2 | |
Add sse_unaligned_load_optimal and sse_unaligned_store_optimal to Skylake.
gcc/
PR target/84413
* config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL,
X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Add m_SKYLAKE_AVX512
From-SVN: r259395
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/x86-tune.def | 5 |
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9b7f845..a04b68f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-04-16 Julia Koval <julia.koval@intel.com> + + PR target/84413 + * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL, + X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Add m_SKYLAKE_AVX512 + 2018-04-14 Segher Boessenkool <segher@kernel.crashing.org> PR target/85293 diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 9843ed8..5649fdc 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -336,13 +336,14 @@ DEF_TUNE (X86_TUNE_GENERAL_REGS_SSE_SPILL, "general_regs_sse_spill", of a sequence loading registers by parts. */ DEF_TUNE (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL, "sse_unaligned_load_optimal", m_NEHALEM | m_SANDYBRIDGE | m_HASWELL | m_SILVERMONT | m_KNL | m_KNM - | m_INTEL | m_AMDFAM10 | m_BDVER | m_BTVER | m_ZNVER1 | m_GENERIC) + | m_INTEL | m_SKYLAKE_AVX512 | m_AMDFAM10 | m_BDVER | m_BTVER + | m_ZNVER1 | m_GENERIC) /* X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL: Use movups for misaligned stores instead of a sequence loading registers by parts. */ DEF_TUNE (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL, "sse_unaligned_store_optimal", m_NEHALEM | m_SANDYBRIDGE | m_HASWELL | m_SILVERMONT | m_KNL | m_KNM - | m_INTEL | m_BDVER | m_ZNVER1 | m_GENERIC) + | m_INTEL | m_SKYLAKE_AVX512 | m_BDVER | m_ZNVER1 | m_GENERIC) /* Use packed single precision instructions where posisble. I.e. movups instead of movupd. */ |