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author | Steve Ellcey <sellcey@cavium.com> | 2018-09-28 14:41:45 +0000 |
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committer | Steve Ellcey <sje@gcc.gnu.org> | 2018-09-28 14:41:45 +0000 |
commit | 259cd78a20e28382e2a5f08daee1acc2a74c6c2d (patch) | |
tree | fef43bf26b4afbe52a3a288494d08224f2e4cf71 /gcc | |
parent | 20a73a194737adc71e93846271132f1153fa8e76 (diff) | |
download | gcc-259cd78a20e28382e2a5f08daee1acc2a74c6c2d.zip gcc-259cd78a20e28382e2a5f08daee1acc2a74c6c2d.tar.gz gcc-259cd78a20e28382e2a5f08daee1acc2a74c6c2d.tar.bz2 |
re PR testsuite/87433 (gcc.dg/zero_bits_compound-1.c and gcc.target/aarch64/ashltidisi.c tests fail after combine two to two instruction patch on aarch64)
2018-09-28 Steve Ellcey <sellcey@cavium.com>
PR testsuite/87433
* gcc.dg/zero_bits_compound-1.c: Do not run on aarch64*-*-*.
From-SVN: r264691
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/zero_bits_compound-1.c | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 25f6df6..c62b37c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-09-28 Steve Ellcey <sellcey@cavium.com> + + PR testsuite/87433 + * gcc.dg/zero_bits_compound-1.c: Do not run on aarch64*-*-*. + 2018-09-28 Eric Botcazou <ebotcazou@adacore.com> * gcc.target/sparc/20160229-1.c: Minor tweak. diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c index 63b8ac1..e715949 100644 --- a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c +++ b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c @@ -4,7 +4,7 @@ /* Note: This test requires that char, int and long have different sizes and the target has a way to do 32 -> 64 bit zero extension other than AND. */ -/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* aarch64*-*-* } } */ +/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* } } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-O3 -dP" } */ |