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| author | Jakub Jelinek <jakub@redhat.com> | 2016-05-26 10:45:49 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2016-05-26 10:45:49 +0200 |
| commit | 2116e19f83541bdddcf77ecbc13c08f2fcae1686 (patch) | |
| tree | c3fe3819c397ae1d28ec2b9d142ab1adb54edfc9 /gcc | |
| parent | 305aef090c2a447526d40bab58830a0a50d718b5 (diff) | |
| download | gcc-2116e19f83541bdddcf77ecbc13c08f2fcae1686.zip gcc-2116e19f83541bdddcf77ecbc13c08f2fcae1686.tar.gz gcc-2116e19f83541bdddcf77ecbc13c08f2fcae1686.tar.bz2 | |
sse.md (*vcvtps2ph_store<mask_name>): Use v constraint instead of x constraint.
* config/i386/sse.md (*vcvtps2ph_store<mask_name>): Use v constraint
instead of x constraint.
(vcvtps2ph256<mask_name>): Likewise.
* gcc.target/i386/avx512vl-vcvtps2ph-3.c: New test.
From-SVN: r236765
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 6 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c | 41 |
4 files changed, 50 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7b7c6a9..b1cd89e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,9 @@ 2016-05-26 Jakub Jelinek <jakub@redhat.com> + * config/i386/sse.md (*vcvtps2ph_store<mask_name>): Use v constraint + instead of x constraint. + (vcvtps2ph256<mask_name>): Likewise. + * config/i386/sse.md (*ssse3_palignr<mode>_perm): Add avx512bw alternative. Formatting fix. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 93b6571..0d3dab6 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -18335,7 +18335,7 @@ (define_insn "*vcvtps2ph_store<mask_name>" [(set (match_operand:V4HI 0 "memory_operand" "=m") - (unspec:V4HI [(match_operand:V4SF 1 "register_operand" "x") + (unspec:V4HI [(match_operand:V4SF 1 "register_operand" "v") (match_operand:SI 2 "const_0_to_255_operand" "N")] UNSPEC_VCVTPS2PH))] "TARGET_F16C || TARGET_AVX512VL" @@ -18345,8 +18345,8 @@ (set_attr "mode" "V4SF")]) (define_insn "vcvtps2ph256<mask_name>" - [(set (match_operand:V8HI 0 "nonimmediate_operand" "=xm") - (unspec:V8HI [(match_operand:V8SF 1 "register_operand" "x") + [(set (match_operand:V8HI 0 "nonimmediate_operand" "=vm") + (unspec:V8HI [(match_operand:V8SF 1 "register_operand" "v") (match_operand:SI 2 "const_0_to_255_operand" "N")] UNSPEC_VCVTPS2PH))] "TARGET_F16C || TARGET_AVX512VL" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f89f81b..4fc3a5f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,7 @@ 2016-05-26 Jakub Jelinek <jakub@redhat.com> + * gcc.target/i386/avx512vl-vcvtps2ph-3.c: New test. + * gcc.target/i386/avx512bw-vpalignr-4.c: New test. * gcc.target/i386/avx512vl-vpalignr-4.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c new file mode 100644 index 0000000..2fd2215 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c @@ -0,0 +1,41 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -mf16c -mavx512vl -masm=att" } */ + +#include <x86intrin.h> + +void +f1 (__m128 x) +{ + register __m128 a __asm ("xmm16"); + register __m128i b __asm ("xmm17"); + a = x; + asm volatile ("" : "+v" (a)); + b = _mm_cvtps_ph (a, 1); + asm volatile ("" : "+v" (b)); +} + +/* { dg-final { scan-assembler "vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%xmm16\[^\n\r]*%xmm17" } } */ + +void +f2 (__m256 x) +{ + register __m256 a __asm ("xmm16"); + register __m128i b __asm ("xmm17"); + a = x; + asm volatile ("" : "+v" (a)); + b = _mm256_cvtps_ph (a, 1); + asm volatile ("" : "+v" (b)); +} + +/* { dg-final { scan-assembler "vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%ymm16\[^\n\r]*%xmm17" } } */ + +void +f3 (__m256 x, __v8hi *y) +{ + register __m256 a __asm ("xmm16"); + a = x; + asm volatile ("" : "+v" (a)); + *y = (__v8hi) _mm256_cvtps_ph (a, 1); +} + +/* { dg-final { scan-assembler "vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%ymm16\[^\n\r]*%rdi" } } */ |