diff options
author | Gavin Romig-Koch <gavin@cygnus.com> | 1999-02-04 07:51:51 +0000 |
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committer | Gavin Romig-Koch <gavin@gcc.gnu.org> | 1999-02-04 07:51:51 +0000 |
commit | 1feed51c7756a848d325a2861536cbec381dd9d3 (patch) | |
tree | aa14e6d17560ed49b6b6443083a7fb3ad719305e /gcc | |
parent | 333dc73199807815b613e11d4fc413e27c295cd7 (diff) | |
download | gcc-1feed51c7756a848d325a2861536cbec381dd9d3.zip gcc-1feed51c7756a848d325a2861536cbec381dd9d3.tar.gz gcc-1feed51c7756a848d325a2861536cbec381dd9d3.tar.bz2 |
mips.md ([u]divmodsi4,[u]divmoddi4,[u]divsi3,[u]divdi3, [...]): Don't copy the "zero" argument to a register before calling gen_div_trap.
* config/mips/mips.md ([u]divmodsi4,[u]divmoddi4,[u]divsi3,[u]divdi3,
[u]modsi3,[u]moddi3) : Don't copy the "zero" argument to a register
before calling gen_div_trap.
From-SVN: r25019
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/mips/mips.md | 24 |
2 files changed, 18 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b0d0c5b..3a22288 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Thu Feb 4 10:46:30 1999 Gavin Romig-Koch <gavin@cygnus.com> + + * config/mips/mips.md ([u]divmodsi4,[u]divmoddi4,[u]divsi3,[u]divdi3, + [u]modsi3,[u]moddi3) : Don't copy the "zero" argument to a register + before calling gen_div_trap. + Wed Feb 3 21:56:27 1999 Jeffrey A Law (law@cygnus.com) * configure.in (hppa1.1-*-*, hppa2*-*): Use symbolic value rather diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 40e7419..71bd9a6 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -2248,7 +2248,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2298,7 +2298,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2348,7 +2348,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2389,7 +2389,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2516,7 +2516,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2559,7 +2559,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2602,7 +2602,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2645,7 +2645,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2688,7 +2688,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2722,7 +2722,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2756,7 +2756,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2790,7 +2790,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } |