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authorGCC Administrator <gccadmin@gcc.gnu.org>2021-10-20 00:16:43 +0000
committerGCC Administrator <gccadmin@gcc.gnu.org>2021-10-20 00:16:43 +0000
commit19472fc3fc0cabcee5b8a5073e8128d21a1ed6f2 (patch)
tree07bd8a2bf1bfbf21984c89b066207c2574f6c91f /gcc
parent5566f3c6b46cf053ae4b918513e318561b7af053 (diff)
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Daily bump.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog161
-rw-r--r--gcc/DATESTAMP2
-rw-r--r--gcc/cp/ChangeLog6
-rw-r--r--gcc/fortran/ChangeLog12
-rw-r--r--gcc/testsuite/ChangeLog50
5 files changed, 230 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fd3526b..01d4a86 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,164 @@
+2021-10-19 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/extend.texi (Basic PowerPC Built-in Functions): Fix typo.
+
+2021-10-19 Paul A. Clarke <pc@us.ibm.com>
+
+ PR target/101893
+ PR target/102719
+ * config/rs6000/emmintrin.h: Guard POWER8 intrinsics.
+ * config/rs6000/pmmintrin.h: Same.
+ * config/rs6000/smmintrin.h: Same.
+ * config/rs6000/tmmintrin.h: Same.
+
+2021-10-19 Paul A. Clarke <pc@us.ibm.com>
+
+ * config.gcc (extra_headers): Add nmmintrin.h.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vect_supportable_dr_alignment): Add
+ misalignment parameter.
+ * tree-vect-data-refs.c (vect_get_peeling_costs_all_drs):
+ Do not change DR_MISALIGNMENT in place, instead pass the
+ adjusted misalignment to vect_supportable_dr_alignment.
+ (vect_peeling_supportable): Likewise.
+ (vect_peeling_hash_get_lowest_cost): Adjust.
+ (vect_enhance_data_refs_alignment): Likewise.
+ (vect_vfa_access_size): Likewise.
+ (vect_supportable_dr_alignment): Add misalignment
+ parameter and simplify.
+ * tree-vect-stmts.c (get_negative_load_store_type): Adjust.
+ (get_group_load_store_type): Likewise.
+ (get_load_store_type): Likewise.
+
+2021-10-19 Clément Chigot <clement.chigot@atos.net>
+
+ * config/rs6000/rs6000.c (rs6000_xcoff_file_end): Move
+ __tls_get_addr reference to .text csect.
+
+2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102375
+ * config/aarch64/aarch64.c (aarch64_process_one_target_attr):
+ Strip whitespaces.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vect_get_store_cost): Adjust signature.
+ (vect_get_load_cost): Likewise.
+ * tree-vect-data-refs.c (vect_get_data_access_cost): Get
+ alignment support scheme and misalignment as arguments
+ and pass them down.
+ (vect_get_peeling_costs_all_drs): Compute that info here
+ and note that we shouldn't need to.
+ * tree-vect-stmts.c (vect_model_store_cost): Get
+ alignment support scheme and misalignment as arguments.
+ (vect_get_store_cost): Likewise.
+ (vect_model_load_cost): Likewise.
+ (vect_get_load_cost): Likewise.
+ (vectorizable_store): Pass down alignment support scheme
+ and misalignment to costing.
+ (vectorizable_load): Likewise.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (get_negative_load_store_type): Add
+ offset output parameter and initialize it.
+ (get_group_load_store_type): Likewise.
+ (get_load_store_type): Likewise.
+ (vectorizable_store): Use offset as computed by
+ get_load_store_type.
+ (vectorizable_load): Likewise.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102827
+ * tree-if-conv.c (predicate_statements): Add pe parameter
+ and use that edge to insert invariant stmts on.
+ (combine_blocks): Pass through pe.
+ (tree_if_conversion): Compute the edge to insert invariant
+ stmts on and pass it along.
+
+2021-10-19 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR target/102785
+ * config/bfin/bfin.md (addsubv2hi3, subaddv2hi3, ssaddsubv2hi3,
+ sssubaddv2hi3): Swap the order of operators in vec_concat.
+
+2021-10-19 Xionghu Luo <luoxhu@linux.ibm.com>
+
+ * config/rs6000/altivec.md (*altivec_vmrghb_internal): Delete.
+ (altivec_vmrghb_direct): New.
+ (*altivec_vmrghh_internal): Delete.
+ (altivec_vmrghh_direct): New.
+ (*altivec_vmrghw_internal): Delete.
+ (altivec_vmrghw_direct_<mode>): New.
+ (altivec_vmrghw_direct): Delete.
+ (*altivec_vmrglb_internal): Delete.
+ (altivec_vmrglb_direct): New.
+ (*altivec_vmrglh_internal): Delete.
+ (altivec_vmrglh_direct): New.
+ (*altivec_vmrglw_internal): Delete.
+ (altivec_vmrglw_direct_<mode>): New.
+ (altivec_vmrglw_direct): Delete.
+ * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Adjust.
+ * config/rs6000/rs6000.c (altivec_expand_vec_perm_const):
+ Adjust.
+ * config/rs6000/vsx.md (vsx_xxmrghw_<mode>): Adjust.
+ (vsx_xxmrglw_<mode>): Adjust.
+
+2021-10-19 Aldy Hernandez <aldyh@redhat.com>
+
+ * passes.def: Change threading comment before pass_ccp pass.
+
+2021-10-19 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ * config/rs6000/rs6000-call.c (altivec_expand_lxvr_builtin):
+ Modify the expansion for sign extension. All extensions are done
+ within VSX registers.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.c (get_group_load_store_type): Add
+ misalignment output parameter and initialize it.
+ (get_group_load_store_type): Likewise.
+ (vectorizable_store): Remove now redundant queries.
+ (vectorizable_load): Likewise.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.h (vect_supportable_dr_alignment): Remove
+ check_aligned argument.
+ * tree-vect-data-refs.c (vect_supportable_dr_alignment):
+ Likewise.
+ (vect_peeling_hash_insert): Add supportable_if_not_aligned
+ argument and do not call vect_supportable_dr_alignment here.
+ (vect_peeling_supportable): Adjust.
+ (vect_enhance_data_refs_alignment): Compute whether the
+ access is supported with different alignment here and
+ pass that down to vect_peeling_hash_insert.
+ (vect_vfa_access_size): Adjust.
+ * tree-vect-stmts.c (vect_get_store_cost): Likewise.
+ (vect_get_load_cost): Likewise.
+ (get_negative_load_store_type): Likewise.
+ (get_group_load_store_type): Likewise.
+ (get_load_store_type): Likewise.
+
+2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102374
+ * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p): Strip whitespaces.
+ * system.h (strip_whilespaces): New function.
+
+2021-10-19 dianhong xu <dianhong.xu@intel.com>
+
+ * config/i386/avx512fp16intrin.h:
+ (_mm512_set1_pch): New intrinsic.
+ * config/i386/avx512fp16vlintrin.h:
+ (_mm256_set1_pch): New intrinsic.
+ (_mm_set1_pch): Ditto.
+
2021-10-18 Andrew MacLeod <amacleod@redhat.com>
PR tree-optimization/102796
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 24ba235..17461b1 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20211019
+20211020
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index ffdb690..15419f5 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,9 @@
+2021-10-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/102786
+ * constexpr.c (cxx_eval_constant_expression): Don't reject
+ INTEGER_CSTs with type POINTER_TYPE to METHOD_TYPE.
+
2021-10-15 Jason Merrill <jason@redhat.com>
PR c++/51851
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index ea21a1e..d80ac05 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,15 @@
+2021-10-19 Tobias Burnus <tobias@codesourcery.com>
+
+ * trans-types.c (create_fn_spec): For allocatable/pointer
+ character(len=:), use 'w' not 'R' as fn spec for the length dummy
+ argument.
+
+2021-10-19 Tobias Burnus <tobias@codesourcery.com>
+
+ PR fortran/92482
+ * trans-expr.c (gfc_conv_procedure_call): Use TREE_OPERAND not
+ build_fold_indirect_ref_loc to undo an ADDR_EXPR.
+
2021-10-18 Tobias Burnus <tobias@codesourcery.com>
PR fortran/102086
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c8dcf85..dc42e4a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,53 @@
+2021-10-19 Paul A. Clarke <pc@us.ibm.com>
+
+ * gcc.target/powerpc/sse4_2-pcmpgtq.c: Tighten dg constraints
+ to minimally Power8.
+
+2021-10-19 Tobias Burnus <tobias@codesourcery.com>
+
+ PR fortran/92482
+ * gfortran.dg/bind-c-char-descr.f90: Remove xfail; extend a bit.
+
+2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102375
+ * gcc.target/aarch64/pr102375.c: New test.
+
+2021-10-19 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/102827
+ * gcc.dg/pr102827.c: New testcase.
+
+2021-10-19 Xionghu Luo <luoxhu@linux.ibm.com>
+
+ * gcc.target/powerpc/builtins-1.c: Update instruction counts.
+
+2021-10-19 Haochen Gui <guihaoc@gcc.gnu.org>
+
+ * gcc.target/powerpc/p10_vec_xl_sext.c: New test.
+
+2021-10-19 prathamesh.kulkarni <prathamesh.kulkarni@linaro.org>
+
+ PR target/93183
+ * gcc.target/aarch64/sve/pr93183.c: Remove -mcpu=generic+sve from dg-options.
+
+2021-10-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/102786
+ * g++.dg/cpp2a/constexpr-virtual19.C: New test.
+
+2021-10-19 Martin Liska <mliska@suse.cz>
+
+ PR target/102374
+ * gcc.target/i386/pr102374.c: New test.
+
+2021-10-19 dianhong xu <dianhong.xu@intel.com>
+
+ * gcc.target/i386/avx512fp16-set1-pch-1a.c: New test.
+ * gcc.target/i386/avx512fp16-set1-pch-1b.c: New test.
+ * gcc.target/i386/avx512fp16vl-set1-pch-1a.c: New test.
+ * gcc.target/i386/avx512fp16vl-set1-pch-1b.c: New test.
+
2021-10-18 Andrew MacLeod <amacleod@redhat.com>
PR tree-optimization/102796