re PR rtl-optimization/52714 (ICE in fixup_reorder_chain, at cfglayout.c:880)

	PR rtl-optimization/52714
	* combine.c (try_combine): Allow combining two insns into two
	new insns if at least one of those is a noop.

gcc/testsuite/
	* gcc.target/m68k/pr52714.c: New testcase.

From-SVN: r218302

4 files changed, 52 insertions, 3 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cfc6628..e3b3477 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-12-03  Segher Boessenkool  <segher@kernel.crashing.org>
+
+	PR rtl-optimization/52714
+	* combine.c (try_combine): Allow combining two insns into two
+	new insns if at least one of those is a noop.
+
 2014-12-03  Bin Cheng  <bin.cheng@arm.com>
 
 	* target.def (fusion_priority): Wrap code with @smallexample.
diff --git a/gcc/combine.c b/gcc/combine.c
index 63c1e4f..e6deb41 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -3812,15 +3812,20 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
   /* Similarly, check for a case where we have a PARALLEL of two independent
      SETs but we started with three insns.  In this case, we can do the sets
      as two separate insns.  This case occurs when some SET allows two
-     other insns to combine, but the destination of that SET is still live.  */
+     other insns to combine, but the destination of that SET is still live.
 
-  else if (i1 && insn_code_number < 0 && asm_noperands (newpat) < 0
+     Also do this if we started with two insns and (at least) one of the
+     resulting sets is a noop; this noop will be deleted later.  */
+
+  else if (insn_code_number < 0 && asm_noperands (newpat) < 0
 	   && GET_CODE (newpat) == PARALLEL
 	   && XVECLEN (newpat, 0) == 2
 	   && GET_CODE (XVECEXP (newpat, 0, 0)) == SET
+	   && GET_CODE (XVECEXP (newpat, 0, 1)) == SET
+	   && (i1 || set_noop_p (XVECEXP (newpat, 0, 0))
+		  || set_noop_p (XVECEXP (newpat, 0, 1)))
 	   && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 0))) != ZERO_EXTRACT
 	   && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 0))) != STRICT_LOW_PART
-	   && GET_CODE (XVECEXP (newpat, 0, 1)) == SET
 	   && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT
 	   && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART
 	   && ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 1)),
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f2e54ef..ee812d2 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2014-12-03  Segher Boessenkool  <segher.kernel.crashing.org>
+
+	PR rtl-optimization/52714
+	* gcc.target/m68k/pr52714.c: New testcase.
+
 2014-12-02  Uros Bizjak  <ubizjak@gmail.com>
 
 	* gcc.target/i386/avx512ifma-vpmaddhuq-2.c: Define AVX512IFMA.
diff --git a/gcc/testsuite/gcc.target/m68k/pr52714.c b/gcc/testsuite/gcc.target/m68k/pr52714.c
new file mode 100644
index 0000000..0a52a1d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/m68k/pr52714.c
@@ -0,0 +1,33 @@
+/* PR rtl-optimization/52714
+
+   Check that combine manages to remove the "stack == 0" test.
+   Without ICEing.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+int __re_compile_fastmap(unsigned char *p)
+{
+    unsigned char **stack;
+    unsigned size;
+    unsigned avail;
+
+    stack = __builtin_alloca(5 * sizeof(unsigned char*));
+    if (stack == 0)
+	return -2;
+    size = 5;
+    avail = 0;
+
+    for (;;) {
+	switch (*p++) {
+	case 0:
+	    if (avail == size)
+		return -2;
+	    stack[avail++] = p;
+	}
+    }
+
+    return 0;
+}
+
+/* { dg-final { scan-assembler-not {\mtst\.l %sp\M} } } */