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authorJerry Quinn <jquinn@nortelnetworks.com>1999-04-26 00:04:54 +0000
committerJeff Law <law@gcc.gnu.org>1999-04-25 18:04:54 -0600
commit13ee407e02f9bdd7d182301f9ccd1e8a236dec0e (patch)
tree0af4161ceb0c95b5311d99c7ff567aa135e1a043 /gcc
parentf9e814f10036123463e12b12065d9576f80f6e23 (diff)
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pa-hpux.h, [...]: Replace TARGET_SNAKE by TARGET_PA_11 and MASK_SNAKE by MASK_PA_11.
* pa/pa-hpux.h, pa/pa-hpux10.h, pa/pa-hpux9.h, pa/pa-osf.h, pa.h, pa.c, pa.md, configure.in, configure: Replace TARGET_SNAKE by TARGET_PA_11 and MASK_SNAKE by MASK_PA_11. From-SVN: r26630
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/pa/pa-hpux.h2
-rw-r--r--gcc/config/pa/pa-hpux10.h4
-rw-r--r--gcc/config/pa/pa-hpux9.h2
-rw-r--r--gcc/config/pa/pa-osf.h2
-rw-r--r--gcc/config/pa/pa.h24
-rw-r--r--gcc/config/pa/pa.md26
-rwxr-xr-xgcc/configure18
-rw-r--r--gcc/configure.in18
9 files changed, 54 insertions, 48 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2f05463..75802c5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+Mon Apr 26 00:58:54 1999 Jerry Quinn <jquinn@nortelnetworks.com>
+
+ * pa/pa-hpux.h, pa/pa-hpux10.h, pa/pa-hpux9.h, pa/pa-osf.h, pa.h,
+ pa.c, pa.md, configure.in, configure: Replace TARGET_SNAKE by
+ TARGET_PA_11 and MASK_SNAKE by MASK_PA_11.
+
Mon Apr 26 00:28:25 1999 Theodore Papadopoulo <Theodore.Papadopoulo@sophia.inria.fr>
* flags.h (inline_max_insns): Declare.
diff --git a/gcc/config/pa/pa-hpux.h b/gcc/config/pa/pa-hpux.h
index 1838442..84016d2 100644
--- a/gcc/config/pa/pa-hpux.h
+++ b/gcc/config/pa/pa-hpux.h
@@ -36,7 +36,7 @@ Boston, MA 02111-1307, USA. */
#define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -DPWB -Dhpux -Dunix -Asystem(unix) -Asystem(hpux) -Acpu(hppa) -Amachine(hppa)"
#undef LINK_SPEC
-#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE)
+#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11)
#define LINK_SPEC \
"%{!mpa-risc-1-0:%{!shared:-L/lib/pa1.1 -L/usr/lib/pa1.1 }}%{mlinker-opt:-O} %{!shared:-u main} %{static:-a archive} %{g*:-a archive} %{shared:-b}"
#else
diff --git a/gcc/config/pa/pa-hpux10.h b/gcc/config/pa/pa-hpux10.h
index 5050f24..ec56cc6 100644
--- a/gcc/config/pa/pa-hpux10.h
+++ b/gcc/config/pa/pa-hpux10.h
@@ -22,7 +22,7 @@ Boston, MA 02111-1307, USA. */
/* We can debug dynamically linked executables on hpux9; we also want
dereferencing of a NULL pointer to cause a SEGV. */
#undef LINK_SPEC
-#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE)
+#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11)
#define LINK_SPEC \
"%{!mpa-risc-1-0:%{!shared:-L/lib/pa1.1 -L/usr/lib/pa1.1 }} -z %{mlinker-opt:-O} %{!shared:-u main} %{static:-a archive} %{shared:-b}"
#else
@@ -46,7 +46,7 @@ Boston, MA 02111-1307, USA. */
#undef ASM_FILE_START
#define ASM_FILE_START(FILE) \
do { \
- if (TARGET_SNAKE) \
+ if (TARGET_PA_11) \
fputs("\t.LEVEL 1.1\n", FILE); \
else \
fputs("\t.LEVEL 1.0\n", FILE); \
diff --git a/gcc/config/pa/pa-hpux9.h b/gcc/config/pa/pa-hpux9.h
index c0ba9c1..89dbbc9 100644
--- a/gcc/config/pa/pa-hpux9.h
+++ b/gcc/config/pa/pa-hpux9.h
@@ -22,7 +22,7 @@ Boston, MA 02111-1307, USA. */
/* We can debug dynamically linked executables on hpux9; we also want
dereferencing of a NULL pointer to cause a SEGV. */
#undef LINK_SPEC
-#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE)
+#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11)
#define LINK_SPEC \
"%{!mpa-risc-1-0:%{!shared:-L/lib/pa1.1 -L/usr/lib/pa1.1 }} -z %{mlinker-opt:-O} %{!shared:-u main} %{static:-a archive} %{shared:-b}"
#else
diff --git a/gcc/config/pa/pa-osf.h b/gcc/config/pa/pa-osf.h
index 1d7d3ba..40aa9f5 100644
--- a/gcc/config/pa/pa-osf.h
+++ b/gcc/config/pa/pa-osf.h
@@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#undef CPP_PREDEFINES
-#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE)
+#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11)
#define CPP_PREDEFINES "-Dhppa -Dunix -Dhp9000 -Dspectrum -DREVARGV -Dhp700 -DHP700 -Dparisc -D__pa_risc -DPARISC -DBYTE_MSF -DBIT_MSF -Asystem(unix) -Asystem(mach) -Acpu(hppa) -Amachine(hppa)"
#else
#define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Dparisc -D__pa_risc -DPARISC -DBYTE_MSF -DBIT_MSF -Asystem(unix) -Asystem(mach) -Acpu(hppa) -Amachine(hppa)"
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 29f1d47..26a520d 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -70,8 +70,8 @@ extern int target_flags;
/* compile code for HP-PA 1.1 ("Snake") */
-#define MASK_SNAKE 1
-#define TARGET_SNAKE (target_flags & MASK_SNAKE)
+#define MASK_PA_11 1
+#define TARGET_PA_11 (target_flags & MASK_PA_11)
/* Disable all FP registers (they all become fixed). This may be necessary
for compiling kernels which perform lazy context switching of FP regs.
@@ -144,10 +144,10 @@ extern int target_flags;
An empty string NAME is used to identify the default VALUE. */
#define TARGET_SWITCHES \
- {{"snake", MASK_SNAKE, "Generate PA1.1 code"}, \
- {"nosnake", -MASK_SNAKE, "Do not generate PA1.1 code"}, \
- {"pa-risc-1-0", -MASK_SNAKE, "Do not generate PA1.1 code"}, \
- {"pa-risc-1-1", MASK_SNAKE, "Generate PA1.1 code"}, \
+ {{"snake", MASK_PA_11, "Generate PA1.1 code"}, \
+ {"nosnake", -MASK_PA_11, "Do not generate PA1.1 code"}, \
+ {"pa-risc-1-0", -MASK_PA_11, "Do not generate PA1.1 code"}, \
+ {"pa-risc-1-1", MASK_PA_11, "Generate PA1.1 code"}, \
{"disable-fpregs", MASK_DISABLE_FPREGS, "Disable FP regs"}, \
{"no-disable-fpregs", -MASK_DISABLE_FPREGS, "Do not disable FP regs"},\
{"no-space-regs", MASK_NO_SPACE_REGS, "Disable space regs"}, \
@@ -254,7 +254,7 @@ extern int target_flags;
fprintf (FILE, \
"\t.stabs \"\",%d,0,0,L$text_end0000\nL$text_end0000:\n", N_SO)
-#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE) == 0
+#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) == 0
#define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
%{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}\
%{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE}\
@@ -547,7 +547,7 @@ do { \
#define CONDITIONAL_REGISTER_USAGE \
{ \
- if (!TARGET_SNAKE) \
+ if (!TARGET_PA_11) \
{ \
for (i = 56; i < 88; i++) \
fixed_regs[i] = call_used_regs[i] = 1; \
@@ -614,7 +614,7 @@ do { \
The floating point registers are 64 bits wide. Snake fp regs are 32
bits wide */
#define HARD_REGNO_NREGS(REGNO, MODE) \
- (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
+ (!TARGET_PA_11 && FP_REGNO_P (REGNO) ? 1 \
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
@@ -623,7 +623,7 @@ do { \
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
/* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
- : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
+ : !TARGET_PA_11 && FP_REGNO_P (REGNO) \
? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
/* Make wide modes be in aligned registers. */ \
: GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
@@ -834,7 +834,7 @@ int zdepi_cint_p ();
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */
#define CLASS_MAX_NREGS(CLASS, MODE) \
- (!TARGET_SNAKE && ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) ? 1 : \
+ (!TARGET_PA_11 && ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) ? 1 : \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
/* Stack layout; function entry, exit and calling. */
@@ -1955,7 +1955,7 @@ while (0)
case MULT: \
if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
return COSTS_N_INSNS (3); \
- return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
+ return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
case DIV: \
if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index d5f6ace..c4e065a 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -2834,7 +2834,7 @@
(const_int 0))
(set (match_operand:SF 0 "register_operand" "")
(float:SF (match_dup 2)))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
"operands[2] = gen_reg_rtx (DImode);")
(define_expand "floatunssidf2"
@@ -2844,13 +2844,13 @@
(const_int 0))
(set (match_operand:DF 0 "register_operand" "")
(float:DF (match_dup 2)))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
"operands[2] = gen_reg_rtx (DImode);")
(define_insn "floatdisf2"
[(set (match_operand:SF 0 "register_operand" "=f")
(float:SF (match_operand:DI 1 "register_operand" "f")))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
"fcnvxf,dbl,sgl %1,%0"
[(set_attr "type" "fpalu")
(set_attr "length" "4")])
@@ -2858,7 +2858,7 @@
(define_insn "floatdidf2"
[(set (match_operand:DF 0 "register_operand" "=f")
(float:DF (match_operand:DI 1 "register_operand" "f")))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
"fcnvxf,dbl,dbl %1,%0"
[(set_attr "type" "fpalu")
(set_attr "length" "4")])
@@ -2885,7 +2885,7 @@
(define_insn "fix_truncsfdi2"
[(set (match_operand:DI 0 "register_operand" "=f")
(fix:DI (fix:SF (match_operand:SF 1 "register_operand" "f"))))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
"fcnvfxt,sgl,dbl %1,%0"
[(set_attr "type" "fpalu")
(set_attr "length" "4")])
@@ -2893,7 +2893,7 @@
(define_insn "fix_truncdfdi2"
[(set (match_operand:DI 0 "register_operand" "=f")
(fix:DI (fix:DF (match_operand:DF 1 "register_operand" "f"))))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
"fcnvfxt,dbl,dbl %1,%0"
[(set_attr "type" "fpalu")
(set_attr "length" "4")])
@@ -3062,7 +3062,7 @@
""
"
{
- if (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT)
+ if (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT)
{
rtx scratch = gen_reg_rtx (DImode);
operands[1] = force_reg (SImode, operands[1]);
@@ -3080,7 +3080,7 @@
[(set (match_operand:DI 0 "nonimmediate_operand" "=f")
(mult:DI (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "f"))
(zero_extend:DI (match_operand:SI 2 "nonimmediate_operand" "f"))))]
- "TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
+ "TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
"xmpyu %1,%2,%0"
[(set_attr "type" "fpmuldbl")
(set_attr "length" "4")])
@@ -3089,7 +3089,7 @@
[(set (match_operand:DI 0 "nonimmediate_operand" "=f")
(mult:DI (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "f"))
(match_operand:DI 2 "uint32_operand" "f")))]
- "TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
+ "TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
"xmpyu %1,%R2,%0"
[(set_attr "type" "fpmuldbl")
(set_attr "length" "4")])
@@ -4864,7 +4864,7 @@
(set (match_operand 3 "register_operand" "+f")
(plus (match_operand 4 "register_operand" "f")
(match_operand 5 "register_operand" "f")))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT
&& reload_completed && fmpyaddoperands (operands)"
"*
{
@@ -4893,7 +4893,7 @@
(set (match_operand 0 "register_operand" "=f")
(mult (match_operand 1 "register_operand" "f")
(match_operand 2 "register_operand" "f")))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT
&& reload_completed && fmpyaddoperands (operands)"
"*
{
@@ -4922,7 +4922,7 @@
(set (match_operand 3 "register_operand" "+f")
(minus (match_operand 4 "register_operand" "f")
(match_operand 5 "register_operand" "f")))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT
&& reload_completed && fmpysuboperands (operands)"
"*
{
@@ -4941,7 +4941,7 @@
(set (match_operand 0 "register_operand" "=f")
(mult (match_operand 1 "register_operand" "f")
(match_operand 2 "register_operand" "f")))]
- "TARGET_SNAKE && ! TARGET_SOFT_FLOAT
+ "TARGET_PA_11 && ! TARGET_SOFT_FLOAT
&& reload_completed && fmpysuboperands (operands)"
"*
{
diff --git a/gcc/configure b/gcc/configure
index 9ccf554..769961b 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -3234,7 +3234,7 @@ for machine in $build $host $target; do
float_format=i32
;;
hppa*-*-openbsd*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tmake_file=pa/t-openbsd
;;
hppa1.1-*-pro*)
@@ -3243,7 +3243,7 @@ for machine in $build $host $target; do
tmake_file=pa/t-pro
;;
hppa1.1-*-osf*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-osf.h"
use_collect2=yes
;;
@@ -3257,7 +3257,7 @@ for machine in $build $host $target; do
use_collect2=yes
;;
hppa1.1-*-bsd*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
use_collect2=yes
;;
hppa1.0-*-bsd*)
@@ -3288,7 +3288,7 @@ for machine in $build $host $target; do
use_collect2=yes
;;
hppa1.1-*-hpux8.0[0-2]*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -3302,7 +3302,7 @@ for machine in $build $host $target; do
use_collect2=yes
;;
hppa1.1-*-hpux8*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -3325,7 +3325,7 @@ for machine in $build $host $target; do
use_collect2=yes
;;
hppa1.1-*-hpux10* | hppa2*-*-hpux10*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h pa/pa-hpux10.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -3364,7 +3364,7 @@ for machine in $build $host $target; do
use_collect2=yes
;;
hppa1.1-*-hpux* | hppa2*-*-hpux*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h pa/pa-hpux9.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -3387,7 +3387,7 @@ for machine in $build $host $target; do
use_collect2=yes
;;
hppa1.1-*-hiux* | hppa2*-*-hiux*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h pa/pa-hiux.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -3410,7 +3410,7 @@ for machine in $build $host $target; do
use_collect2=yes
;;
hppa*-*-lites*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
use_collect2=yes
;;
i370-*-mvs*)
diff --git a/gcc/configure.in b/gcc/configure.in
index e343d27..cfef1c6 100644
--- a/gcc/configure.in
+++ b/gcc/configure.in
@@ -819,7 +819,7 @@ changequote([,])dnl
float_format=i32
;;
hppa*-*-openbsd*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tmake_file=pa/t-openbsd
;;
hppa1.1-*-pro*)
@@ -828,7 +828,7 @@ changequote([,])dnl
tmake_file=pa/t-pro
;;
hppa1.1-*-osf*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-osf.h"
use_collect2=yes
;;
@@ -842,7 +842,7 @@ changequote([,])dnl
use_collect2=yes
;;
hppa1.1-*-bsd*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
use_collect2=yes
;;
hppa1.0-*-bsd*)
@@ -877,7 +877,7 @@ changequote([,])dnl
changequote(,)dnl
hppa1.1-*-hpux8.0[0-2]*)
changequote([,])dnl
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -891,7 +891,7 @@ changequote([,])dnl
use_collect2=yes
;;
hppa1.1-*-hpux8*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -914,7 +914,7 @@ changequote([,])dnl
use_collect2=yes
;;
hppa1.1-*-hpux10* | hppa2*-*-hpux10*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h pa/pa-hpux10.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -953,7 +953,7 @@ changequote([,])dnl
use_collect2=yes
;;
hppa1.1-*-hpux* | hppa2*-*-hpux*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h pa/pa-hpux9.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -976,7 +976,7 @@ changequote([,])dnl
use_collect2=yes
;;
hppa1.1-*-hiux* | hppa2*-*-hiux*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
tm_file="${tm_file} pa/pa-hpux.h pa/pa-hiux.h"
xm_file=pa/xm-pahpux.h
xmake_file=pa/x-pa-hpux
@@ -999,7 +999,7 @@ changequote([,])dnl
use_collect2=yes
;;
hppa*-*-lites*)
- target_cpu_default="MASK_SNAKE"
+ target_cpu_default="MASK_PA_11"
use_collect2=yes
;;
i370-*-mvs*)