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authorPaolo Bonzini <bonzini@gnu.org>2005-08-24 15:46:36 +0000
committerPaolo Bonzini <bonzini@gcc.gnu.org>2005-08-24 15:46:36 +0000
commit130869aa4280e1cfc0088c889dd96a93319b9941 (patch)
treeb54b9d335c1b38f79ec5c01f7504162b98198154 /gcc
parentbb7d32a918b86254669e38aeb10b16cdb2d43f81 (diff)
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rs6000.md: Fix thinko in the peephole2 I added yesterday.
2005-08-24 Paolo Bonzini <bonzini@gnu.org> * config/rs6000/rs6000.md: Fix thinko in the peephole2 I added yesterday. From-SVN: r103443
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/rs6000/rs6000.md20
2 files changed, 17 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 533b33d..b20069c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2005-08-24 Paolo Bonzini <bonzini@gnu.org>
+
+ * config/rs6000/rs6000.md: Fix thinko in the peephole2 I added
+ yesterday.
+
2005-08-24 Zdenek Dvorak <dvorakz@suse.cz>
* bb-reorder.c (copy_bb, duplicate_computed_gotos): Add argument
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index d1f8109..397473c 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -10732,23 +10732,27 @@
;; we can do this with an XOR followed by a compare. But this is profitable
;; only if the large constant is only used for the comparison (and in this
;; case we already have a register to reuse as scratch).
+;;
+;; For 64-bit registers, we could only do so if the constant's bit 15 is clear:
+;; otherwise we'd need to XOR with FFFFFFFF????0000 which is not available.
(define_peephole2
- [(set (match_operand:GPR 0 "register_operand")
- (match_operand:GPR 1 "logical_operand" ""))
- (set (match_dup 0) (match_operator:GPR 3 "boolean_or_operator"
+ [(set (match_operand:SI 0 "register_operand")
+ (match_operand:SI 1 "logical_operand" ""))
+ (set (match_dup 0) (match_operator:SI 3 "boolean_or_operator"
[(match_dup 0)
- (match_operand:GPR 2 "logical_operand" "")]))
+ (match_operand:SI 2 "logical_operand" "")]))
(set (match_operand:CC 4 "cc_reg_operand" "")
- (compare:CC (match_operand:GPR 5 "gpc_reg_operand" "")
+ (compare:CC (match_operand:SI 5 "gpc_reg_operand" "")
(match_dup 0)))
(set (pc)
(if_then_else (match_operator 6 "equality_operator"
[(match_dup 4) (const_int 0)])
(match_operand 7 "" "")
(match_operand 8 "" "")))]
- "peep2_reg_dead_p (3, operands[0])"
- [(set (match_dup 0) (xor:GPR (match_dup 5) (match_dup 9)))
+ "peep2_reg_dead_p (3, operands[0])
+ && peep2_reg_dead_p (4, operands[4])"
+ [(set (match_dup 0) (xor:SI (match_dup 5) (match_dup 9)))
(set (match_dup 4) (compare:CC (match_dup 0) (match_dup 10)))
(set (pc) (if_then_else (match_dup 6) (match_dup 7) (match_dup 8)))]
@@ -10757,7 +10761,7 @@
when sign-extended from 16 to 32 bits. Then see what constant we could
XOR with SEXTC to get the sign-extended value. */
rtx cnst = simplify_const_binary_operation (GET_CODE (operands[3]),
- GET_MODE (operands[3]),
+ SImode,
operands[1], operands[2]);
HOST_WIDE_INT c = INTVAL (cnst);
HOST_WIDE_INT sextc = ((c & 0xffff) ^ 0x8000) - 0x8000;