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| author | David Edelsohn <dje.gcc@gmail.com> | 2020-07-14 15:31:23 -0400 |
|---|---|---|
| committer | David Edelsohn <dje.gcc@gmail.com> | 2020-07-14 15:32:44 -0400 |
| commit | 0c78f438fafdc2f4b2fc3a4d385f814378e3d3f5 (patch) | |
| tree | 5dd194f0ed38cd464fbfe896260941231bc2a081 /gcc | |
| parent | 0257997968fc4b62547cdc2a5cf5e01777bd7ed7 (diff) | |
| download | gcc-0c78f438fafdc2f4b2fc3a4d385f814378e3d3f5.zip gcc-0c78f438fafdc2f4b2fc3a4d385f814378e3d3f5.tar.gz gcc-0c78f438fafdc2f4b2fc3a4d385f814378e3d3f5.tar.bz2 | |
rs6000: Don't call movsi_from_sf in 32 bit mode.
movsi_from_sf uses rldimi instruction, which will cause the compiler to ICE
in 32 bit mode. This patch limits the recently added pattern and call to
TARGET_POWERPC64.
2020-07-14 David Edelsohn <dje.gcc@gmail.com>
gcc/ChangeLog
* config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
condition.
* config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 2 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 378f761..dda51d5 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -6498,7 +6498,7 @@ rs6000_expand_vector_init (rtx target, rtx vals) } else { - if (TARGET_P8_VECTOR) + if (TARGET_P8_VECTOR && TARGET_POWERPC64) { rtx tmp_sf[4]; rtx tmp_si[4]; diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 3a33982..c0d9877 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4251,7 +4251,7 @@ [(match_operand:SF 3 "memory_operand")] UNSPEC_SI_FROM_SF)))) (clobber (match_scratch:V4SF 4))] - "INTVAL (operands[2]) == <bits>" + "TARGET_POWERPC64 && INTVAL (operands[2]) == <bits>" "#" "" [(parallel [(set (match_dup 5) |