target-supports.exp (check_effective_target_mips16_attribute): Reject hard-float modes unless the ABI is o32 or o64.

gcc/testsuite/
	* lib/target-supports.exp (check_effective_target_mips16_attribute):
	Reject hard-float modes unless the ABI is o32 or o64.
	* gcc.target/mips/inter/mips16-inter.exp: Load gcc-dg.exp instead
	of gcc.exp.  Skip the tests when mips16 code generation is not
	supported.
	* gcc.target/mips/mips16-attributes.c: Require mips16_attribute
	and use dg-add-options mips16_attribute.

From-SVN: r128723

4 files changed, 27 insertions, 3 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8e146d2..944cdf8 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2007-09-24  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+	* lib/target-supports.exp (check_effective_target_mips16_attribute):
+	Reject hard-float modes unless the ABI is o32 or o64.
+	* gcc.target/mips/inter/mips16-inter.exp: Load gcc-dg.exp instead
+	of gcc.exp.  Skip the tests when mips16 code generation is not
+	supported.
+	* gcc.target/mips/mips16-attributes.c: Require mips16_attribute
+	and use dg-add-options mips16_attribute.
+
 2007-09-24  Jakub Jelinek  <jakub@redhat.com>
 
 	PR c++/33506
diff --git a/gcc/testsuite/gcc.target/mips/inter/mips16-inter.exp b/gcc/testsuite/gcc.target/mips/inter/mips16-inter.exp
index dc28dad..45e0c5e 100644
--- a/gcc/testsuite/gcc.target/mips/inter/mips16-inter.exp
+++ b/gcc/testsuite/gcc.target/mips/inter/mips16-inter.exp
@@ -6,6 +6,13 @@ if { ![istarget mipsisa*-*-elf*] && ![istarget mips64vr*-*-elf*] } {
     return
 }
 
+load_lib gcc-dg.exp
+
+# Check whether the flags are compatible with MIPS16 code generation.
+if { ![check_effective_target_mips16_attribute] } {
+    return
+}
+
 # Save the old value of CFLAGS_FOR_TARGET, if any.
 global saved_CFLAGS_FOR_TARGET
 if { [info exists CFLAGS_FOR_TARGET] } {
@@ -36,7 +43,6 @@ proc compat-use-tst-compiler { } {
     }
 }
 
-load_lib gcc.exp
 load_lib compat.exp
 
 gcc_init
diff --git a/gcc/testsuite/gcc.target/mips/mips16-attributes.c b/gcc/testsuite/gcc.target/mips/mips16-attributes.c
index dca75e5..96945e1 100644
--- a/gcc/testsuite/gcc.target/mips/mips16-attributes.c
+++ b/gcc/testsuite/gcc.target/mips/mips16-attributes.c
@@ -1,7 +1,8 @@
 /* Verify that mips16 and nomips16 attributes work, checking all combinations
    of calling a nomips16/mips16/default function from a nomips16/mips16/default
    function.  */
-/* { dg-do run { target mipsisa*-*-elf* } } */
+/* { dg-do run { target { mipsisa*-*-elf* && mips16_attribute } } } */
+/* { dg-add-options mips16_attribute } */
 
 #include <stdlib.h>
 
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 07a1dc9..7ec6581 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -648,10 +648,17 @@ proc add_options_for_mips16_attribute { flags } {
 }
 
 # Return true if we can force a mode that allows MIPS16 code generation.
+# We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
+# for o32 and o64.
 
 proc check_effective_target_mips16_attribute { } {
     return [check_no_compiler_messages mips16_attribute assembly {
-	#if __PIC__
+	#ifdef PIC
+	#error FOO
+	#endif
+	#if defined __mips_hard_float \
+	    && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
+	    && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
 	#error FOO
 	#endif
     } [add_options_for_mips16_attribute ""]]