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authorThomas Preud'homme <thomas.preudhomme@arm.com>2016-07-07 08:54:40 +0000
committerThomas Preud'homme <thopre01@gcc.gnu.org>2016-07-07 08:54:40 +0000
commit05a437c1f325a982f1b8ee3ac98e5abe64ab8e0a (patch)
tree76f030ee66c7e434bf0d177b16c85be139412db5 /gcc
parent3d16d9ec3c6023b53ef30b0072541ab136309a27 (diff)
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arm-arches.def (armv8-m.base): Define new architecture.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ * config/arm/arm-arches.def (armv8-m.base): Define new architecture. (armv8-m.main): Likewise. (armv8-m.main+dsp): Likewise. * config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define. (FL_FOR_ARCH8M_MAIN): Likewise. * config/arm/arm-tables.opt: Regenerate. * config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and armv8-m.main+dsp to BE8_LINK_SPEC. * config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M. (enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN. * config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M Baseline and Mainline. (arm_option_override_internal): Also disable arm_restrict_it when !arm_arch_notm. Update comment for -munaligned-access to also cover ARMv8-M Baseline. (arm_file_start): Increase buffer size for printing architecture name. * doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main and armv8-m.main+dsp. (mno-unaligned-access): Clarify that this is disabled by default for ARMv8-M Baseline architectures as well. gcc/testsuite/ * lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and ARMv8-M Mainline architectures. libgcc/ * config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M. From-SVN: r238081
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog23
-rw-r--r--gcc/config/arm/arm-arches.def6
-rw-r--r--gcc/config/arm/arm-protos.h2
-rw-r--r--gcc/config/arm/arm-tables.opt13
-rw-r--r--gcc/config/arm/arm.c14
-rw-r--r--gcc/config/arm/arm.h6
-rw-r--r--gcc/config/arm/bpabi.h6
-rw-r--r--gcc/doc/invoke.texi11
-rw-r--r--gcc/testsuite/ChangeLog6
-rw-r--r--gcc/testsuite/lib/target-supports.exp4
10 files changed, 76 insertions, 15 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7273e76..6e9f523 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,28 @@
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
+ * config/arm/arm-arches.def (armv8-m.base): Define new architecture.
+ (armv8-m.main): Likewise.
+ (armv8-m.main+dsp): Likewise.
+ * config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
+ (FL_FOR_ARCH8M_MAIN): Likewise.
+ * config/arm/arm-tables.opt: Regenerate.
+ * config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
+ armv8-m.main+dsp to BE8_LINK_SPEC.
+ * config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
+ (enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
+ * config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
+ Baseline and Mainline.
+ (arm_option_override_internal): Also disable arm_restrict_it when
+ !arm_arch_notm. Update comment for -munaligned-access to also cover
+ ARMv8-M Baseline.
+ (arm_file_start): Increase buffer size for printing architecture name.
+ * doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
+ and armv8-m.main+dsp.
+ (mno-unaligned-access): Clarify that this is disabled by default for
+ ARMv8-M Baseline architectures as well.
+
+2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
diff --git a/gcc/config/arm/arm-arches.def b/gcc/config/arm/arm-arches.def
index fd02b18..be46521 100644
--- a/gcc/config/arm/arm-arches.def
+++ b/gcc/config/arm/arm-arches.def
@@ -62,6 +62,12 @@ ARM_ARCH("armv8.1-a", cortexa53, 8A,
ARM_ARCH("armv8.1-a+crc",cortexa53, 8A,
ARM_FSET_MAKE (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A,
FL2_FOR_ARCH8_1A))
+ARM_ARCH("armv8-m.base", cortexm0, 8M_BASE,
+ ARM_FSET_MAKE_CPU1 ( FL_FOR_ARCH8M_BASE))
+ARM_ARCH("armv8-m.main", cortexm7, 8M_MAIN,
+ ARM_FSET_MAKE_CPU1(FL_CO_PROC | FL_FOR_ARCH8M_MAIN))
+ARM_ARCH("armv8-m.main+dsp", cortexm7, 8M_MAIN,
+ ARM_FSET_MAKE_CPU1(FL_CO_PROC | FL_ARCH7EM | FL_FOR_ARCH8M_MAIN))
ARM_ARCH("iwmmxt", iwmmxt, 5TE, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT))
ARM_ARCH("iwmmxt2", iwmmxt2, 5TE, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2))
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 1943907..2419ca0 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -421,6 +421,8 @@ extern bool arm_is_constant_pool_ref (rtx);
#define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM)
#define FL_FOR_ARCH8A (FL_FOR_ARCH7VE | FL_ARCH8)
#define FL2_FOR_ARCH8_1A FL2_ARCH8_1
+#define FL_FOR_ARCH8M_BASE (FL_FOR_ARCH6M | FL_ARCH8 | FL_THUMB_DIV)
+#define FL_FOR_ARCH8M_MAIN (FL_FOR_ARCH7M | FL_ARCH8)
/* There are too many feature bits to fit in a single word so the set of cpu and
fpu capabilities is a structure. A feature set is created and manipulated
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index a5fe2c3..b92cb17 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -437,10 +437,19 @@ EnumValue
Enum(arm_arch) String(armv8.1-a+crc) Value(28)
EnumValue
-Enum(arm_arch) String(iwmmxt) Value(29)
+Enum(arm_arch) String(armv8-m.base) Value(29)
EnumValue
-Enum(arm_arch) String(iwmmxt2) Value(30)
+Enum(arm_arch) String(armv8-m.main) Value(30)
+
+EnumValue
+Enum(arm_arch) String(armv8-m.main+dsp) Value(31)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt) Value(32)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt2) Value(33)
Enum
Name(arm_fpu) Type(int)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 580662d..3a9b9cb 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2307,9 +2307,11 @@ static const struct processors *arm_selected_arch;
static const struct processors *arm_selected_cpu;
static const struct processors *arm_selected_tune;
-/* The name of the preprocessor macro to define for this architecture. */
+/* The name of the preprocessor macro to define for this architecture. PROFILE
+ is replaced by the architecture name (eg. 8A) in arm_option_override () and
+ is thus chosen to be big enough to hold the longest architecture name. */
-char arm_arch_name[] = "__ARM_ARCH_0UNK__";
+char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
/* Available values for -mfpu=. */
@@ -2950,7 +2952,8 @@ arm_option_override_internal (struct gcc_options *opts,
if (! opts_set->x_arm_restrict_it)
opts->x_arm_restrict_it = arm_arch8;
- if (!TARGET_THUMB2_P (opts->x_target_flags))
+ /* ARM execution state and M profile don't have [restrict] IT. */
+ if (!TARGET_THUMB2_P (opts->x_target_flags) || !arm_arch_notm)
opts->x_arm_restrict_it = 0;
/* Enable -munaligned-access by default for
@@ -2961,7 +2964,8 @@ arm_option_override_internal (struct gcc_options *opts,
Disable -munaligned-access by default for
- all pre-ARMv6 architecture-based processors
- - ARMv6-M architecture-based processors. */
+ - ARMv6-M architecture-based processors
+ - ARMv8-M Baseline processors. */
if (! opts_set->x_unaligned_access)
{
@@ -26005,7 +26009,7 @@ arm_file_start (void)
const char* pos = strchr (arm_selected_arch->name, '+');
if (pos)
{
- char buf[15];
+ char buf[32];
gcc_assert (strlen (arm_selected_arch->name)
<= sizeof (buf) / sizeof (*pos));
strncpy (buf, arm_selected_arch->name,
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index f0cdd66..0735362 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -261,7 +261,7 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
|| arm_arch7) && arm_arch_notm)
/* Nonzero if this chip supports load-acquire and store-release. */
-#define TARGET_HAVE_LDACQ (TARGET_ARM_ARCH >= 8)
+#define TARGET_HAVE_LDACQ (TARGET_ARM_ARCH >= 8 && arm_arch_notm)
/* Nonzero if integer division instructions supported. */
#define TARGET_IDIV ((TARGET_ARM && arm_arch_arm_hwdiv) \
@@ -398,7 +398,9 @@ enum base_architecture
BASE_ARCH_7R = 7,
BASE_ARCH_7M = 7,
BASE_ARCH_7EM = 7,
- BASE_ARCH_8A = 8
+ BASE_ARCH_8A = 8,
+ BASE_ARCH_8M_BASE = 8,
+ BASE_ARCH_8M_MAIN = 8
};
/* The major revision number of the ARM Architecture implemented by the target. */
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index d6d394a..ff21660 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -93,6 +93,9 @@
|march=armv8-a+crc \
|march=armv8.1-a \
|march=armv8.1-a+crc \
+ |march=armv8-m.base \
+ |march=armv8-m.main \
+ |march=armv8-m.main+dsp \
:%{!r:--be8}}}"
#else
#define BE8_LINK_SPEC \
@@ -127,6 +130,9 @@
|march=armv8-a+crc \
|march=armv8.1-a \
|march=armv8.1-a+crc \
+ |march=armv8-m.base \
+ |march=armv8-m.main \
+ |march=armv8-m.main+dsp \
:%{!r:--be8}}}"
#endif
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ba44951..b6398ff 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -14148,7 +14148,8 @@ of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk},
@samp{armv7}, @samp{armv7-a}, @samp{armv7-m}, @samp{armv7-r}, @samp{armv7e-m},
@samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc}, @samp{armv8.1-a},
-@samp{armv8.1-a+crc}, @samp{iwmmxt}, @samp{iwmmxt2}.
+@samp{armv8.1-a+crc}, @samp{armv8-m.base}, @samp{armv8-m.main},
+@samp{armv8-m.main+dsp}, @samp{iwmmxt}, @samp{iwmmxt2}.
Architecture revisions older than @samp{armv4t} are deprecated.
@@ -14460,10 +14461,10 @@ generating these instructions. This option is enabled by default when
@opindex mno-unaligned-access
Enables (or disables) reading and writing of 16- and 32- bit values
from addresses that are not 16- or 32- bit aligned. By default
-unaligned access is disabled for all pre-ARMv6 and all ARMv6-M
-architectures, and enabled for all other architectures. If unaligned
-access is not enabled then words in packed data structures are
-accessed a byte at a time.
+unaligned access is disabled for all pre-ARMv6, all ARMv6-M and for
+ARMv8-M Baseline architectures, and enabled for all other
+architectures. If unaligned access is not enabled then words in packed
+data structures are accessed a byte at a time.
The ARM attribute @code{Tag_CPU_unaligned_access} is set in the
generated object file to either true or false, depending upon the
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index fa84382..16eebb6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,11 @@
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
+ * lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
+ check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
+ ARMv8-M Mainline architectures.
+
+2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 0e294c5..b26f8a2 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3348,7 +3348,9 @@ foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
v8a "-march=armv8-a" __ARM_ARCH_8A__
- v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
+ v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
+ v8m_base "-march=armv8-m.base -mthumb" __ARM_ARCH_8M_BASE__
+ v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
proc check_effective_target_arm_arch_FUNC_ok { } {
if { [ string match "*-marm*" "FLAG" ] &&