Daily bump.

5 files changed, 303 insertions, 1 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e95ec61..fbe0f17 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,168 @@
+2020-08-19  2020-08-19  Carl Love  <cel@us.ibm.com>
+
+	* config/rs6000/rs6000-builtin.def (BU_P10V_0, BU_P10V_1,
+	BU_P10V_2, BU_P10V_3): Rename BU_P10V_VSX_0, BU_P10V_VSX_1,
+	BU_P10V_VSX_2, BU_P10V_VSX_3 respectively.
+	(BU_P10V_4): Remove.
+	(BU_P10V_AV_0, BU_P10V_AV_1, BU_P10V_AV_2, BU_P10V_AV_3, BU_P10V_AV_4):
+	New definitions for Power 10 Altivec macros.
+	(VSTRIBR, VSTRIHR, VSTRIBL, VSTRIHL, VSTRIBR_P, VSTRIHR_P,
+	VSTRIBL_P, VSTRIHL_P, MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM,
+	VEXPANDMB, VEXPANDMH, VEXPANDMW, VEXPANDMD, VEXPANDMQ, VEXTRACTMB,
+	VEXTRACTMH, VEXTRACTMW, VEXTRACTMD, VEXTRACTMQ): Replace macro
+	expansion BU_P10V_1 with BU_P10V_AV_1.
+	(VCLRLB, VCLRRB, VCFUGED, VCLZDM, VCTZDM, VPDEPD, VPEXTD, VGNB,
+	VCNTMBB, VCNTMBH, VCNTMBW, VCNTMBD): Replace macro expansion
+	BU_P10V_2 with	BU_P10V_AV_2.
+	(VEXTRACTBL, VEXTRACTHL, VEXTRACTWL, VEXTRACTDL, VEXTRACTBR, VEXTRACTHR,
+	VEXTRACTWR, VEXTRACTDR, VINSERTGPRBL, VINSERTGPRHL, VINSERTGPRWL,
+	VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, VINSERTGPRBR,
+	VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, VINSERTVPRHR,
+	VINSERTVPRWR, VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4SI, VREPLACE_ELT_V2DF,
+	VREPLACE_ELT_V4SF, VREPLACE_ELT_V2DI, VREPLACE_ELT_UV2DI, VREPLACE_UN_V4SI,
+	VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
+	VREPLACE_UN_V2DF, VSLDB_V16QI, VSLDB_V8HI, VSLDB_V4SI, VSLDB_V2DI,
+	VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, VSRDB_V2DI): Replace macro expansion
+	BU_P10V_3 with BU_P10V_AV_3.
+	(VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, VXXSPLTID): Replace macro expansion
+	BU_P10V_1 with BU_P10V_AV_1.
+	(XXGENPCVM_V16QI, XXGENPCVM_V8HI, XXGENPCVM_V4SI, XXGENPCVM_V2DI):
+	Replace macro expansion BU_P10V_2 with BU_P10V_VSX_2.
+	(VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF, VXXBLEND_V16QI, VXXBLEND_V8HI,
+	VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): Replace macor
+	expansion BU_P10V_3 with BU_P10V_VSX_3.
+	(XXEVAL, VXXPERMX): Replace macro expansion BU_P10V_4 with BU_P10V_VSX_4.
+	(XVCVBF16SP, XVCVSPBF16): Replace macro expansion BU_VSX_1 with
+	BU_P10V_VSX_1. Also change MISC to CONST.
+	* config/rs6000/rs6000-c.c: (P10_BUILTIN_VXXPERMX): Replace with
+	P10V_BUILTIN_VXXPERMX.
+	(P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRRB,
+	P10_BUILTIN_VGNB, P10_BUILTIN_XXEVAL, P10_BUILTIN_VXXPERMX,
+	P10_BUILTIN_VEXTRACTBL, P10_BUILTIN_VEXTRACTHL, P10_BUILTIN_VEXTRACTWL,
+	P10_BUILTIN_VEXTRACTDL, P10_BUILTIN_VINSERTGPRHL,
+	P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
+	P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
+	P10_BUILTIN_VEXTRACTBR, P10_BUILTIN_VEXTRACTHR,
+	P10_BUILTIN_VEXTRACTWR, P10_BUILTIN_VEXTRACTDR,
+	P10_BUILTIN_VINSERTGPRBR, P10_BUILTIN_VINSERTGPRHR,
+	P10_BUILTIN_VINSERTGPRWR, P10_BUILTIN_VINSERTGPRDR,
+	P10_BUILTIN_VINSERTVPRBR, P10_BUILTIN_VINSERTVPRHR,
+	P10_BUILTIN_VINSERTVPRWR, P10_BUILTIN_VREPLACE_ELT_UV4SI,
+	P10_BUILTIN_VREPLACE_ELT_V4SI, P10_BUILTIN_VREPLACE_ELT_UV2DI,
+	P10_BUILTIN_VREPLACE_ELT_V2DI, P10_BUILTIN_VREPLACE_ELT_V2DF,
+	P10_BUILTIN_VREPLACE_UN_UV4SI, P10_BUILTIN_VREPLACE_UN_V4SI,
+	P10_BUILTIN_VREPLACE_UN_V4SF, P10_BUILTIN_VREPLACE_UN_UV2DI,
+	P10_BUILTIN_VREPLACE_UN_V2DI, P10_BUILTIN_VREPLACE_UN_V2DF,
+	P10_BUILTIN_VSLDB_V16QI, P10_BUILTIN_VSLDB_V16QI,
+	P10_BUILTIN_VSLDB_V8HI, P10_BUILTIN_VSLDB_V4SI,
+	P10_BUILTIN_VSLDB_V2DI, P10_BUILTIN_VXXSPLTIW_V4SI,
+	P10_BUILTIN_VXXSPLTIW_V4SF, P10_BUILTIN_VXXSPLTID,
+	P10_BUILTIN_VXXSPLTI32DX_V4SI, P10_BUILTIN_VXXSPLTI32DX_V4SF,
+	P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
+	P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI,
+	P10_BUILTIN_VXXBLEND_V4SF, P10_BUILTIN_VXXBLEND_V2DF,
+	P10_BUILTIN_VSRDB_V16QI, P10_BUILTIN_VSRDB_V8HI,
+	P10_BUILTIN_VSRDB_V4SI, P10_BUILTIN_VSRDB_V2DI,
+	P10_BUILTIN_VSTRIBL, P10_BUILTIN_VSTRIHL,
+	P10_BUILTIN_VSTRIBL_P, P10_BUILTIN_VSTRIHL_P,
+	P10_BUILTIN_VSTRIBR, P10_BUILTIN_VSTRIHR,
+	P10_BUILTIN_VSTRIBR_P, P10_BUILTIN_VSTRIHR_P,
+	P10_BUILTIN_MTVSRBM, P10_BUILTIN_MTVSRHM,
+	P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
+	P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB,
+	P10_BUILTIN_VCNTMBH, P10_BUILTIN_VCNTMBW,
+	P10_BUILTIN_VCNTMBD, P10_BUILTIN_VEXPANDMB,
+	P10_BUILTIN_VEXPANDMH, P10_BUILTIN_VEXPANDMW,
+	P10_BUILTIN_VEXPANDMD, P10_BUILTIN_VEXPANDMQ,
+	P10_BUILTIN_VEXTRACTMB, P10_BUILTIN_VEXTRACTMH,
+	P10_BUILTIN_VEXTRACTMW, P10_BUILTIN_VEXTRACTMD,
+	P10_BUILTIN_VEXTRACTMQ, P10_BUILTIN_XVTLSBB_ZEROS,
+	P10_BUILTIN_XVTLSBB_ONES): Replace with
+	P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRRB,
+	P10V_BUILTIN_VGNB, P10V_BUILTIN_XXEVAL, P10V_BUILTIN_VXXPERMX,
+	P10V_BUILTIN_VEXTRACTBL, P10V_BUILTIN_VEXTRACTHL, P10V_BUILTIN_VEXTRACTWL,
+	P10V_BUILTIN_VEXTRACTDL, P10V_BUILTIN_VINSERTGPRHL,
+	P10V_BUILTIN_VINSERTGPRWL, P10V_BUILTIN_VINSERTGPRDL,
+	P10V_BUILTIN_VINSERTVPRBL,P10V_BUILTIN_VINSERTVPRHL,
+	P10V_BUILTIN_VEXTRACTBR, P10V_BUILTIN_VEXTRACTHR
+	P10V_BUILTIN_VEXTRACTWR, P10V_BUILTIN_VEXTRACTDR,
+	P10V_BUILTIN_VINSERTGPRBR, P10V_BUILTIN_VINSERTGPRHR,
+	P10V_BUILTIN_VINSERTGPRWR, P10V_BUILTIN_VINSERTGPRDR,
+	P10V_BUILTIN_VINSERTVPRBR, P10V_BUILTIN_VINSERTVPRHR,
+	P10V_BUILTIN_VINSERTVPRWR, P10V_BUILTIN_VREPLACE_ELT_UV4SI,
+	P10V_BUILTIN_VREPLACE_ELT_V4SI, P10V_BUILTIN_VREPLACE_ELT_UV2DI,
+	P10V_BUILTIN_VREPLACE_ELT_V2DI, P10V_BUILTIN_VREPLACE_ELT_V2DF,
+	P10V_BUILTIN_VREPLACE_UN_UV4SI, P10V_BUILTIN_VREPLACE_UN_V4SI,
+	P10V_BUILTIN_VREPLACE_UN_V4SF, P10V_BUILTIN_VREPLACE_UN_UV2DI,
+	P10V_BUILTIN_VREPLACE_UN_V2DI, P10V_BUILTIN_VREPLACE_UN_V2DF,
+	P10V_BUILTIN_VSLDB_V16QI, P10V_BUILTIN_VSLDB_V16QI,
+	P10V_BUILTIN_VSLDB_V8HI, P10V_BUILTIN_VSLDB_V4SI,
+	P10V_BUILTIN_VSLDB_V2DI, P10V_BUILTIN_VXXSPLTIW_V4SI,
+	P10V_BUILTIN_VXXSPLTIW_V4SF, P10V_BUILTIN_VXXSPLTID,
+	P10V_BUILTIN_VXXSPLTI32DX_V4SI, P10V_BUILTIN_VXXSPLTI32DX_V4SF,
+	P10V_BUILTIN_VXXBLEND_V16QI, P10V_BUILTIN_VXXBLEND_V8HI,
+	P10V_BUILTIN_VXXBLEND_V4SI, P10V_BUILTIN_VXXBLEND_V2DI,
+	P10V_BUILTIN_VXXBLEND_V4SF, P10V_BUILTIN_VXXBLEND_V2DF,
+	P10V_BUILTIN_VSRDB_V16QI, P10V_BUILTIN_VSRDB_V8HI,
+	P10V_BUILTIN_VSRDB_V4SI, P10V_BUILTIN_VSRDB_V2DI,
+	P10V_BUILTIN_VSTRIBL, P10V_BUILTIN_VSTRIHL,
+	P10V_BUILTIN_VSTRIBL_P, P10V_BUILTIN_VSTRIHL_P,
+	P10V_BUILTIN_VSTRIBR, P10V_BUILTIN_VSTRIHR,
+	P10V_BUILTIN_VSTRIBR_P, P10V_BUILTIN_VSTRIHR_P,
+	P10V_BUILTIN_MTVSRBM, P10V_BUILTIN_MTVSRHM,
+	P10V_BUILTIN_MTVSRWM, P10V_BUILTIN_MTVSRDM,
+	P10V_BUILTIN_MTVSRQM, P10V_BUILTIN_VCNTMBB,
+	P10V_BUILTIN_VCNTMBH, P10V_BUILTIN_VCNTMBW,
+	P10V_BUILTIN_VCNTMBD, P10V_BUILTIN_VEXPANDMB,
+	P10V_BUILTIN_VEXPANDMH, P10V_BUILTIN_VEXPANDMW,
+	P10V_BUILTIN_VEXPANDMD, P10V_BUILTIN_VEXPANDMQ,
+	P10V_BUILTIN_VEXTRACTMB, P10V_BUILTIN_VEXTRACTMH,
+	P10V_BUILTIN_VEXTRACTMW, P10V_BUILTIN_VEXTRACTMD,
+	P10V_BUILTIN_VEXTRACTMQ, P10V_BUILTIN_XVTLSBB_ZEROS,
+	P10V_BUILTIN_XVTLSBB_ONES respectively.
+	* config/rs6000/rs6000-call.c: Ditto above, change P10_BUILTIN_name to
+	P10V_BUILTIN_name.
+	(P10_BUILTIN_XVCVSPBF16, P10_BUILTIN_XVCVBF16SP): Change to
+	P10V_BUILTIN_XVCVSPBF16, P10V_BUILTIN_XVCVBF16SP respectively.
+
+2020-08-19  Bill Schmidt  <wschmidt@linux.ibm.com>
+
+	* config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
+	Sibcalls are always legal when the caller doesn't preserve r2.
+
+2020-08-19  Uroš Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386-expand.c (ix86_expand_builtin)
+	[case IX86_BUILTIN_ENQCMD, case IX86_BUILTIN_ENQCMDS]:
+	Rewrite expansion to use code_for_enqcmd.
+	[case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]:
+	Rewrite expansion to use code_for_wrss.
+	[case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
+	Rewrite expansion to use code_for_wrss.
+
+2020-08-19  Feng Xue  <fxue@os.amperecomputing.com>
+
+	PR tree-optimization/94234
+	* match.pd ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New
+	simplification.
+
+2020-08-19  H.J. Lu  <hjl.tools@gmail.com>
+
+	* common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket
+	Lake and Alder Lake.
+
+2020-08-19  Peixin Qiao  <qiaopeixin@huawei.com>
+
+	* config/aarch64/aarch64.c (aarch64_init_cumulative_args): Remove
+	"fndecl && TREE_PUBLIC (fndecl)" check since it prevents the funtion
+	type check when calling via a function pointer or when calling a static
+	function.
+
+2020-08-19  Kewen Lin  <linkw@linux.ibm.com>
+
+	* opts-global.c (decode_options): Call target_option_override_hook
+	before it prints for --help=*.
+
 2020-08-18  Peter Bergner  <bergner@linux.ibm.com>
 
 	* config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index a8098fb..7829179 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20200819
+20200820
diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog
index 557b026..cfb6a6e 100644
--- a/gcc/analyzer/ChangeLog
+++ b/gcc/analyzer/ChangeLog
@@ -1,3 +1,52 @@
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96643
+	* region-model.cc (region_model::deref_rvalue): Rather than
+	attempting to handle all svalue kinds in the switch, only cover
+	the special cases, and move symbolic-region handling to after
+	the switch, thus implicitly handling the missing case SK_COMPOUND.
+
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96705
+	* region-model-manager.cc
+	(region_model_manager::maybe_fold_binop): Check that we have an
+	integral type before calling build_int_cst.
+
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96699
+	* region-model-manager.cc
+	(region_model_manager::get_or_create_cast): Use FIX_TRUNC_EXPR for
+	casting from REAL_TYPE to INTEGER_TYPE.
+
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96651
+	* region-model.cc (region_model::called_from_main_p): New.
+	(region_model::get_store_value): Move handling for globals into...
+	(region_model::get_initial_value_for_global): ...this new
+	function, and add logic for extracting values from decl
+	initializers.
+	* region-model.h (decl_region::get_svalue_for_constructor): New
+	decl.
+	(decl_region::get_svalue_for_initializer): New decl.
+	(region_model::called_from_main_p): New decl.
+	(region_model::get_initial_value_for_global): New.
+	* region.cc (decl_region::maybe_get_constant_value): Move logic
+	for getting an svalue from a CONSTRUCTOR node to...
+	(decl_region::get_svalue_for_constructor): ...this new function.
+	(decl_region::get_svalue_for_initializer): New.
+	* store.cc (get_svalue_for_ctor_val): Rewrite in terms of
+	region_model::get_rvalue.
+	* store.h (binding_cluster::get_map): New accessor.
+
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96648
+	* region.cc (get_field_at_bit_offset): Gracefully handle negative
+	values for bit_offset.
+
 2020-08-18  David Malcolm  <dmalcolm@redhat.com>
 
 	* region-model.cc (region_model::get_rvalue_1): Fix name of local.
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 217c040..459a98e 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,15 @@
+2020-08-19  Jason Merrill  <jason@redhat.com>
+
+	DR 2369
+	* cp-tree.h (push_tinst_level, push_tinst_level_loc): Declare.
+	* constraint.cc (satisfy_declaration_constraints):
+	Use add_outermost_template_args and push_tinst_level.
+	* pt.c (add_outermost_template_args): Handle getting
+	a TEMPLATE_DECL as the first argument.
+	(push_tinst_level, push_tinst_level_loc): No longer static.
+	(fn_type_unification): Check satisfaction before non-dependent
+	conversions.
+
 2020-08-18  Nathan Sidwell  <nathan@acm.org>
 
 	* cp-tree.h (SET_TYPE_TEMPLTE_INFO): Do not deal with ALIAS templates.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a390182..ed39ca9 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,79 @@
+2020-08-19  Jason Merrill  <jason@redhat.com>
+
+	DR 2369
+	* g++.dg/concepts/diagnostic10.C: Adjust expexcted errors.
+	* g++.dg/concepts/diagnostic13.C: Adjust expexcted errors.
+	* g++.dg/concepts/diagnostic2.C: Adjust expexcted errors.
+	* g++.dg/concepts/diagnostic3.C: Adjust expexcted errors.
+	* g++.dg/concepts/diagnostic4.C: Adjust expexcted errors.
+	* g++.dg/concepts/diagnostic5.C: Adjust expexcted errors.
+	* g++.dg/concepts/diagnostic9.C: Adjust expexcted errors.
+	* g++.dg/concepts/expression2.C: Adjust expexcted errors.
+	* g++.dg/concepts/fn5.C: Adjust expexcted errors.
+	* g++.dg/concepts/placeholder5.C: Adjust expexcted errors.
+	* g++.dg/concepts/pr67595.C: Adjust expexcted errors.
+	* g++.dg/cpp2a/concepts-pr78752-2.C: Adjust expexcted errors.
+	* g++.dg/cpp2a/concepts-pr84140.C: Adjust expexcted errors.
+	* g++.dg/cpp2a/concepts-recursive-sat3.C: Adjust expexcted errors.
+	* g++.dg/cpp2a/concepts-requires18.C: Adjust expexcted errors.
+	* g++.dg/cpp2a/concepts-requires19.C: Adjust expexcted errors.
+	* g++.dg/cpp2a/concepts3.C: Adjust expexcted errors.
+	* g++.dg/cpp2a/concepts-nondep1.C: New test.
+	* g++.dg/cpp2a/concepts-nondep1a.C: New test.
+
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96643
+	* g++.dg/analyzer/pr96643.C: New test.
+
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96705
+	* gcc.dg/analyzer/pr96705.c: New test.
+
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96699
+	* gcc.dg/analyzer/pr96699.c: New test.
+
+2020-08-19  Bill Schmidt  <wschmidt@linux.ibm.com>
+
+	* gcc.target/powerpc/pcrel-sibcall-1.c: Adjust.
+
+2020-08-19  Feng Xue  <fxue@os.amperecomputing.com>
+
+	PR tree-optimization/94234
+	* gcc.dg/pr94234-1.c: New test.
+
+2020-08-19  Peixin Qiao  <qiaopeixin@huawei.com>
+
+	* gcc.target/aarch64/mgeneral-regs_7.c: New test.
+
+2020-08-19  Pat Bernardi  <bernardi@adacore.com>
+
+	* gcc.dg/sinatan-2.c: Add dg-require-effective-target c99_runtime.
+	* gcc.dg/sinhovercosh-1.c: Likewise.
+	* gcc.dg/tanhbysinh.c: Likewise.
+
+2020-08-19  Tom de Vries  <tdevries@suse.de>
+
+	PR target/96494
+	* lib/target-supports.exp (check_effective_target_sync_int_long):
+	Return 1 for nvptx.
+	(check_effective_target_sync_int_long_stack): New proc.
+	* gcc.dg/pr86314.c: Require effective target sync_int_long_stack.
+
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96651
+	* gcc.dg/analyzer/pr96651-1.c: New test.
+	* gcc.dg/analyzer/pr96651-2.c: New test.
+
+2020-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/96648
+	* gcc.dg/analyzer/pr96648.c: New test.
+
 2020-08-18  Peter Bergner  <bergner@linux.ibm.com>
 
 	* gcc.target/powerpc/mma-builtin-3.c: Rename xvcvbf16sp to xvcvbf16spn.