diff options
| author | Jakub Jelinek <jakub@redhat.com> | 2021-06-15 11:36:47 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2021-06-15 11:36:47 +0200 |
| commit | 008153c8435ca3bf587e11654c31f05c0f99b43a (patch) | |
| tree | 8f593a3242e9e03901cd75e7deec30f3a12754b1 /gcc | |
| parent | dfef1164b1c8d0b7abdf302f94d4be99a75ca791 (diff) | |
| download | gcc-008153c8435ca3bf587e11654c31f05c0f99b43a.zip gcc-008153c8435ca3bf587e11654c31f05c0f99b43a.tar.gz gcc-008153c8435ca3bf587e11654c31f05c0f99b43a.tar.bz2 | |
expr: Fix up VEC_PACK_TRUNC_EXPR expansion [PR101046]
The following testcase ICEs, because we have a mode mismatch.
VEC_PACK_TRUNC_EXPR's operands have different modes from the result
(same vector mode size but twice as large element),
but we were passing non-NULL subtarget with the mode of the result
to the expansion of its arguments, so the VEC_PERM_EXPR in one of the
operands which had V8SImode operands and result had V16HImode target.
Fixed by clearing the subtarget if we are changing mode.
2021-06-15 Jakub Jelinek <jakub@redhat.com>
PR target/101046
* expr.c (expand_expr_real_2) <case VEC_PACK_FIX_TRUNC_EXPR,
case VEC_PACK_TRUNC_EXPR>: Clear subtarget when changing mode.
* gcc.target/i386/pr101046.c: New test.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/expr.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr101046.c | 15 |
2 files changed, 17 insertions, 0 deletions
@@ -9998,6 +9998,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, case VEC_PACK_SAT_EXPR: case VEC_PACK_FIX_TRUNC_EXPR: mode = TYPE_MODE (TREE_TYPE (treeop0)); + subtarget = NULL_RTX; goto binop; case VEC_PACK_TRUNC_EXPR: @@ -10021,6 +10022,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, return eops[0].value; } mode = TYPE_MODE (TREE_TYPE (treeop0)); + subtarget = NULL_RTX; goto binop; case VEC_PACK_FLOAT_EXPR: diff --git a/gcc/testsuite/gcc.target/i386/pr101046.c b/gcc/testsuite/gcc.target/i386/pr101046.c new file mode 100644 index 0000000..6ce4695 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr101046.c @@ -0,0 +1,15 @@ +/* PR target/101046 */ +/* { dg-do compile } */ +/* { dg-options "-ftree-ter -mavx512bw -mavx512vl" } */ + +typedef unsigned short __attribute__((__vector_size__(16))) U; +typedef unsigned int __attribute__((__vector_size__(16))) V; +typedef unsigned int __attribute__((__vector_size__(32))) W; + +U +foo (void) +{ + return __builtin_convertvector (__builtin_shufflevector ((V){}, (W){}, + 0, 0, 1, 0, + 5, 5, 0, 2), U); +} |