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authorliuhongt <hongtao.liu@intel.com>2022-02-23 14:32:29 +0800
committerliuhongt <hongtao.liu@intel.com>2022-02-24 09:05:10 +0800
commitffb2c67170768d5aa2d84a143405da658930e9b0 (patch)
treeac97b35b7c351a4bd513ac1e7a196ddee20d0e57 /gcc
parent4bf3bac15145c71d01152a06052f3b4603b26163 (diff)
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Fix typo in <code>v1ti3.
For evex encoding vp{xor,or,and}, suffix is needed. Or there would be an error for vpxor %xmm0, %xmm31, %xmm1 Error: unsupported instruction `vpxor' gcc/ChangeLog: * config/i386/sse.md (<code>v1ti3): Add suffix and replace isa attr of alternative 2 from avx to avx512vl. gcc/testsuite/ChangeLog: * gcc.target/i386/avx512vl-logicsuffix-1.c: New test.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/i386/sse.md4
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512vl-logicsuffix-1.c14
2 files changed, 16 insertions, 2 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index b2f5634..3066ea3 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -17025,8 +17025,8 @@
"@
p<logic>\t{%2, %0|%0, %2}
vp<logic>\t{%2, %1, %0|%0, %1, %2}
- vp<logic>\t{%2, %1, %0|%0, %1, %2}"
- [(set_attr "isa" "noavx,avx,avx")
+ vp<logic>d\t{%2, %1, %0|%0, %1, %2}"
+ [(set_attr "isa" "noavx,avx,avx512vl")
(set_attr "prefix" "orig,vex,evex")
(set_attr "prefix_data16" "1,*,*")
(set_attr "type" "sselog")
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-logicsuffix-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-logicsuffix-1.c
new file mode 100644
index 0000000..4ec5b2a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-logicsuffix-1.c
@@ -0,0 +1,14 @@
+/* { dg-do assemble { target { int128 && avx512vl } } } */
+/* { dg-options "-O2 -mavx512vl" } */
+
+typedef __int128 V __attribute__((vector_size (16)));
+
+void
+foo (V *x, V *y, V *z)
+{
+ register V a __asm ("xmm31") = *z;
+ __asm ("" : "+v" (a));
+ x[0] = y[0] & a;
+ x[1] = y[1] | a;
+ x[2] = y[2] ^ a;
+}