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| author | Michael Collison <michael.collison@linaro.org> | 2015-08-02 05:15:55 +0000 |
|---|---|---|
| committer | Michael Collison <collison@gcc.gnu.org> | 2015-08-02 05:15:55 +0000 |
| commit | fea8f6c692a091dd9e7639949e45ca7445fb53a0 (patch) | |
| tree | 3acdd7e5d415a5d8a20bed0467cee4ac44f572aa /gcc | |
| parent | b0cca5ecbb2841811a6c6aeaa40a3040289aeba3 (diff) | |
| download | gcc-fea8f6c692a091dd9e7639949e45ca7445fb53a0.zip gcc-fea8f6c692a091dd9e7639949e45ca7445fb53a0.tar.gz gcc-fea8f6c692a091dd9e7639949e45ca7445fb53a0.tar.bz2 | |
arm.md (*arm_smin_cmp): New pattern.
2015-08-01 Michael Collison <michael.collison@linaro.org
Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* gcc/config/arm/arm.md (*arm_smin_cmp): New pattern.
(*arm_umin_cmp): Likewise.
* gcc.target/arm/mincmp.c: New test.
From-SVN: r226476
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 38 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/mincmp.c | 20 |
4 files changed, 69 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ea9dbe1..c565bfc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-08-01 Michael Collison <michael.collison@linaro.org + Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> + + * gcc/config/arm/arm.md (*arm_smin_cmp): New pattern. + (*arm_umin_cmp): Likewise. + 2015-08-01 Caroline Tice <cmtice@google.com> PR 66521 diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 128f4ac..817860d 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3455,6 +3455,44 @@ (set_attr "type" "multiple,multiple")] ) +;; t = (s/u)min (x, y) +;; cc = cmp (t, z) +;; is the same as +;; cmp x, z +;; cmpge(u) y, z + +(define_insn_and_split "*arm_smin_cmp" + [(set (reg:CC CC_REGNUM) + (compare:CC + (smin:SI (match_operand:SI 0 "s_register_operand" "r") + (match_operand:SI 1 "s_register_operand" "r")) + (match_operand:SI 2 "s_register_operand" "r")))] + "TARGET_32BIT" + "#" + "&& reload_completed" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 0) (match_dup 2))) + (cond_exec (ge:CC (reg:CC CC_REGNUM) (const_int 0)) + (set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))))] +) + +(define_insn_and_split "*arm_umin_cmp" + [(set (reg:CC CC_REGNUM) + (compare:CC + (umin:SI (match_operand:SI 0 "s_register_operand" "r") + (match_operand:SI 1 "s_register_operand" "r")) + (match_operand:SI 2 "s_register_operand" "r")))] + "TARGET_32BIT" + "#" + "&& reload_completed" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 0) (match_dup 2))) + (cond_exec (geu:CC (reg:CC CC_REGNUM) (const_int 0)) + (set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))))] +) + (define_expand "umaxsi3" [(parallel [ (set (match_operand:SI 0 "s_register_operand" "") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2bbe2a2..c018c14 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-08-01 Michael Collison <michael.collison@linaro.org + Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> + + * gcc.target/arm/mincmp.c: New test. + 2015-08-01 Paul Thomas <pault@gcc.gnu.org> PR fortran/67091 diff --git a/gcc/testsuite/gcc.target/arm/mincmp.c b/gcc/testsuite/gcc.target/arm/mincmp.c new file mode 100644 index 0000000..ade3bd9 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/mincmp.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-require-effective-target arm32 } */ + +#define min(x, y) ((x) <= (y)) ? (x) : (y) + +unsigned int +foo (unsigned int i, unsigned int x, unsigned int y) +{ + return i < (min (x, y)); +} + +int +bar (int i, int x, int y) +{ + return i < (min (x, y)); +} + +/* { dg-final { scan-assembler "cmpcs" } } */ +/* { dg-final { scan-assembler "cmpge" } } */ |