diff options
| author | Richard Sandiford <richard.sandiford@arm.com> | 2022-02-15 18:09:34 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2022-02-15 18:09:34 +0000 |
| commit | fd77b1208ddd5605b32bd836e6b8ce986fb94c8c (patch) | |
| tree | 26056f94248effd6c2897a9da6fc452b936d1b6f /gcc | |
| parent | 4963079769c99c4073adfd799885410ad484cbbe (diff) | |
| download | gcc-fd77b1208ddd5605b32bd836e6b8ce986fb94c8c.zip gcc-fd77b1208ddd5605b32bd836e6b8ce986fb94c8c.tar.gz gcc-fd77b1208ddd5605b32bd836e6b8ce986fb94c8c.tar.bz2 | |
aarch64: Add +nosve to tests
This patch adds +nosve to various Advanced SIMD-only tests.
gcc/testsuite/
* gcc.target/aarch64/shl-combine-2.c: New test.
* gcc.target/aarch64/shl-combine-3.c: Likewise.
* gcc.target/aarch64/shl-combine-4.c: Likewise.
* gcc.target/aarch64/shl-combine-5.c: Likewise.
* gcc.target/aarch64/xtn-combine-1.c: Likewise.
* gcc.target/aarch64/xtn-combine-2.c: Likewise.
* gcc.target/aarch64/xtn-combine-3.c: Likewise.
* gcc.target/aarch64/xtn-combine-4.c: Likewise.
* gcc.target/aarch64/xtn-combine-5.c: Likewise.
* gcc.target/aarch64/xtn-combine-6.c: Likewise.
Diffstat (limited to 'gcc')
10 files changed, 20 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/shl-combine-2.c b/gcc/testsuite/gcc.target/aarch64/shl-combine-2.c index 6a0331f..491fd44 100644 --- a/gcc/testsuite/gcc.target/aarch64/shl-combine-2.c +++ b/gcc/testsuite/gcc.target/aarch64/shl-combine-2.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define TYPE char void e (signed TYPE * restrict a, signed TYPE *b, int n) diff --git a/gcc/testsuite/gcc.target/aarch64/shl-combine-3.c b/gcc/testsuite/gcc.target/aarch64/shl-combine-3.c index 2086b24a..39bef21 100644 --- a/gcc/testsuite/gcc.target/aarch64/shl-combine-3.c +++ b/gcc/testsuite/gcc.target/aarch64/shl-combine-3.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define TYPE short void e (signed TYPE * restrict a, signed TYPE *b, int n) diff --git a/gcc/testsuite/gcc.target/aarch64/shl-combine-4.c b/gcc/testsuite/gcc.target/aarch64/shl-combine-4.c index 0831810..15dcbff 100644 --- a/gcc/testsuite/gcc.target/aarch64/shl-combine-4.c +++ b/gcc/testsuite/gcc.target/aarch64/shl-combine-4.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define TYPE int void e (signed TYPE * restrict a, signed TYPE *b, int n) diff --git a/gcc/testsuite/gcc.target/aarch64/shl-combine-5.c b/gcc/testsuite/gcc.target/aarch64/shl-combine-5.c index 6b2a6bd..703f630 100644 --- a/gcc/testsuite/gcc.target/aarch64/shl-combine-5.c +++ b/gcc/testsuite/gcc.target/aarch64/shl-combine-5.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define TYPE long void e (signed TYPE * restrict a, signed TYPE *b, int n) diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c index 14e0414..27b7858 100644 --- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c +++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define SIGN signed #define TYPE1 char #define TYPE2 short diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c index c259010..02f03fa 100644 --- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c +++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define SIGN signed #define TYPE1 short #define TYPE2 int diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c index 9a2065f..4bcbd85 100644 --- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c +++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define SIGN signed #define TYPE1 int #define TYPE2 long long diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c index 77c3dce..29703d1 100644 --- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c +++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define SIGN unsigned #define TYPE1 char #define TYPE2 short diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c index ae30e86..f5ee30d 100644 --- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c +++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define SIGN unsigned #define TYPE1 short #define TYPE2 int diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c index 882f3d3..3ddb87e 100644 --- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c +++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c @@ -1,6 +1,8 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */ +#pragma GCC target "+nosve" + #define SIGN unsigned #define TYPE1 int #define TYPE2 long long |