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| author | Pan Li <pan2.li@intel.com> | 2023-06-19 07:36:41 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-06-19 07:39:27 +0800 |
| commit | fcf4e50f852e6c3e7ce777573b282c26b85a7d77 (patch) | |
| tree | 8349b439500587d4260e856d907bf06e8b294186 /gcc | |
| parent | 36911e9d06cc161bac2716877320a62f8a4dd01c (diff) | |
| download | gcc-fcf4e50f852e6c3e7ce777573b282c26b85a7d77.zip gcc-fcf4e50f852e6c3e7ce777573b282c26b85a7d77.tar.gz gcc-fcf4e50f852e6c3e7ce777573b282c26b85a7d77.tar.bz2 | |
RISC-V: Fix one typo for reduc expand GET_MODE_CLASS
This patch would like to fix one typo when GET_MODE_CLASS by mode.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/riscv/riscv-vector-builtins-bases.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc index 53bd0ed..b11b544 100644 --- a/gcc/config/riscv/riscv-vector-builtins-bases.cc +++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc @@ -1400,7 +1400,7 @@ public: machine_mode ret_mode = e.ret_mode (); /* TODO: we will use ret_mode after all types of PR110265 are addressed. */ - if ((GET_MODE_CLASS (MODE) == MODE_VECTOR_FLOAT) + if ((GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT) || GET_MODE_INNER (mode) != GET_MODE_INNER (ret_mode)) return e.use_exact_insn ( code_for_pred_reduc (CODE, e.vector_mode (), e.vector_mode ())); |