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| author | Michael Meissner <meissner@gcc.gnu.org> | 1996-10-07 20:14:15 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 1996-10-07 20:14:15 +0000 |
| commit | fcb37f66ba225769fd451325065bceefee1b5f68 (patch) | |
| tree | 0999b4fe745993ba9a4f01198e7d88bd19fa7be4 /gcc | |
| parent | 1c138ba30278f35104f786fa4514b4f0dc131458 (diff) | |
| download | gcc-fcb37f66ba225769fd451325065bceefee1b5f68.zip gcc-fcb37f66ba225769fd451325065bceefee1b5f68.tar.gz gcc-fcb37f66ba225769fd451325065bceefee1b5f68.tar.bz2 | |
Fix previous change to work on both endian hosts and targets
From-SVN: r12909
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 33 |
1 files changed, 27 insertions, 6 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index e80f66e..795afca 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5958,10 +5958,21 @@ rtx high_rtx, low_rtx; HOST_WIDE_INT high; HOST_WIDE_INT low; - rtx high_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); - rtx low_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); + rtx high_reg, low_reg; + + if (WORDS_BIG_ENDIAN) + { + high_reg = gen_rtx (SUBREG, SImode, operands[0], 0); + low_reg = gen_rtx (SUBREG, SImode, operands[0], 1); + split_double (operands[1], &high_rtx, &low_rtx); + } + else + { + high_reg = gen_rtx (SUBREG, SImode, operands[0], 1); + low_reg = gen_rtx (SUBREG, SImode, operands[0], 0); + split_double (operands[1], &low_rtx, &high_rtx); + } - split_double (operands[1], &high_rtx, &low_rtx); high = INTVAL (high_rtx); low = INTVAL (low_rtx); @@ -5997,10 +6008,20 @@ rtx high_rtx, low_rtx; HOST_WIDE_INT high; HOST_WIDE_INT low; + rtx high_reg, low_reg; - split_double (operands[1], &high_rtx, &low_rtx); - high = INTVAL (high_rtx); - low = INTVAL (low_rtx); + if (WORDS_BIG_ENDIAN) + { + high_reg = gen_rtx (SUBREG, SImode, operands[0], 0); + low_reg = gen_rtx (SUBREG, SImode, operands[0], 1); + split_double (operands[1], &high_rtx, &low_rtx); + } + else + { + high_reg = gen_rtx (SUBREG, SImode, operands[0], 1); + low_reg = gen_rtx (SUBREG, SImode, operands[0], 0); + split_double (operands[1], &low_rtx, &high_rtx); + } operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); |