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| author | Christophe Lyon <christophe.lyon@arm.com> | 2023-02-21 10:54:40 +0000 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@arm.com> | 2023-05-11 10:25:09 +0200 |
| commit | fc468102c56c37a8a80d17fb07db12e5973d80f1 (patch) | |
| tree | 5075fea9dd5fc2a6e7d0587db636d0ec93c5c187 /gcc | |
| parent | dd69152448f9d083c96d840dde90709bfe521911 (diff) | |
| download | gcc-fc468102c56c37a8a80d17fb07db12e5973d80f1.zip gcc-fc468102c56c37a8a80d17fb07db12e5973d80f1.tar.gz gcc-fc468102c56c37a8a80d17fb07db12e5973d80f1.tar.bz2 | |
arm: [MVE intrinsics] factorize vdupq
Factorize vdup builtins so that they use parameterized names.
2022-10-25 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
(MVE_FP_N_VDUPQ_ONLY): New.
(mve_insn): Add vdupq.
* config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
(@mve_<mve_insn>q_n_f<mode>): ... this.
(mve_vdupq_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.
(mve_vdupq_m_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
(mve_vdupq_m_n_f<mode>): Rename into ...
(@mve_<mve_insn>q_m_n_f<mode>): ... this.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arm/iterators.md | 10 | ||||
| -rw-r--r-- | gcc/config/arm/mve.md | 20 |
2 files changed, 20 insertions, 10 deletions
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 8782104..aff4e7f 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -391,6 +391,14 @@ VREV32Q_M_F ]) +(define_int_iterator MVE_FP_M_N_VDUPQ_ONLY [ + VDUPQ_M_N_F + ]) + +(define_int_iterator MVE_FP_N_VDUPQ_ONLY [ + VDUPQ_N_F + ]) + ;; MVE integer binary operations. (define_code_iterator MVE_INT_BINARY_RTX [plus minus mult]) @@ -762,6 +770,8 @@ (VCLSQ_S "vcls") (VCLZQ_M_S "vclz") (VCLZQ_M_U "vclz") (VCREATEQ_S "vcreate") (VCREATEQ_U "vcreate") (VCREATEQ_F "vcreate") + (VDUPQ_M_N_S "vdup") (VDUPQ_M_N_U "vdup") (VDUPQ_M_N_F "vdup") + (VDUPQ_N_S "vdup") (VDUPQ_N_U "vdup") (VDUPQ_N_F "vdup") (VEORQ_M_S "veor") (VEORQ_M_U "veor") (VEORQ_M_F "veor") (VHADDQ_M_N_S "vhadd") (VHADDQ_M_N_U "vhadd") (VHADDQ_M_S "vhadd") (VHADDQ_M_U "vhadd") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 4dfcd6c..0c4e4e6 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -179,14 +179,14 @@ ;; ;; [vdupq_n_f]) ;; -(define_insn "mve_vdupq_n_f<mode>" +(define_insn "@mve_<mve_insn>q_n_f<mode>" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") (unspec:MVE_0 [(match_operand:<V_elem> 1 "s_register_operand" "r")] - VDUPQ_N_F)) + MVE_FP_N_VDUPQ_ONLY)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vdup.%#<V_sz_elem>\t%q0, %1" + "<mve_insn>.%#<V_sz_elem>\t%q0, %1" [(set_attr "type" "mve_move") ]) @@ -310,14 +310,14 @@ ;; ;; [vdupq_n_u, vdupq_n_s]) ;; -(define_insn "mve_vdupq_n_<supf><mode>" +(define_insn "@mve_<mve_insn>q_n_<supf><mode>" [ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:<V_elem> 1 "s_register_operand" "r")] VDUPQ_N)) ] "TARGET_HAVE_MVE" - "vdup.%#<V_sz_elem>\t%q0, %1" + "<mve_insn>.%#<V_sz_elem>\t%q0, %1" [(set_attr "type" "mve_move") ]) @@ -2006,7 +2006,7 @@ ;; ;; [vdupq_m_n_s, vdupq_m_n_u]) ;; -(define_insn "mve_vdupq_m_n_<supf><mode>" +(define_insn "@mve_<mve_insn>q_m_n_<supf><mode>" [ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0") @@ -2015,7 +2015,7 @@ VDUPQ_M_N)) ] "TARGET_HAVE_MVE" - "vpst\;vdupt.%#<V_sz_elem>\t%q0, %2" + "vpst\;<mve_insn>t.%#<V_sz_elem>\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -2666,16 +2666,16 @@ ;; ;; [vdupq_m_n_f]) ;; -(define_insn "mve_vdupq_m_n_f<mode>" +(define_insn "@mve_<mve_insn>q_m_n_f<mode>" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0") (match_operand:<V_elem> 2 "s_register_operand" "r") (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")] - VDUPQ_M_N_F)) + MVE_FP_M_N_VDUPQ_ONLY)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vdupt.%#<V_sz_elem>\t%q0, %2" + "vpst\;<mve_insn>t.%#<V_sz_elem>\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) |