re PR target/79924 (aarch64: untranslated diagnostics in aarch64_err_no_fpadvsimd)

2018-06-05  Steve Ellcey  <sellcey@cavium.com>

	PR target/79924
	* config/aarch64/aarch64-protos.h (aarch64_err_no_fpadvsimd): Remove
	second argument.
	* config/aarch64/aarch64-protos..c (aarch64_err_no_fpadvsimd):
	Remove second argument, change how error is called.
	(aarch64_layout_arg): Remove second argument from
	aarch64_err_no_fpadvsimd call.
	(aarch64_init_cumulative_args): Ditto.
	(aarch64_gimplify_va_arg_expr): Ditto.
	* config/aarch64/aarch64.md (mov<mode>): Ditto.

From-SVN: r261217

4 files changed, 31 insertions, 9 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 39305c5..dd6b271 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2018-06-05  Steve Ellcey  <sellcey@cavium.com>
+
+	PR target/79924
+	* config/aarch64/aarch64-protos.h (aarch64_err_no_fpadvsimd): Remove
+	second argument.
+	* config/aarch64/aarch64-protos..c (aarch64_err_no_fpadvsimd):
+	Remove second argument, change how error is called.
+	(aarch64_layout_arg): Remove second argument from
+	aarch64_err_no_fpadvsimd call.
+	(aarch64_init_cumulative_args): Ditto.
+	(aarch64_gimplify_va_arg_expr): Ditto.
+	* config/aarch64/aarch64.md (mov<mode>): Ditto.
+
 2018-06-05  Uros Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/i386.md (simple_return_indirect_internal): New expander.
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index 4ea50ac..87c6ae2 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -448,7 +448,7 @@ void aarch64_asm_output_labelref (FILE *, const char *);
 void aarch64_cpu_cpp_builtins (cpp_reader *);
 const char * aarch64_gen_far_branch (rtx *, int, const char *, const char *);
 const char * aarch64_output_probe_stack_range (rtx, rtx);
-void aarch64_err_no_fpadvsimd (machine_mode, const char *);
+void aarch64_err_no_fpadvsimd (machine_mode);
 void aarch64_expand_epilogue (bool);
 void aarch64_expand_mov_immediate (rtx, rtx, rtx (*) (rtx, rtx) = 0);
 void aarch64_emit_sve_pred_move (rtx, rtx, rtx);
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 98ef457..bd0ac2f 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1077,13 +1077,22 @@ aarch64_gen_far_branch (rtx * operands, int pos_label, const char * dest,
 }
 
 void
-aarch64_err_no_fpadvsimd (machine_mode mode, const char *msg)
+aarch64_err_no_fpadvsimd (machine_mode mode)
 {
-  const char *mc = FLOAT_MODE_P (mode) ? "floating-point" : "vector";
   if (TARGET_GENERAL_REGS_ONLY)
-    error ("%qs is incompatible with %s %s", "-mgeneral-regs-only", mc, msg);
+    if (FLOAT_MODE_P (mode))
+      error ("%qs is incompatible with the use of floating-point types",
+	     "-mgeneral-regs-only");
+    else
+      error ("%qs is incompatible with the use of vector types",
+	     "-mgeneral-regs-only");
   else
-    error ("%qs feature modifier is incompatible with %s %s", "+nofp", mc, msg);
+    if (FLOAT_MODE_P (mode))
+      error ("%qs feature modifier is incompatible with the use of"
+	     " floating-point types", "+nofp");
+    else
+      error ("%qs feature modifier is incompatible with the use of"
+	     " vector types", "+nofp");
 }
 
 /* Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS.
@@ -3519,7 +3528,7 @@ aarch64_layout_arg (cumulative_args_t pcum_v, machine_mode mode,
   if (allocate_nvrn)
     {
       if (!TARGET_FLOAT)
-	aarch64_err_no_fpadvsimd (mode, "argument");
+	aarch64_err_no_fpadvsimd (mode);
 
       if (nvrn + nregs <= NUM_FP_ARG_REGS)
 	{
@@ -3661,7 +3670,7 @@ aarch64_init_cumulative_args (CUMULATIVE_ARGS *pcum,
       int nregs ATTRIBUTE_UNUSED; /* Likewise.  */
       if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (type), type,
 						   &mode, &nregs, NULL))
-	aarch64_err_no_fpadvsimd (TYPE_MODE (type), "return type");
+	aarch64_err_no_fpadvsimd (TYPE_MODE (type));
     }
   return;
 }
@@ -12254,7 +12263,7 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
 
       /* TYPE passed in fp/simd registers.  */
       if (!TARGET_FLOAT)
-	aarch64_err_no_fpadvsimd (mode, "varargs");
+	aarch64_err_no_fpadvsimd (mode);
 
       f_top = build3 (COMPONENT_REF, TREE_TYPE (f_vrtop),
 		      unshare_expr (valist), f_vrtop, NULL_TREE);
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 2539f2e..830f976 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1149,7 +1149,7 @@
   {
     if (!TARGET_FLOAT)
       {
-	aarch64_err_no_fpadvsimd (<MODE>mode, "code");
+	aarch64_err_no_fpadvsimd (<MODE>mode);
 	FAIL;
       }