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authorH.J. Lu <hjl.tools@gmail.com>2021-11-04 07:37:18 -0700
committerH.J. Lu <hjl.tools@gmail.com>2021-11-04 07:41:52 -0700
commitfbe58ba97aff3270877d7fd5600c17687b85964c (patch)
tree302ab4fb30133957b1b50b4b2c6b6e19aeaf5afc /gcc
parent6a9678f0b30d36ae13259ad635e175a1e24917a1 (diff)
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x86: Check leal/addl gcc.target/i386/amxtile-3.c for x32
Check leal and addl for x32 to fix: FAIL: gcc.target/i386/amxtile-3.c scan-assembler addq[ \\t]+\\$12 FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+4 FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+8 * gcc.target/i386/amxtile-3.c: Check leal/addl for x32.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/gcc.target/i386/amxtile-3.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/gcc/testsuite/gcc.target/i386/amxtile-3.c b/gcc/testsuite/gcc.target/i386/amxtile-3.c
index 31b34d0..26204e3 100644
--- a/gcc/testsuite/gcc.target/i386/amxtile-3.c
+++ b/gcc/testsuite/gcc.target/i386/amxtile-3.c
@@ -3,12 +3,18 @@
/* { dg-final { scan-assembler "tileloadd\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */
/* { dg-final { scan-assembler "tileloaddt1\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */
/* { dg-final { scan-assembler "tilestored\[ \\t]+\[^\n\]*%tmm\[0-9\]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)" } } */
-/* { dg-final { scan-assembler "leaq\[ \\t]+4" } } */
-/* { dg-final { scan-assembler "leaq\[ \\t]+8" } } */
-/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" } } */
-/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" } } */
-/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" } } */
-/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" } } */
+/* { dg-final { scan-assembler "leaq\[ \\t]+4" { target lp64 } } } */
+/* { dg-final { scan-assembler "leaq\[ \\t]+8" { target lp64 } } } */
+/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" { target lp64 } } } */
+/* { dg-final { scan-assembler "leal\[ \\t]+4" { target x32 } } } */
+/* { dg-final { scan-assembler "leal\[ \\t]+8" { target x32 } } } */
+/* { dg-final { scan-assembler "addl\[ \\t]+\\\$12" { target x32 } } } */
+/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" { target lp64 } } } */
+/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" { target lp64 } } } */
+/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" { target lp64 } } } */
+/* { dg-final { scan-assembler-not "leal\[ \\t]+1" { target x32 } } } */
+/* { dg-final { scan-assembler-not "leal\[ \\t]+2" { target x32 } } } */
+/* { dg-final { scan-assembler-not "addl\[ \\t]+\\\$3" { target x32 } } } */
#include <immintrin.h>
extern int a[];