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| author | Andrea Corallo <andrea.corallo@arm.com> | 2020-11-06 16:17:32 +0000 |
|---|---|---|
| committer | Andrea Corallo <andrea.corallo@arm.com> | 2020-11-09 15:39:07 +0100 |
| commit | fa59c8dcd2f97c929150bd32bae1f341e0d7b0f7 (patch) | |
| tree | df3e029961ac8d1eb6ae95408c8190f626836aa3 /gcc | |
| parent | 0af3930a497e022597a08fa1bcef5e453bfa636f (diff) | |
| download | gcc-fa59c8dcd2f97c929150bd32bae1f341e0d7b0f7.zip gcc-fa59c8dcd2f97c929150bd32bae1f341e0d7b0f7.tar.gz gcc-fa59c8dcd2f97c929150bd32bae1f341e0d7b0f7.tar.bz2 | |
aarch64: Do not alter force_reg returned register expanding fcmla
2020-11-06 Andrea Corallo <andrea.corallo@arm.com>
* config/aarch64/aarch64-builtins.c
(aarch64_expand_fcmla_builtin): Do not alter force_reg returned
register.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/aarch64/aarch64-builtins.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 5defdb0..188fce0 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -1862,10 +1862,10 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) only need to know the order in a V2mode. */ lane_idx = aarch64_endian_lane_rtx (V2DImode, lane); - if (!target) + if (!target + || !REG_P (target) + || GET_MODE (target) != d->mode) target = gen_reg_rtx (d->mode); - else - target = force_reg (d->mode, target); rtx pat = NULL_RTX; |