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| author | Alex Coplan <alex.coplan@arm.com> | 2020-09-30 09:02:47 +0100 |
|---|---|---|
| committer | Alex Coplan <alex.coplan@arm.com> | 2020-09-30 09:02:47 +0100 |
| commit | f63023fafbbc13545fef67e6b32a55b48a945fcf (patch) | |
| tree | d67c33c7e792a350dc2a042abba27a6aab21ff3e /gcc | |
| parent | de2c1d00f27bfaa1f917a2e3a933a45e3b8ba95a (diff) | |
| download | gcc-f63023fafbbc13545fef67e6b32a55b48a945fcf.zip gcc-f63023fafbbc13545fef67e6b32a55b48a945fcf.tar.gz gcc-f63023fafbbc13545fef67e6b32a55b48a945fcf.tar.bz2 | |
arm: Fix ICEs in no-literal-pool.c on MVE [PR97251]
This patch fixes ICEs when compiling
gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool.c with
-mfp16-format=ieee -mfloat-abi=hard -march=armv8.1-m.main+mve
-mpure-code.
The existing conditions in the movsf/movdf expanders (as well as the
no_literal_pool patterns) were too restrictive, requiring
TARGET_HARD_FLOAT instead of TARGET_VFP_BASE, which caused unrecognised
insns when compiling this testcase with integer MVE and -mpure-code.
gcc/ChangeLog:
PR target/97251
* config/arm/arm.md (movsf): Relax TARGET_HARD_FLOAT to
TARGET_VFP_BASE.
(movdf): Likewise.
* config/arm/vfp.md (no_literal_pool_df_immediate): Likewise.
(no_literal_pool_sf_immediate): Likewise.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arm/arm.md | 4 | ||||
| -rw-r--r-- | gcc/config/arm/vfp.md | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 147c4a5..1a8e498 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -7357,7 +7357,7 @@ if (arm_disable_literal_pool && (REG_P (operands[0]) || SUBREG_P (operands[0])) && CONST_DOUBLE_P (operands[1]) - && TARGET_HARD_FLOAT + && TARGET_VFP_BASE && !vfp3_const_double_rtx (operands[1])) { rtx clobreg = gen_reg_rtx (SFmode); @@ -7454,7 +7454,7 @@ if (arm_disable_literal_pool && (REG_P (operands[0]) || SUBREG_P (operands[0])) && CONSTANT_P (operands[1]) - && TARGET_HARD_FLOAT + && TARGET_VFP_BASE && !arm_const_double_rtx (operands[1]) && !(TARGET_VFP_DOUBLE && vfp3_const_double_rtx (operands[1]))) { diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index 72707c1..e6c287c 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -2125,7 +2125,7 @@ (match_operand:DF 1 "const_double_operand" "F")) (clobber (match_operand:DF 2 "s_register_operand" "=r"))] "arm_disable_literal_pool - && TARGET_HARD_FLOAT + && TARGET_VFP_BASE && !arm_const_double_rtx (operands[1]) && !(TARGET_VFP_DOUBLE && vfp3_const_double_rtx (operands[1]))" "#" @@ -2151,7 +2151,7 @@ (match_operand:SF 1 "const_double_operand" "E")) (clobber (match_operand:SF 2 "s_register_operand" "=r"))] "arm_disable_literal_pool - && TARGET_HARD_FLOAT + && TARGET_VFP_BASE && !vfp3_const_double_rtx (operands[1])" "#" "" |